diff options
| author | Gregory Nutt <gnutt@nuttx.org> | 2013-06-13 18:53:14 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2013-06-13 18:53:14 -0600 |
| commit | 619119787e7a5e1e04528f6bf4bf079fe4499ee7 (patch) | |
| tree | af048106afd68c94926d8d90aee48bad75e9be6b /nuttx/arch/arm/src/sam34/sam3u_gpio.h | |
| parent | f89052fa018e2b4e3ae7aeea2f36aa3d08927956 (diff) | |
| download | px4-nuttx-619119787e7a5e1e04528f6bf4bf079fe4499ee7.tar.gz px4-nuttx-619119787e7a5e1e04528f6bf4bf079fe4499ee7.tar.bz2 px4-nuttx-619119787e7a5e1e04528f6bf4bf079fe4499ee7.zip | |
SAM3/4S GPIO interrupt changes
Diffstat (limited to 'nuttx/arch/arm/src/sam34/sam3u_gpio.h')
| -rw-r--r-- | nuttx/arch/arm/src/sam34/sam3u_gpio.h | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/nuttx/arch/arm/src/sam34/sam3u_gpio.h b/nuttx/arch/arm/src/sam34/sam3u_gpio.h index 84f543056..74716bb3a 100644 --- a/nuttx/arch/arm/src/sam34/sam3u_gpio.h +++ b/nuttx/arch/arm/src/sam34/sam3u_gpio.h @@ -56,7 +56,7 @@ /* 16-bit Encoding: * - * MMCC CII. VPPB BBBB + * MMCC CIII VPPB BBBB */ /* Input/Output mode: @@ -85,17 +85,22 @@ /* Additional interrupt modes: * - * .... .II. .... .... + * .... .III .... .... */ -#define GPIO_INT_SHIFT (9) /* Bits 9-10: GPIO interrupt bits */ -#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT) -# define GPIO_INT_LEVEL (1 << 10) /* Bit 10: Level detection interrupt */ -# define GPIO_INT_EDGE (0) /* (vs. Edge detection interrupt) */ -# define GPIO_INT_HIGHLEVEL (1 << 9) /* Bit 9: High level detection interrupt */ -# define GPIO_INT_LOWLEVEL (0) /* (vs. Low level detection interrupt) */ -# define GPIO_INT_RISING (1 << 9) /* Bit 9: Rising edge detection interrupt */ -# define GPIO_INT_FALLING (0) /* (vs. Falling edge detection interrupt) */ +#define GPIO_INT_SHIFT (8) /* Bits 8-10: GPIO interrupt bits */ +#define GPIO_INT_MASK (7 << GPIO_INT_SHIFT) +# define _GIO_INT_AIM (1 << 10) /* Bit 10: Additional Interrupt modes */ +# define _GPIO_INT_LEVEL (1 << 9) /* Bit 9: Level detection interrupt */ +# define _GPIO_INT_EDGE (0) /* (vs. Edge detection interrupt) */ +# define _GPIO_INT_RH (1 << 8) /* Bit 9: Rising edge/High level detection interrupt */ +# define _GPIO_INT_FL (0) /* (vs. Falling edge/Low level detection interrupt) */ + +# define GPIO_INT_HIGHLEVEL (_GIO_INT_AIM | _GPIO_INT_LEVEL | _GPIO_INT_RH) +# define GPIO_INT_LOWLEVEL (_GIO_INT_AIM | _GPIO_INT_LEVEL | _GPIO_INT_FL) +# define GPIO_INT_RISING (_GIO_INT_AIM | _GPIO_INT_EDGE | _GPIO_INT_RH) +# define GPIO_INT_FALLING (_GIO_INT_AIM | _GPIO_INT_EDGE | _GPIO_INT_FL) +# define GPIO_INT_BOTHEDGES (0) /* If the pin is an GPIO output, then this identifies the initial output value: * |