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author | Gregory Nutt <gnutt@nuttx.org> | 2013-08-05 10:29:43 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2013-08-05 10:29:43 -0600 |
commit | 5bf5e918c77fb5ba2e5cf6f5c2f2c472d806c854 (patch) | |
tree | 2491c9e504834e4518c7de60dffc19e68120d5a4 /nuttx/arch/arm/src/sam34/sam_spi.c | |
parent | 77df6ac2d504fc42d3e1def268cbaa551dcf64fa (diff) | |
download | px4-nuttx-5bf5e918c77fb5ba2e5cf6f5c2f2c472d806c854.tar.gz px4-nuttx-5bf5e918c77fb5ba2e5cf6f5c2f2c472d806c854.tar.bz2 px4-nuttx-5bf5e918c77fb5ba2e5cf6f5c2f2c472d806c854.zip |
SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not be correctly configured if CONFIG_SPI_OWNBUS=n
Diffstat (limited to 'nuttx/arch/arm/src/sam34/sam_spi.c')
-rw-r--r-- | nuttx/arch/arm/src/sam34/sam_spi.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/sam34/sam_spi.c b/nuttx/arch/arm/src/sam34/sam_spi.c index d7366d98c..278eb55d2 100644 --- a/nuttx/arch/arm/src/sam34/sam_spi.c +++ b/nuttx/arch/arm/src/sam34/sam_spi.c @@ -896,6 +896,10 @@ FAR struct spi_dev_s *up_spiinitialize(int cs) { FAR struct sam_spidev_s *priv; irqstate_t flags; +#ifndef CONFIG_SPI_OWNBUS + uint32_t regaddr; + uint32_t regval; +#endif /* The support SAM parts have only a single SPI port */ @@ -985,6 +989,22 @@ FAR struct spi_dev_s *up_spiinitialize(int cs) spi_dumpregs("After initialization"); } +#ifndef CONFIG_SPI_OWNBUS + /* Set to mode=0 and nbits=8 and impossible frequency. It is only + * critical to do this if CONFIG_SPI_OWNBUS is not defined because in + * that case, the SPI will only be reconfigured if there is a change. + */ + + regaddr = g_csraddr[cs]; + regval = getreg32(regaddr); + regval &= ~(SPI_CSR_CPOL | SPI_CSR_NCPHA | SPI_CSR_BITS_MASK); + regval |= (SPI_CSR_NCPHA | SPI_CSR_BITS(8)); + putreg32(regval, regaddr); + + priv->nbits = 8; + spivdbg("csr[%08x]=%08x\n", regaddr, regval); +#endif + return &priv->spidev; } #endif /* CONFIG_SAM34_SPI0 */ |