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authorGregory Nutt <gnutt@nuttx.org>2014-08-17 17:54:46 -0600
committerGregory Nutt <gnutt@nuttx.org>2014-08-17 17:54:46 -0600
commitfaac807b1efaa28cf45cfefb3b65da291894f7e4 (patch)
tree1a0cd4b76eea70a222b19bd17de487d31d849416 /nuttx/arch/arm/src/sama5/sam_emaca.c
parent1e403a4e31a138eb5d47f8ff8738b088ea9d051a (diff)
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NSH link management now works! The last fix was to the Ethernet drivers: They cannot disable clocking to the Ethernet blok on ifdown. Otherwise, we cannot communicate with the PHY
Diffstat (limited to 'nuttx/arch/arm/src/sama5/sam_emaca.c')
-rw-r--r--nuttx/arch/arm/src/sama5/sam_emaca.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/sama5/sam_emaca.c b/nuttx/arch/arm/src/sama5/sam_emaca.c
index 701b3464e..3dfc0d07e 100644
--- a/nuttx/arch/arm/src/sama5/sam_emaca.c
+++ b/nuttx/arch/arm/src/sama5/sam_emaca.c
@@ -2892,6 +2892,26 @@ static void sam_rxreset(struct sam_emac_s *priv)
static void sam_emac_reset(struct sam_emac_s *priv)
{
+#ifdef CONFIG_NETDEV_PHY_IOCTL
+ /* We are supporting PHY IOCTLs, then do not reset the MAC. If we do,
+ * then we cannot communicate with the PHY. So, instead, just disable
+ * interrupts, cancel timers, and disable TX and RX.
+ */
+
+ sam_putreg(priv, SAM_EMAC_IDR, EMAC_INT_ALL);
+
+ /* Reset RX and TX logic */
+
+ sam_rxreset(priv);
+ sam_txreset(priv);
+
+ /* Disable Rx and Tx, plus the statistics registers. */
+
+ regval = sam_getreg(priv, SAM_EMAC_NCR);
+ regval &= ~(EMAC_NCR_RXEN | EMAC_NCR_TXEN | EMAC_NCR_WESTAT);
+ sam_putreg(priv, SAM_EMAC_NCR, regval);
+
+#else
/* Disable all EMAC interrupts */
sam_putreg(priv, SAM_EMAC_IDR, EMAC_INT_ALL);
@@ -2908,6 +2928,8 @@ static void sam_emac_reset(struct sam_emac_s *priv)
/* Disable clocking to the EMAC peripheral */
sam_emac_disableclk();
+
+#endif
}
/****************************************************************************