STM32 ADC update

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4194 42af7a65-404d-4744-a932-0658087f49c3

1 files changed, 406 insertions, 0 deletions

diff --git a/nuttx/arch/arm/src/stm32/stm32_adc.h b/nuttx/arch/arm/src/stm32/stm32_adc.h
index ce778c5d2..9c20d8f6b 100644
--- a/nuttx/arch/arm/src/stm32/stm32_adc.h
+++ b/nuttx/arch/arm/src/stm32/stm32_adc.h
@@ -145,6 +145,411 @@
 #undef CONFIG_STM32_TIM14_ADC2
 #undef CONFIG_STM32_TIM14_ADC3
 
+/* Up to 3 ADC interfaces are supported */
+
+#if STM32_NADC < 3
+#  undef CONFIG_STM32_ADC3
+#endif
+
+#if STM32_NADC < 2
+#  undef CONFIG_STM32_ADC2
+#endif
+
+#if STM32_NADC < 1
+#  undef CONFIG_STM32_ADC1
+#endif
+
+#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
+
+/* Timer configuration:  If a timer trigger is specified, then get information
+ * about the timer.
+ */
+
+#if defined(CONFIG_STM32_TIM1_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM1_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY
+#elif defined(CONFIG_STM32_TIM2_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM2_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM3_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM3_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM4_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM4_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM5_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM5_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM8_ADC1)
+#    define ADC1_HAVE_TIMER           1
+#    define ADC1_TIMER_BASE           STM32_TIM8_BASE
+#    define ADC1_TIMER_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY
+#else
+#    undef  ADC1_HAVE_TIMER
+#endif
+
+#ifdef ADC1_HAVE_TIMER
+#  ifndef CONFIG_STM32_ADC1_SAMPLE_FREQUENCY
+#    error "CONFIG_STM32_ADC1_SAMPLE_FREQUENCY not defined"
+#  endif
+#  ifndef CONFIG_STM32_ADC1_TIMTRIG
+#    error "CONFIG_STM32_ADC1_TIMTRIG not defined"
+#    warning "Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32_TIM1_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM1_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY
+#elif defined(CONFIG_STM32_TIM2_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM2_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM3_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM3_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM4_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM4_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM5_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM5_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM8_ADC2)
+#    define ADC2_HAVE_TIMER           1
+#    define ADC2_TIMER_BASE           STM32_TIM8_BASE
+#    define ADC2_TIMER_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY
+#else
+#    undef  ADC2_HAVE_TIMER
+#endif
+
+#ifdef ADC2_HAVE_TIMER
+#  ifndef CONFIG_STM32_ADC2_SAMPLE_FREQUENCY
+#    error "CONFIG_STM32_ADC2_SAMPLE_FREQUENCY not defined"
+#  endif
+#  ifndef CONFIG_STM32_ADC2_TIMTRIG
+#    error "CONFIG_STM32_ADC2_TIMTRIG not defined"
+#    warning "Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32_TIM1_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM1_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY
+#elif defined(CONFIG_STM32_TIM2_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM2_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM3_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM3_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM4_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM4_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM5_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM5_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_PCLK1_FREQUENCY
+#elif defined(CONFIG_STM32_TIM8_ADC3)
+#    define ADC3_HAVE_TIMER           1
+#    define ADC3_TIMER_BASE           STM32_TIM8_BASE
+#    define ADC3_TIMER_PCLK_FREQUENCY STM32_PCLK2_FREQUENCY
+#else
+#    undef  ADC3_HAVE_TIMER
+#endif
+
+#ifdef ADC3_HAVE_TIMER
+#  ifndef CONFIG_STM32_ADC3_SAMPLE_FREQUENCY
+#    error "CONFIG_STM32_ADC3_SAMPLE_FREQUENCY not defined"
+#  endif
+#  ifndef CONFIG_STM32_ADC3_TIMTRIG
+#    error "CONFIG_STM32_ADC3_TIMTRIG not defined"
+#    warning "Values 0:CC1 1:CC2 2:CC3 3:CC4 4:TRGO"
+#  endif
+#endif
+
+#if defined(ADC1_HAVE_TIMER) || defined(ADC2_HAVE_TIMER) || defined(ADC3_HAVE_TIMER)
+#  define ADC_HAVE_TIMER 1
+#else
+#  undef ADC_HAVE_TIMER
+#endif
+
+/* NOTE:  The following assumes that all possible combinations of timers and
+ * values are support EXTSEL.  That is not so and it varies from one STM32 to another.
+ * But this (wrong) assumptions keeps the logic as simple as possible.  If un
+ * unsupported combination is used, an error will show up later during compilation
+ * although it may be difficult to track it back to this simplification.
+ */
+
+#if defined(CONFIG_STM32_TIM1_ADC1)
+#  if CONFIG_STM32_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC1
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC2
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC3
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC4
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T1TRGO
+#  else
+#    error "CONFIG_STM32_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM2_ADC1)
+#  if CONFIG_STM32_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC1
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC2
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC3
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC4
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T2TRGO
+#  else
+#    error "CONFIG_STM32_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM3_ADC1)
+#  if CONFIG_STM32_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC1
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC2
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC3
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC4
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T3TRGO
+#  else
+#    error "CONFIG_STM32_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM4_ADC1)
+#  if CONFIG_STM32_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC1
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC2
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC3
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC4
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T4TRGO
+#  else
+#    error "CONFIG_STM32_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM5_ADC1)
+#  if CONFIG_STM32_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC1
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC2
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC3
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC4
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T5TRGO
+#  else
+#    error "CONFIG_STM32_ADC1_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM8_ADC1)
+#  if CONFIG_STM32_ADC1_TIMTRIG == 0
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC1
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 1
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC2
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 2
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC3
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 3
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC4
+#  elif CONFIG_STM32_ADC1_TIMTRIG == 4
+#    define ADC1_EXTSEL_VALUE ADC_CR2_EXTSEL_T8TRGO
+#  else
+#    error "CONFIG_STM32_ADC1_TIMTRIG is out of range"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32_TIM1_ADC2)
+#  if CONFIG_STM32_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC1
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC2
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC3
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC4
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T1TRGO
+#  else
+#    error "CONFIG_STM32_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM2_ADC2)
+#  if CONFIG_STM32_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC1
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC2
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC3
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC4
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T2TRGO
+#  else
+#    error "CONFIG_STM32_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM3_ADC2)
+#  if CONFIG_STM32_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC1
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC2
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC3
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC4
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T3TRGO
+#  else
+#    error "CONFIG_STM32_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM4_ADC2)
+#  if CONFIG_STM32_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC1
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC2
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC3
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC4
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T4TRGO
+#  else
+#    error "CONFIG_STM32_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM5_ADC2)
+#  if CONFIG_STM32_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC1
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC2
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC3
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC4
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T5TRGO
+#  else
+#    error "CONFIG_STM32_ADC2_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM8_ADC2)
+#  if CONFIG_STM32_ADC2_TIMTRIG == 0
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC1
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 1
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC2
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 2
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC3
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 3
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC4
+#  elif CONFIG_STM32_ADC2_TIMTRIG == 4
+#    define ADC2_EXTSEL_VALUE ADC_CR2_EXTSEL_T8TRGO
+#  else
+#    error "CONFIG_STM32_ADC2_TIMTRIG is out of range"
+#  endif
+#endif
+
+#if defined(CONFIG_STM32_TIM1_ADC3)
+#  if CONFIG_STM32_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC1
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC2
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC3
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T1CC4
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T1TRGO
+#  else
+#    error "CONFIG_STM32_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM2_ADC3)
+#  if CONFIG_STM32_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC1
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC2
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC3
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T2CC4
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T2TRGO
+#  else
+#    error "CONFIG_STM32_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM3_ADC3)
+#  if CONFIG_STM32_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC1
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC2
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC3
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T3CC4
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T3TRGO
+#  else
+#    error "CONFIG_STM32_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM4_ADC3)
+#  if CONFIG_STM32_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC1
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC2
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC3
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T4CC4
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T4TRGO
+#  else
+#    error "CONFIG_STM32_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM5_ADC3)
+#  if CONFIG_STM32_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC1
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC2
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC3
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T5CC4
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T5TRGO
+#  else
+#    error "CONFIG_STM32_ADC3_TIMTRIG is out of range"
+#  endif
+#elif defined(CONFIG_STM32_TIM8_ADC3)
+#  if CONFIG_STM32_ADC3_TIMTRIG == 0
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC1
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 1
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC2
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 2
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC3
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 3
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T8CC4
+#  elif CONFIG_STM32_ADC3_TIMTRIG == 4
+#    define ADC3_EXTSEL_VALUE ADC_CR2_EXTSEL_T8TRGO
+#  else
+#    error "CONFIG_STM32_ADC3_TIMTRIG is out of range"
+#  endif
+#endif
+
 /************************************************************************************
  * Public Function Prototypes
  ************************************************************************************/
@@ -183,5 +588,6 @@ EXTERN struct adc_dev_s *stm32_adcinitialize(int intf, const uint8_t *chanlist,
 #endif
 #endif /* __ASSEMBLY__ */
 
+#endif /* CONFIG_STM32_ADC || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
 #endif /* __ARCH_ARM_SRC_STM32_STM32_ADC_H */