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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-03-27 19:53:36 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-03-27 19:53:36 +0000 |
| commit | e400d9ee24767bc6b7d071b957937fbb2b5a1e2b (patch) | |
| tree | 83a0693338ec4d27de0597c85a20f916c9558938 /nuttx/arch/arm/src/stm32/stm32_tim.c | |
| parent | d16a2aa2ac0cbbba242e1d5258e1d0d6f775672e (diff) | |
| download | px4-nuttx-e400d9ee24767bc6b7d071b957937fbb2b5a1e2b.tar.gz px4-nuttx-e400d9ee24767bc6b7d071b957937fbb2b5a1e2b.tar.bz2 px4-nuttx-e400d9ee24767bc6b7d071b957937fbb2b5a1e2b.zip | |
More changes from Uros
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3426 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_tim.c')
| -rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_tim.c | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_tim.c b/nuttx/arch/arm/src/stm32/stm32_tim.c index d5c9d6f70..433269bac 100644 --- a/nuttx/arch/arm/src/stm32/stm32_tim.c +++ b/nuttx/arch/arm/src/stm32/stm32_tim.c @@ -63,6 +63,7 @@ #define getreg16(a) (*(volatile uint16_t *)(a)) #define putreg16(v,a) (*(volatile uint16_t *)(a) = (v)) +#if defined(CONFIG_STM32_TIM5) && defined(CONFIG_STM32_TIM8) /************************************************************************************ * Private Types @@ -381,15 +382,6 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel switch( ((struct stm32_tim_priv_s *)dev)->base ) { - case STM32_TIM1_BASE: - switch(channel) { - case 0: stm32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break; - case 1: stm32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break; - case 2: stm32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break; - case 3: stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break; - } - break; - case STM32_TIM2_BASE: switch(channel) { case 0: stm32_tim_gpioconfig(GPIO_TIM2_CH1OUT, mode); break; @@ -426,6 +418,16 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel } break; +#if STM32_NATIM > 0 + case STM32_TIM1_BASE: + switch(channel) { + case 0: stm32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break; + case 1: stm32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break; + case 2: stm32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break; + case 3: stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break; + } + break; + case STM32_TIM8_BASE: switch(channel) { case 0: stm32_tim_gpioconfig(GPIO_TIM8_CH1OUT, mode); break; @@ -434,7 +436,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel case 3: stm32_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break; } break; - +#endif default: return ERROR; } @@ -582,3 +584,6 @@ int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev) return OK; } + +#endif /* CONFIG_STM32_TIM5 && CONFIG_STM32_TIM8 */ + |