Completes initial DM320 bringup

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@120 42af7a65-404d-4744-a932-0658087f49c3

14 files changed, 324 insertions, 58 deletions

diff --git a/nuttx/arch/dm320/src/Makefile b/nuttx/arch/dm320/src/Makefile
index eb7bb7953..6ee4d4a9c 100644
--- a/nuttx/arch/dm320/src/Makefile
+++ b/nuttx/arch/dm320/src/Makefile
@@ -39,10 +39,7 @@ MKDEP 		= $(TOPDIR)/tools/mkdeps.sh
 CFLAGS		+= -I$(TOPDIR)/sched
 
 ASRCS		= up_vectors.S up_saveusercontext.S up_fullcontextrestore.S \
-		  up_restart.S up_cache.S
-ifeq ($(CONFIG_DEBUG),y)
-ASRCS		+= up_lowputc.S
-endif
+		  up_restart.S up_cache.S up_lowputc.S
 AOBJS		= $(ASRCS:.S=.o)
 
 CSRCS		= up_allocateheap.c up_assert.c up_blocktask.c up_boot.c \
diff --git a/nuttx/arch/dm320/src/dm320-gio.h b/nuttx/arch/dm320/src/dm320-gio.h
new file mode 100644
index 000000000..d310e982e
--- /dev/null
+++ b/nuttx/arch/dm320/src/dm320-gio.h
@@ -0,0 +1,175 @@
+/************************************************************************************
+ * dm320-gio.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __DM320_GIO_H
+#define __DM320_GIO_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+# include <sys/types.h>
+#endif
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* General I/O Registers */
+
+#define DM320_GIO_DIR0    (DM320_PERIPHERALS_VADDR + 0x0580) /* GIO Direction Register 0 */
+#define DM320_GIO_DIR1    (DM320_PERIPHERALS_VADDR + 0x0582) /* GIO Direction Register 1 */
+#define DM320_GIO_DIR2    (DM320_PERIPHERALS_VADDR + 0x0584) /* GIO Direction Register 2 */
+#define DM320_GIO_INV0    (DM320_PERIPHERALS_VADDR + 0x0586) /* GIO Inversion Register 0 */
+#define DM320_GIO_INV1    (DM320_PERIPHERALS_VADDR + 0x0588) /* GIO Inversion Register 1 */
+#define DM320_GIO_INV2    (DM320_PERIPHERALS_VADDR + 0x058A) /* GIO Inversion Register 2 */
+#define DM320_GIO_BITSET0 (DM320_PERIPHERALS_VADDR + 0x058C) /* GIO Bit Set Register 0 */
+#define DM320_GIO_BITSET1 (DM320_PERIPHERALS_VADDR + 0x058E) /* GIO Bit Set Register 1 */
+#define DM320_GIO_BITSET2 (DM320_PERIPHERALS_VADDR + 0x0590) /* GIO Bit Set Register 2 */
+#define DM320_GIO_BITCLR0 (DM320_PERIPHERALS_VADDR + 0x0592) /* GIO Bit Clear Register 0 */
+#define DM320_GIO_BITCLR1 (DM320_PERIPHERALS_VADDR + 0x0594) /* GIO Bit Clear Register 1 */
+#define DM320_GIO_BITCLR2 (DM320_PERIPHERALS_VADDR + 0x0596) /* GIO Bit Clear Register 2 */
+#define DM320_GIO_IRQPORT (DM320_PERIPHERALS_VADDR + 0x0598) /* GIO IRQ Port Setting Register */
+#define DM320_GIO_IRQEDGE (DM320_PERIPHERALS_VADDR + 0x059A) /* GIO IRQ Edge Setting Register */
+#define DM320_GIO_CHAT0   (DM320_PERIPHERALS_VADDR + 0x059C) /* GIO Chatter Setting Register 0 */
+#define DM320_GIO_CHAT1   (DM320_PERIPHERALS_VADDR + 0x059E) /* GIO Chatter Setting Register 1 */
+#define DM320_GIO_CHAT2   (DM320_PERIPHERALS_VADDR + 0x05A0) /* GIO Chatter Setting Register 2 */
+#define DM320_GIO_NCHAT   (DM320_PERIPHERALS_VADDR + 0x05A2) /* GIO Chatter Value Register */
+#define DM320_GIO_FSEL0   (DM320_PERIPHERALS_VADDR + 0x05A4) /* GIO Function Select Register 0 */
+#define DM320_GIO_FSEL1   (DM320_PERIPHERALS_VADDR + 0x05A6) /* GIO Function Select Register 1 */
+#define DM320_GIO_FSEL2   (DM320_PERIPHERALS_VADDR + 0x05A8) /* GIO Function Select Register 2 */
+#define DM320_GIO_FSEL3   (DM320_PERIPHERALS_VADDR + 0x05AA) /* GIO Function Select Register 3 */
+
+/* Macros for GIO access */
+
+#define _GIO_READ_REG(pin, reg0, reg1, reg2, bval) \
+  do { \
+    register uint32 _reg; register int _pin; \
+    if ((pin) < 16) { _reg = (reg0); _pin = (pin); } \
+    else if ((pin) < 32) { _reg = (reg1); _pin = ((pin) - 16); } \
+    else { _reg = (reg2); _pin = ((pin) - 32); } \
+    bval = ((getreg16(_reg) & (1<<_pin)) != 0); \
+  }
+
+#define _GIO_SET_REG(pin, reg0, reg1, reg2) \
+  do { \
+    register uint32 _reg; register int _pin; \
+    if ((pin) < 16) { _reg = (reg0); _pin = (pin); } \
+    else if ((pin) < 32) { _reg = (reg1); _pin = ((pin) - 16); } \
+    else { _reg = (reg2); _pin = ((pin) - 32); } \
+    putreg16((getreg16(_reg) | (1 << _pin)), _reg)); \
+  } while (0)
+
+#define _GIO_CLEAR_REG(pin, reg0, reg1, reg2) \
+  do { \
+    register uint32 _reg; register int _pin; \
+    if ((pin) < 16) { _reg = (reg0); _pin = (pin); } \
+    else if ((pin) < 32) { _reg = (reg1); _pin = ((pin) - 16); } \
+    else { _reg = (reg2); _pin = ((pin) - 32); } \
+    putreg16((getreg16(_reg) & ~(1 << _pin)), _reg)); \
+  } while (0)
+
+/* Select GIO input or output */
+
+#define GIO_INPUT(pin) \
+  _GIO_SET_REG((pin), DM320_GIO_DIR0, DM320_GIO_DIR1, DM320_GIO_DIR2)
+#define GIO_OUTPUT(pin) \
+  _GIO_CLEAR_REG((pin), DM320_GIO_DIR0, DM320_GIO_DIR1, DM320_GIO_DIR2)
+
+/* Select inverted or non-inverted GIO */
+
+#define GIO_INVERTED(pin) \
+  _GIO_SET_REG((pin), DM320_GIO_INV0, DM320_GIO_INV1, DM320_GIO_INV2)
+#define GIO_NONINVERTED(pin) \
+  _GIO_CLEAR_REG((pin), DM320_GIO_INV0, DM320_GIO_INV1, DM320_GIO_INV2)
+
+/* Set and clear outputs */
+
+#define GIO_SET_OUTPUT(pin) \
+  _GIO_SET_REG((pin), DM320_GIO_BITSET0, DM320_GIO_BITSET1, DM320_GIO_BITSET2)
+#define GIO_CLEAR_OUTPUT(pin) \
+ _GIO_SET_REG((pin), DM320_GIO_BITCLR0, DM320_GIO_BITCLR1, DM320_GIO_BITCLR2)
+
+/* Read input */
+
+#define GIO_READ_INPUT(pin, bval) \
+  _GIO_READ_REG((pin), DM320_GIO_BITSET0, DM320_GIO_BITSET1, DM320_GIO_BITSET2, (bval))
+
+/* Configure GIO pins */
+
+#define _GIO_SET_CONFIG(reg, sh, val) \
+    putreg16(((getreg16(reg) & ~(3 << sh)) | (val << sh)), (reg))
+
+#define GIO_CONFIGURE(pin, val) \
+  do {\
+    if ((pin) < 10) _GIO_SET_CONFIG(DM320_GIO_FSEL0, 0, (val)); \
+    else if ((pin) < 17) _GIO_SET_CONFIG(DM320_GIO_FSEL0, 2*((pin)-9), (val)); \
+    else if ((pin) < 25) _GIO_SET_CONFIG(DM320_GIO_FSEL1, 2*((pin)-17), (val)); \
+    else if ((pin) < 33) _GIO_SET_CONFIG(DM320_GIO_FSEL2, 2*((pin)-25), (val)); \
+    else _GIO_SET_CONFIG(DM320_GIO_FSEL3, 2*((pin)-33), (val)); \
+  }
+
+/* Configure GIO interrupts (pins 1-15) */
+
+#define GIO_INTERRUPT(pin) \
+  if (pin < 16) putreg16((getreg16(DM320_GIO_IRQPORT) | (1<<(pin))), DM320_GIO_IRQPORT)
+#define GIO_NONINTERRUPT(pin) \
+  if (pin < 16) putreg16((getreg16(DM320_GIO_IRQPORT) & ~(1<<(pin))), DM320_GIO_IRQPORT)
+#define GIO_FALLINGEDGE(pin) \
+  if (pin < 16) { \
+    putreg16((getreg16(DM320_GIO_IRQEDGE) & ~(1<<(pin))), DM320_GIO_IRQEDGE) \
+    putreg16((getreg16(DM320_GIO_INV0) & ~(1<<(pin))), DM320_GIO_INV0); \
+  }
+#define GIO_RISINGEDGE(pin) \
+  if (pin < 16) { \
+    putreg16((getreg16(DM320_GIO_IRQEDGE) & ~(1<<(pin))), DM320_GIO_IRQEDGE); \
+    putreg16((getreg16(DM320_GIO_INV0) | (1<<(pin))), DM320_GIO_INV0); \
+  }
+#define GIO_BOTHEDGES(pin) \
+  if (pin < 16) { \
+    putreg16((getreg16(DM320_GIO_IRQEDGE) | (1<<(pin))), DM320_GIO_IRQEDGE); \
+    putreg16((getreg16(DM320_GIO_INV0) & ~(1<<(pin))), DM320_GIO_INV0); \
+  }
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#endif
+
+#endif  /* __DM320_GIO_H */
diff --git a/nuttx/arch/dm320/src/dm320.h b/nuttx/arch/dm320/src/dm320.h
index bb088feac..7bfb845c6 100644
--- a/nuttx/arch/dm320/src/dm320.h
+++ b/nuttx/arch/dm320/src/dm320.h
@@ -50,6 +50,7 @@
 #include "dm320-uart.h"
 #include "dm320-timer.h"
 #include "dm320-intc.h"
+#include "dm320-gio.h"
 
 /************************************************************************************
  * Definitions
diff --git a/nuttx/arch/dm320/src/ntosd.h b/nuttx/arch/dm320/src/ntosd.h
index 54dea9243..271e04726 100644
--- a/nuttx/arch/dm320/src/ntosd.h
+++ b/nuttx/arch/dm320/src/ntosd.h
@@ -50,11 +50,48 @@
 
 /* This platform has the ARM at 175 MHz and the DSP at 101.25 MHz */
 
-#define DM320_ARM_CLOCK 175500000
-#define DM320_SDR_CLOCK 101250000
-#define DM320_DSP_CLOCK 101250000
-#define DM320_AXL_CLOCK 175500000
-#define DM320_AHB_CLOCK  87750000
+#define DM320_ARM_CLOCK  175500000
+#define DM320_SDR_CLOCK  101250000
+#define DM320_DSP_CLOCK  101250000
+#define DM320_AXL_CLOCK  175500000
+#define DM320_AHB_CLOCK   87750000
+
+/*
+ * configration for dm9000 network device
+ */
+#define DM9000_BASE      CONFIG_DM9000_BASE
+
+/* GIO keyboard (GIO 1-5) */
+
+#define KEY_MASK         0x003E
+#define KEY_SCAN0_BIT    0x0002
+#define KEY_SCAN1_BIT    0x0004
+#define KEY_SCAN2_BIT    0x0008
+#define KEY_SCAN3_BIT    0x0010
+#define KEY_SCAN4_BIT    0x0020
+
+#define KEY_GIO_DIR0_VAL KEY_MASK     /* Configure as INPUT */
+#define KEY_GIO_INV0_VAL KEY_MASK     /* All inverted */
+#define KEY_GIO_SET0_VAL (0)          /* Initialized to zero */
+#define KEY_GIO_CLR0_VAL (0)
+
+#define GIO_KEY_SCAN0    1
+#define GIO_KEY_SCAN1    2
+#define GIO_KEY_SCAN2    3
+#define GIO_KEY_SCAN3    4
+#define GIO_KEY_SCAN4    5
+#define GIO_MS_DETECT    5
+#define GIO_MMC_DETECT   8
+#define GIO_CFC_DETECT   9
+#define GIO_VIDEO_IN     10
+#define GIO_LED_RED      16
+#define GIO_LED_GREEN    17
+#define GIO_CFC_ENABLE   25
+#define GIO_I2C_SCL      30
+#define GIO_I2C_SDA      31
+#define GIO_ENA_VIDEO    32
+#define GIO_CFC_RESET    36
+#define GIO_CFC_STSCHG   37
 
 /************************************************************************************
  * Inline Functions
diff --git a/nuttx/arch/dm320/src/up_assert.c b/nuttx/arch/dm320/src/up_assert.c
index 8080d8993..a69563ab0 100644
--- a/nuttx/arch/dm320/src/up_assert.c
+++ b/nuttx/arch/dm320/src/up_assert.c
@@ -50,6 +50,15 @@
  * Definitions
  ************************************************************/
 
+/* Output debug info if stack dump is selected -- even if 
+ * debug is not selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
 /************************************************************
  * Private Data
  ************************************************************/
diff --git a/nuttx/arch/dm320/src/up_dataabort.c b/nuttx/arch/dm320/src/up_dataabort.c
index 007d4acfc..219fc1229 100644
--- a/nuttx/arch/dm320/src/up_dataabort.c
+++ b/nuttx/arch/dm320/src/up_dataabort.c
@@ -48,6 +48,15 @@
  * Definitions
  ************************************************************/
 
+/* Output debug info if stack dump is selected -- even if 
+ * debug is not selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
 /************************************************************
  * Private Data
  ************************************************************/
diff --git a/nuttx/arch/dm320/src/up_doirq.c b/nuttx/arch/dm320/src/up_doirq.c
index 7f53f5eae..c1d8ef2d0 100644
--- a/nuttx/arch/dm320/src/up_doirq.c
+++ b/nuttx/arch/dm320/src/up_doirq.c
@@ -1,4 +1,4 @@
-/************************************************************
+/********************************************************************************
  * up_doirq.c
  *
  *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
@@ -31,72 +31,89 @@
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  *
- ************************************************************/
+ ********************************************************************************/
 
-/************************************************************
+/********************************************************************************
  * Included Files
- ************************************************************/
+ ********************************************************************************/
 
 #include <nuttx/config.h>
 #include <sys/types.h>
 #include <nuttx/irq.h>
 #include <nuttx/arch.h>
 #include <assert.h>
+#include <debug.h>
 #include "dm320.h"
 #include "os_internal.h"
 #include "up_internal.h"
 
-/************************************************************
+/********************************************************************************
  * Definitions
- ************************************************************/
+ ********************************************************************************/
 
-/************************************************************
+/********************************************************************************
  * Public Data
- ************************************************************/
+ ********************************************************************************/
 
-/************************************************************
+/********************************************************************************
  * Private Data
- ************************************************************/
+ ********************************************************************************/
 
-/************************************************************
+/********************************************************************************
  * Private Functions
- ************************************************************/
+ ********************************************************************************/
 
-/************************************************************
+/********************************************************************************
  * Public Funtions
- ************************************************************/
+ ********************************************************************************/
 
-void up_doirq(int irq, uint32* regs)
+void up_doirq(uint32* regs)
 {
 #ifdef CONFIG_SUPPRESS_INTERRUPTS
+  lib_lowprintf("Unexpected IRQ\n");
+  current_regs = regs;
   PANIC(OSERR_ERREXCEPTION);
 #else
-  if ((unsigned)irq < NR_IRQS)
+  /* Decode the interrupt.  First, fetch the interrupt id register. */
+
+  uint16 irqentry = getreg16(DM320_INTC_IRQENTRY0);
+
+  /* The irqentry value is an offset into a table.  Zero means no interrupt. */
+
+  if (irqentry != 0)
     {
-       /* Current regs non-zero indicates that we are processing
-        * an interrupt; current_regs is also used to manage
-        * interrupt level context switches.
-        */
+      /* If non-zero, then we can map the table offset into an IRQ number */
+
+      int irq = (irqentry >> 2) - 1;
+
+      /* Verify that the resulting IRQ number is valie */
+
+      if ((unsigned)irq < NR_IRQS)
+        {
+          /* Mask and acknowledge the interrupt */
 
-       current_regs = regs;
+          up_maskack_irq(irq);
 
-       /* Mask and acknowledge the interrupt */
+          /* Current regs non-zero indicates that we are processing an interrupt;
+           * current_regs is also used to manage interrupt level context switches.
+           */
 
-       up_maskack_irq(irq);
+          current_regs = regs;
 
-       /* Deliver the IRQ */
+          /* Deliver the IRQ */
 
-       irq_dispatch(irq, regs);
+          irq_dispatch(irq, regs);
 
-       /* Indicate that we are no long in an interrupt handler */
+          /* Indicate that we are no long in an interrupt handler */
 
-       current_regs = NULL;
+          current_regs = NULL;
 
-       /* Unmask the last interrupt (global interrupts are still
-        * disabled.
-        */
+          /* Unmask the last interrupt (global interrupts are still
+           * disabled.
+           */
 
-       up_enable_irq(irq);
+          up_enable_irq(irq);
+        }
     }
 #endif
 }
diff --git a/nuttx/arch/dm320/src/up_internal.h b/nuttx/arch/dm320/src/up_internal.h
index 58f341793..2c3461697 100644
--- a/nuttx/arch/dm320/src/up_internal.h
+++ b/nuttx/arch/dm320/src/up_internal.h
@@ -101,7 +101,7 @@ extern void up_boot(void);
 extern void up_copystate(uint32 *dest, uint32 *src);
 extern void up_dataabort(uint32 *regs);
 extern void up_delay(int milliseconds);
-extern void up_doirq(int irq, uint32* regs);
+extern void up_doirq(uint32* regs);
 extern void up_fullcontextrestore(uint32 *regs) __attribute__ ((noreturn));
 extern void up_irqinitialize(void);
 extern void up_prefetchabort(uint32 *regs);
diff --git a/nuttx/arch/dm320/src/up_prefetchabort.c b/nuttx/arch/dm320/src/up_prefetchabort.c
index b6c99fc25..5ce514be8 100644
--- a/nuttx/arch/dm320/src/up_prefetchabort.c
+++ b/nuttx/arch/dm320/src/up_prefetchabort.c
@@ -48,6 +48,15 @@
  * Definitions
  ************************************************************/
 
+/* Output debug info if stack dump is selected -- even if 
+ * debug is not selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
 /************************************************************
  * Private Data
  ************************************************************/
diff --git a/nuttx/arch/dm320/src/up_serial.c b/nuttx/arch/dm320/src/up_serial.c
index c34e2bb2f..fd843cc12 100644
--- a/nuttx/arch/dm320/src/up_serial.c
+++ b/nuttx/arch/dm320/src/up_serial.c
@@ -413,7 +413,7 @@ static int up_interrupt(int irq, void *context)
   struct uart_dev_s *dev = NULL;
   struct up_dev_s   *priv;
   uint16             status;
-  int                passes;
+  int                passes = 0;
 
   if (g_uart1port.irq == irq)
     {
diff --git a/nuttx/arch/dm320/src/up_syscall.c b/nuttx/arch/dm320/src/up_syscall.c
index edc09324a..b8f142720 100644
--- a/nuttx/arch/dm320/src/up_syscall.c
+++ b/nuttx/arch/dm320/src/up_syscall.c
@@ -39,6 +39,7 @@
 
 #include <nuttx/config.h>
 #include <sys/types.h>
+#include <debug.h>
 #include "dm320.h"
 #include "os_internal.h"
 #include "up_internal.h"
@@ -47,6 +48,15 @@
  * Definitions
  ************************************************************/
 
+/* Output debug info if stack dump is selected -- even if 
+ * debug is not selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
 /************************************************************
  * Private Data
  ************************************************************/
@@ -78,5 +88,7 @@
 
 void up_syscall(uint32 *regs)
 {
+  lldbg("Syscall from 0x%x\n", regs[REG_PC]);
+  current_regs = regs;
   PANIC(OSERR_ERREXCEPTION);
 }
diff --git a/nuttx/arch/dm320/src/up_timerisr.c b/nuttx/arch/dm320/src/up_timerisr.c
index 4fc4d0fc1..cfb472f25 100644
--- a/nuttx/arch/dm320/src/up_timerisr.c
+++ b/nuttx/arch/dm320/src/up_timerisr.c
@@ -140,12 +140,12 @@ void up_timerinit(void)
    * the rate MSEC_PER_TICK.
    */
 
-  putreg16(DM320_TMR0_PRSCL, DM320_TIMER1_TMPRSCL); /* Timer 0 Prescalar */
-  putreg16(DM320_TMR0_DIV, DM320_TIMER1_TMDIV);     /* Timer 0 Divisor (count) */
+  putreg16(DM320_TMR0_PRSCL, DM320_TIMER0_TMPRSCL); /* Timer 0 Prescalar */
+  putreg16(DM320_TMR0_DIV, DM320_TIMER0_TMDIV);     /* Timer 0 Divisor (count) */
 
   /* Start the timer */
 
-  putreg16(DM320_TMR0_MODE, DM320_TIMER1_TMMD); /* Timer 0 Mode */
+  putreg16(DM320_TMR0_MODE, DM320_TIMER0_TMMD); /* Timer 0 Mode */
 
   /* Attach and enable the timer interrupt */
 
diff --git a/nuttx/arch/dm320/src/up_undefinedinsn.c b/nuttx/arch/dm320/src/up_undefinedinsn.c
index 25c46b133..ff5489c90 100644
--- a/nuttx/arch/dm320/src/up_undefinedinsn.c
+++ b/nuttx/arch/dm320/src/up_undefinedinsn.c
@@ -46,6 +46,15 @@
  * Definitions
  ************************************************************/
 
+/* Output debug info if stack dump is selected -- even if 
+ * debug is not selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
 /************************************************************
  * Private Data
  ************************************************************/
@@ -64,5 +73,7 @@
 
 void up_undefinedinsn(uint32 *regs)
 {
+  lldbg("Undefined instruction at 0x%x\n", regs[REG_PC]);
+  current_regs = regs;
   PANIC(OSERR_UNDEFINEDINSN);
 }
diff --git a/nuttx/arch/dm320/src/up_vectors.S b/nuttx/arch/dm320/src/up_vectors.S
index 7c2751585..1da4dbb29 100644
--- a/nuttx/arch/dm320/src/up_vectors.S
+++ b/nuttx/arch/dm320/src/up_vectors.S
@@ -124,21 +124,10 @@ up_vectorirq:
 	add	r0, sp, #(4*REG_SP)	/* Offset to pc, cpsr storage */
 	stmia	r0, {r1-r4}
 
-	/* Now decode the interrupt.  First, fetch the interrupt id register. */
-
-	ldr	r1, =DM320_INTC_IRQENTRY0 /* Addr LS 16-bits of entry */
-	ldrh	r0, [r1]		/* LS 16-bits of entry */
-	movs	r0, r0, lsr #2		/* Convert to index (set Z) */
-	beq	.Lnoirqset		/* Exit if no IRQ set */
-
-	sub	r0, r0, #1		/* Otherwise, offset */
-
-	/* Then call the IRQ handler with interrupt disabled.
-	 * rq_dispatch(int irq, struct xcptcontext *xcp)
-	 */
+	/* Then call the IRQ handler with interrupts disabled. */
 
 	mov	fp, #0			/* Init frame pointer */
-	mov	r1, sp			/* Get r1=xcp */
+	mov	r0, sp			/* Get r1=xcp */
 	bl	up_doirq		/* Call the handler */
 
 	/* Restore the CPSR, SVC modr registers and return */