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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-02-26 16:55:39 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2011-02-26 16:55:39 +0000 |
commit | aebc66f8e146b28148f5e5755f6b3252774441f8 (patch) | |
tree | 92a85e68ccfe7771cb3684247ac04c4877fbe4e8 /nuttx/arch/hc/src/m9s12/m9s12_internal.h | |
parent | 11cdbe3e35d80775ba9887a995a1e3c124c7a063 (diff) | |
download | px4-nuttx-aebc66f8e146b28148f5e5755f6b3252774441f8.tar.gz px4-nuttx-aebc66f8e146b28148f5e5755f6b3252774441f8.tar.bz2 px4-nuttx-aebc66f8e146b28148f5e5755f6b3252774441f8.zip |
Finish m9s12 GPIO support
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3318 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch/hc/src/m9s12/m9s12_internal.h')
-rwxr-xr-x | nuttx/arch/hc/src/m9s12/m9s12_internal.h | 55 |
1 files changed, 32 insertions, 23 deletions
diff --git a/nuttx/arch/hc/src/m9s12/m9s12_internal.h b/nuttx/arch/hc/src/m9s12/m9s12_internal.h index 643627f30..e4aa1e36d 100755 --- a/nuttx/arch/hc/src/m9s12/m9s12_internal.h +++ b/nuttx/arch/hc/src/m9s12/m9s12_internal.h @@ -59,17 +59,18 @@ * * The GPIO configuration is represented by a 16-bit value encoded as follows: * - * xxII OUUR DMGG GPPP - * || |||| ||| `-Pin number - * || |||| || `- Port number - * || |||| | `- PIM Ports - * || |||| `- Direction - * || |||`- Reduced drive - * || ||`- Polarity - * || |`- Pull up (or down) - * || `- Wired OR open drain - * |`- Interrupt or rising/falling (polarity) - * `- Interrupt + * xIIO UURV DMGG GPPP + * ||| |||| ||| `-Pin number + * ||| |||| || `- Port number + * ||| |||| | `- PIM Ports + * ||| |||| `- Direction + * ||| |||`- Initial value of output + * ||| ||`- Reduced drive + * ||| |`- Polarity + * ||| `- Pull up (or down) + * ||`- Wired OR open drain + * |`- Interrupt or rising/falling (polarity) + * `- Interrupt * * NOTE: MEBI ports E and K can have special configurations as controlled by * the PEAR and MODE registers. Those special configurations are not managed @@ -79,7 +80,7 @@ /* Interrupts: * - * xxII xxxx xxxx xxxx + * xIIx xxxx xxxx xxxx * * For PIM ports G, H, and J. NOTE: If pull up/down is also selected, then * it must be consistent with the selected interrupt edge (because both are @@ -92,7 +93,7 @@ * GPIO_INPUT and an error if GPIO_OUTPUT is also specified) */ -#define GPIO_INT_SHIFT (12) +#define GPIO_INT_SHIFT (13) #define GPIO_INT_MASK (3 << GPIO_PULLUP_SHIFT) # define GPIO_INT_POLARITY (1 << GPIO_PULLUP_SHIFT) # define GPIO_INT_ENABLE (2 << GPIO_PULLUP_SHIFT) @@ -101,22 +102,22 @@ /* Wired OR open-drain: * - * xxxx Oxxx xxxx xxxx + * xxxO xxxx xxxx xxxx * * Only PIM ports S and L */ -#define GPIO_OPENDRAN (1 << 11) +#define GPIO_OPENDRAIN (1 << 12) /* Pull up (or down): * - * xxxx xUUx xxxx xxxx + * xxxx UUxx xxxx xxxx * * For PIM ports (T,S,G,H,J,L), selection is per-pin * For MEBI ports (A,B,E,K), selection is per-port, polarity is ignored */ -#define GPIO_PULLUP_SHIFT (9) +#define GPIO_PULLUP_SHIFT (10) #define GPIO_PULLUP_MASK (3 << GPIO_PULLUP_SHIFT) # define GPIO_PULL_POLARITY (1 << GPIO_PULLUP_SHIFT) # define GPIO_PULL_ENABLE (2 << GPIO_PULLUP_SHIFT) @@ -125,13 +126,25 @@ /* Reduced drive: * - * xxxx xxxR xxxx xxxx + * xxxx xxRx xxxx xxxx * * For PIM ports (T,S,G,H,J,L), selection is per-pin * For MEBI ports (A,B,E,K), selection is per-port */ -#define GPIO_REDUCED (1 << 8) +#define GPIO_REDUCED (1 << 9) + +/* Initial value of output: + * + * xxxx xxxV xxxx xxxx + * + * For PIM ports (T,S,G,H,J,L), selection is per-pin + * For MEBI ports (A,B,E,K), selection is per-port + */ + +#define GPIO_OUTPUT_VALUE (1 << 8) +#define GPIO_OUTPUT_LOW (0) +#define GPIO_OUTPUT_HIGH GPIO_OUTPUT_VALUE /* Data direction (All ports -- A,B,E,K,T,S,G,H,J,L) * @@ -212,11 +225,7 @@ extern "C" { * ************************************************************************************/ -#ifdef CONFIG_GPIO_IRQ EXTERN void hcs12_gpioirqinitialize(void); -#else -# define hcs12_gpioirqinitialize() -#endif /************************************************************************************ * Name: hcs12_configgpio |