summaryrefslogtreecommitdiff
path: root/nuttx/arch/mips/src/pic32mz
diff options
context:
space:
mode:
authorGregory Nutt <gnutt@nuttx.org>2015-03-01 09:08:44 -0600
committerGregory Nutt <gnutt@nuttx.org>2015-03-01 09:08:44 -0600
commit33ec7cbf43385276e741f1bdba6ea53d509bd006 (patch)
tree009127fc2e77e2a650cf16b9100f730c660bb8ac /nuttx/arch/mips/src/pic32mz
parenta983a4ab7c80c651121cc3a3971e02cd2672b21d (diff)
downloadpx4-nuttx-33ec7cbf43385276e741f1bdba6ea53d509bd006.tar.gz
px4-nuttx-33ec7cbf43385276e741f1bdba6ea53d509bd006.tar.bz2
px4-nuttx-33ec7cbf43385276e741f1bdba6ea53d509bd006.zip
PIC32MZ: Add ability to select flash ECC options
Diffstat (limited to 'nuttx/arch/mips/src/pic32mz')
-rw-r--r--nuttx/arch/mips/src/pic32mz/Kconfig10
-rw-r--r--nuttx/arch/mips/src/pic32mz/pic32mz-config.h11
-rw-r--r--nuttx/arch/mips/src/pic32mz/pic32mz-lowinit.c23
3 files changed, 38 insertions, 6 deletions
diff --git a/nuttx/arch/mips/src/pic32mz/Kconfig b/nuttx/arch/mips/src/pic32mz/Kconfig
index 76ea47282..b32b4b24a 100644
--- a/nuttx/arch/mips/src/pic32mz/Kconfig
+++ b/nuttx/arch/mips/src/pic32mz/Kconfig
@@ -364,6 +364,16 @@ config PIC32MZ_TRACE_ENABLE
---help---
Trace Enable
+config PIC32MZ_ECC_OPTION
+ int "PIC32 ECC control"
+ default 3
+ range 0 3
+ ---help---
+ 0: Flash ECC enabled (locked)
+ 1: Dynamic Flash ECC enabled (locked) */
+ 2: ECC / dynamic ECC disabled (locked) */
+ 3: ECC / dynamic ECC disabled (writable) */
+
endmenu
menu "Device Configuration 1 (DEVCFG1)"
diff --git a/nuttx/arch/mips/src/pic32mz/pic32mz-config.h b/nuttx/arch/mips/src/pic32mz/pic32mz-config.h
index 678a35677..0d356b6e7 100644
--- a/nuttx/arch/mips/src/pic32mz/pic32mz-config.h
+++ b/nuttx/arch/mips/src/pic32mz/pic32mz-config.h
@@ -438,9 +438,18 @@
# define CONFIG_PIC32MZ_BOOTISA DEVCFG0_BOOT_MIPS32
#endif
+#ifndef CONFIG_PIC32MZ_ECC_OPTION
+# define CONFIG_PIC32MZ_ECC_OPTION 3
+#endif
+#if CONFIG_PIC32MZ_ECC_OPTION < 0 || CONFIG_PIC32MZ_ECC_OPTION > 3
+# error Invalid CONFIG_PIC32MZ_ECC_OPTION Invalid
+# undef CONFIG_PIC32MZ_ECC_OPTION
+# define CONFIG_PIC32MZ_ECC_OPTION 3
+#endif
+#define CONFIG_PIC32MZ_FECCCON (CONFIG_PIC32MZ_ECC_OPTION << DEVCFG0_FECCCON_SHIFT)
+
/* Not yet configurable settings */
-#define CONFIG_PIC32MZ_FECCCON DEVCFG0_FECCCON_DISWR
#define CONFIG_PIC32MZ_FSLEEP DEVCFG0_FSLEEP_OFF
#define CONFIG_PIC32MZ_DBGPER DEVCFG0_DBGPER_ALL
#define CONFIG_PIC32MZ_EJTAGBEN DEVCFG0_EJTAG_NORMAL
diff --git a/nuttx/arch/mips/src/pic32mz/pic32mz-lowinit.c b/nuttx/arch/mips/src/pic32mz/pic32mz-lowinit.c
index 15534c37c..c8f2839c9 100644
--- a/nuttx/arch/mips/src/pic32mz/pic32mz-lowinit.c
+++ b/nuttx/arch/mips/src/pic32mz/pic32mz-lowinit.c
@@ -51,6 +51,7 @@
#include "chip/pic32mz-prefetch.h"
#include "chip/pic32mz-osc.h"
+#include "pic32mz-config.h"
#include "pic32mz-lowconsole.h"
#include "pic32mz-lowinit.h"
@@ -59,8 +60,12 @@
****************************************************************************/
/* Maximum Frequencies ******************************************************/
-#define MAX_FLASH_ECC_HZ 66000000 /* Maximum FLASH speed (Hz) with ECC */
-#define MAX_FLASH_NOECC_HZ 83000000 /* Maximum FLASH speed (Hz) without ECC */
+#if CONFIG_PIC32MZ_ECC_OPTION == 3
+# define MAX_FLASH_HZ 83000000 /* Maximum FLASH speed (Hz) without ECC */
+#else
+# define MAX_FLASH_HZ 66000000 /* Maximum FLASH speed (Hz) with ECC */
+#endif
+
#define MAX_PBCLK 100000000 /* Max peripheral bus speed (Hz) */
#define MAX_PBCLK7 200000000 /* Max peripheral bus speed (Hz) for PBCLK7 */
@@ -199,15 +204,23 @@ static inline void pic32mz_prefetch(void)
unsigned int residual;
uint32_t regval;
- /* Configure pre-fetch cache FLASH wait states (assuming ECC is enabled) */
+ /* Configure pre-fetch cache FLASH wait states (assuming ECC is enabled).
+ * REVISIT: Is this calculation right? It seems like residual should be
+ *
+ * residual = BOARD_CPU_CLOCK / nwaits
+ *
+ * This logic uses:
+ *
+ * BOARD_CPU_CLOCK - nwaits * MAX_FLASH_HZ
+ */
residual = BOARD_CPU_CLOCK;
nwaits = 0;
- while (residual > MAX_FLASH_ECC_HZ)
+ while (residual > MAX_FLASH_HZ)
{
nwaits++;
- residual -= MAX_FLASH_ECC_HZ;
+ residual -= MAX_FLASH_HZ;
}
DEBUGASSERT(nwaits < 8);