More trailing whilespace removal

46 files changed, 193 insertions, 194 deletions

diff --git a/nuttx/arch/z80/include/ez80/limits.h b/nuttx/arch/z80/include/ez80/limits.h
index 9e27b14e6..a049d37db 100644
--- a/nuttx/arch/z80/include/ez80/limits.h
+++ b/nuttx/arch/z80/include/ez80/limits.h
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_Z80_INCLUDE_EZ80_LIMITS_H 
-#define __ARCH_Z80_INCLUDE_EZ80_LIMITS_H 
+#ifndef __ARCH_Z80_INCLUDE_EZ80_LIMITS_H
+#define __ARCH_Z80_INCLUDE_EZ80_LIMITS_H
 
 /****************************************************************************
  * Included Files
diff --git a/nuttx/arch/z80/include/z180/chip.h b/nuttx/arch/z80/include/z180/chip.h
index 1127e4e00..9a1ba8098 100644
--- a/nuttx/arch/z80/include/z180/chip.h
+++ b/nuttx/arch/z80/include/z180/chip.h
@@ -270,7 +270,7 @@
  *   32 K ROM (185)
  *   1 Ch ESCC
  *   IEEE 1284 Bi-Directional Centronics Parallel Port
- *   7 or 24 Bits of I/O 
+ *   7 or 24 Bits of I/O
  */
 
 #elif defined(CONFIG_ARCH_CHIP_Z8019520FSG) ||    /* 100-pin QFP 20MHz 5V */ \
diff --git a/nuttx/arch/z80/include/z180/limits.h b/nuttx/arch/z80/include/z180/limits.h
index a70118448..283c10e33 100644
--- a/nuttx/arch/z80/include/z180/limits.h
+++ b/nuttx/arch/z80/include/z180/limits.h
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_Z80_INCLUDE_Z180_LIMITS_H 
-#define __ARCH_Z80_INCLUDE_Z180_LIMITS_H 
+#ifndef __ARCH_Z80_INCLUDE_Z180_LIMITS_H
+#define __ARCH_Z80_INCLUDE_Z180_LIMITS_H
 
 /****************************************************************************
  * Included Files
diff --git a/nuttx/arch/z80/include/z8/irq.h b/nuttx/arch/z80/include/z8/irq.h
index 3a0c75900..d1ceef7fd 100644
--- a/nuttx/arch/z80/include/z8/irq.h
+++ b/nuttx/arch/z80/include/z8/irq.h
@@ -198,7 +198,7 @@
 
 #  define NR_IRQS          (29)
 
-#endif 
+#endif
 
 #define Z8_IRQ_SYSTIMER Z8_TIMER0_IRQ
 
diff --git a/nuttx/arch/z80/include/z8/limits.h b/nuttx/arch/z80/include/z8/limits.h
index 724d8c98d..d71360bac 100644
--- a/nuttx/arch/z80/include/z8/limits.h
+++ b/nuttx/arch/z80/include/z8/limits.h
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_Z80_INCLUDE_Z8_LIMITS_H 
-#define __ARCH_Z80_INCLUDE_Z8_LIMITS_H 
+#ifndef __ARCH_Z80_INCLUDE_Z8_LIMITS_H
+#define __ARCH_Z80_INCLUDE_Z8_LIMITS_H
 
 /****************************************************************************
  * Included Files
diff --git a/nuttx/arch/z80/include/z80/limits.h b/nuttx/arch/z80/include/z80/limits.h
index f1a1c1e17..dc9e0a70c 100644
--- a/nuttx/arch/z80/include/z80/limits.h
+++ b/nuttx/arch/z80/include/z80/limits.h
@@ -33,8 +33,8 @@
  *
  ****************************************************************************/
 
-#ifndef __ARCH_Z80_INCLUDE_Z80_LIMITS_H 
-#define __ARCH_Z80_INCLUDE_Z80_LIMITS_H 
+#ifndef __ARCH_Z80_INCLUDE_Z80_LIMITS_H
+#define __ARCH_Z80_INCLUDE_Z80_LIMITS_H
 
 /****************************************************************************
  * Included Files
diff --git a/nuttx/arch/z80/src/Makefile.sdccl b/nuttx/arch/z80/src/Makefile.sdccl
index 44c3376c8..c444690e7 100644
--- a/nuttx/arch/z80/src/Makefile.sdccl
+++ b/nuttx/arch/z80/src/Makefile.sdccl
@@ -130,7 +130,7 @@ asm_mem.h:
 libarch$(LIBEXT): asm_mem.h $(OBJS)
 	$(call ARCHIVE, $@, $(OBJS))
 
-# This builds the libboard library in the board/ subdirectory 
+# This builds the libboard library in the board/ subdirectory
 
 board/libboard$(LIBEXT):
 	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
diff --git a/nuttx/arch/z80/src/Makefile.sdccw b/nuttx/arch/z80/src/Makefile.sdccw
index dbf437b48..79e1b002e 100644
--- a/nuttx/arch/z80/src/Makefile.sdccw
+++ b/nuttx/arch/z80/src/Makefile.sdccw
@@ -130,7 +130,7 @@ asm_mem.h:
 libarch$(LIBEXT): asm_mem.h $(OBJS)
 	$(call ARCHIVE, $@, $(OBJS))
 
-# This builds the libboard library in the board\ subdirectory 
+# This builds the libboard library in the board\ subdirectory
 
 board\libboard$(LIBEXT):
 	$(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES)
diff --git a/nuttx/arch/z80/src/common/up_assert.c b/nuttx/arch/z80/src/common/up_assert.c
index 9bdd5cdf5..55561db33 100644
--- a/nuttx/arch/z80/src/common/up_assert.c
+++ b/nuttx/arch/z80/src/common/up_assert.c
@@ -62,7 +62,7 @@
 #  undef CONFIG_ARCH_USBDUMP
 #endif
 
-/* Output debug info if stack dump is selected -- even if 
+/* Output debug info if stack dump is selected -- even if
  * debug is not selected.
  */
 
diff --git a/nuttx/arch/z80/src/common/up_blocktask.c b/nuttx/arch/z80/src/common/up_blocktask.c
index 875c0602c..418a09cc0 100644
--- a/nuttx/arch/z80/src/common/up_blocktask.c
+++ b/nuttx/arch/z80/src/common/up_blocktask.c
@@ -133,7 +133,7 @@ void up_block_task(FAR struct tcb_s *tcb, tstate_t task_state)
 
           SAVE_IRQCONTEXT(rtcb);
 
-          /* Restore the exception context of the rtcb at the (new) head 
+          /* Restore the exception context of the rtcb at the (new) head
            * of the g_readytorun task list.
            */
 
@@ -154,7 +154,7 @@ void up_block_task(FAR struct tcb_s *tcb, tstate_t task_state)
 
       else if (!SAVE_USERCONTEXT(rtcb))
         {
-          /* Restore the exception context of the rtcb at the (new) head 
+          /* Restore the exception context of the rtcb at the (new) head
            * of the g_readytorun task list.
            */
 
diff --git a/nuttx/arch/z80/src/common/up_createstack.c b/nuttx/arch/z80/src/common/up_createstack.c
index 4e4c458e8..1a058ec50 100644
--- a/nuttx/arch/z80/src/common/up_createstack.c
+++ b/nuttx/arch/z80/src/common/up_createstack.c
@@ -114,7 +114,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
     }
 
   /* Do we need to allocate a new stack? */
- 
+
   if (!tcb->stack_alloc_ptr)
     {
       /* Allocate the stack.  If DEBUG is enabled (but not stack debug),
diff --git a/nuttx/arch/z80/src/common/up_releasepending.c b/nuttx/arch/z80/src/common/up_releasepending.c
index 7e9eb9f18..81a2f2413 100644
--- a/nuttx/arch/z80/src/common/up_releasepending.c
+++ b/nuttx/arch/z80/src/common/up_releasepending.c
@@ -100,7 +100,7 @@ void up_release_pending(void)
 
            SAVE_IRQCONTEXT(rtcb);
 
-          /* Restore the exception context of the rtcb at the (new) head 
+          /* Restore the exception context of the rtcb at the (new) head
            * of the g_readytorun task list.
            */
 
@@ -116,13 +116,13 @@ void up_release_pending(void)
 
       /* Copy the exception context into the TCB of the task that
        * was currently active. if SAVE_USERCONTEXT returns a non-zero
-       * value, then this is really the previously running task 
+       * value, then this is really the previously running task
        * restarting!
        */
 
       else if (!SAVE_USERCONTEXT(rtcb))
         {
-          /* Restore the exception context of the rtcb at the (new) head 
+          /* Restore the exception context of the rtcb at the (new) head
            * of the g_readytorun task list.
            */
 
diff --git a/nuttx/arch/z80/src/common/up_reprioritizertr.c b/nuttx/arch/z80/src/common/up_reprioritizertr.c
index a5b3a18c8..0f0ca2fb6 100644
--- a/nuttx/arch/z80/src/common/up_reprioritizertr.c
+++ b/nuttx/arch/z80/src/common/up_reprioritizertr.c
@@ -72,7 +72,7 @@
  *
  * Description:
  *   Called when the priority of a running or
- *   ready-to-run task changes and the reprioritization will 
+ *   ready-to-run task changes and the reprioritization will
  *   cause a context switch.  Two cases:
  *
  *   1) The priority of the currently running task drops and the next
@@ -155,7 +155,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
 
                SAVE_IRQCONTEXT(rtcb);
 
-              /* Restore the exception context of the rtcb at the (new) head 
+              /* Restore the exception context of the rtcb at the (new) head
                * of the g_readytorun task list.
                */
 
@@ -176,7 +176,7 @@ void up_reprioritize_rtr(FAR struct tcb_s *tcb, uint8_t priority)
 
           else if (!SAVE_USERCONTEXT(rtcb))
             {
-              /* Restore the exception context of the rtcb at the (new) head 
+              /* Restore the exception context of the rtcb at the (new) head
                * of the g_readytorun task list.
                */
 
diff --git a/nuttx/arch/z80/src/common/up_stackdump.c b/nuttx/arch/z80/src/common/up_stackdump.c
index 6cb85dd38..21707889b 100644
--- a/nuttx/arch/z80/src/common/up_stackdump.c
+++ b/nuttx/arch/z80/src/common/up_stackdump.c
@@ -50,7 +50,7 @@
  * Definitions
  ****************************************************************************/
 
-/* Output debug info if stack dump is selected -- even if 
+/* Output debug info if stack dump is selected -- even if
  * debug is not selected.
  */
 
diff --git a/nuttx/arch/z80/src/common/up_stackframe.c b/nuttx/arch/z80/src/common/up_stackframe.c
index fdc43a850..1db0bf470 100644
--- a/nuttx/arch/z80/src/common/up_stackframe.c
+++ b/nuttx/arch/z80/src/common/up_stackframe.c
@@ -114,7 +114,7 @@ FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size)
   /* Align the frame_size */
 
   frame_size = STACK_ALIGN_UP(frame_size);
-  
+
   /* Is there already a stack allocated? Is it big enough? */
 
   if (!tcb->stack_alloc_ptr || tcb->adj_stack_size <= frame_size)
diff --git a/nuttx/arch/z80/src/common/up_unblocktask.c b/nuttx/arch/z80/src/common/up_unblocktask.c
index e6141d4fc..6c46b0a14 100644
--- a/nuttx/arch/z80/src/common/up_unblocktask.c
+++ b/nuttx/arch/z80/src/common/up_unblocktask.c
@@ -114,7 +114,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
       /* The currently active task has changed! We need to do
        * a context switch to the new task.
        *
-       * Are we in an interrupt handler? 
+       * Are we in an interrupt handler?
        */
 
       if (IN_INTERRUPT())
@@ -125,7 +125,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
 
           SAVE_IRQCONTEXT(rtcb);
 
-          /* Restore the exception context of the rtcb at the (new) head 
+          /* Restore the exception context of the rtcb at the (new) head
            * of the g_readytorun task list.
            */
 
@@ -140,7 +140,7 @@ void up_unblock_task(FAR struct tcb_s *tcb)
         }
 
       /* We are not in an interrupt handler.  Copy the user C context
-       * into the TCB of the task that was previously active.  if 
+       * into the TCB of the task that was previously active.  if
        * SAVE_USERCONTEXT returns a non-zero value, then this is really the
        * previously running task restarting!
        */
diff --git a/nuttx/arch/z80/src/ez80/Make.defs b/nuttx/arch/z80/src/ez80/Make.defs
index fb2b3d48f..271ff0f9d 100644
--- a/nuttx/arch/z80/src/ez80/Make.defs
+++ b/nuttx/arch/z80/src/ez80/Make.defs
@@ -36,7 +36,7 @@
 HEAD_ASRC	= ez80_vectors.asm
 HEAD_SSRC	=
 
-CMN_SSRCS	= 
+CMN_SSRCS	=
 CMN_CSRCS	= up_initialize.c up_allocateheap.c up_createstack.c \
 		  up_releasestack.c up_interruptcontext.c up_blocktask.c \
 		  up_unblocktask.c up_exit.c up_releasepending.c \
@@ -49,7 +49,7 @@ ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
 CHIP_ASRCS	+= ez80f91_init.asm
 endif
 
-CHIP_SSRCS	= 
+CHIP_SSRCS	=
 CHIP_CSRCS	= ez80_clock.c ez80_initialstate.c ez80_irq.c ez80_copystate.c \
 		  ez80_schedulesigaction.c ez80_sigdeliver.c ez80_timerisr.c \
 		  ez80_lowuart.c ez80_serial.c ez80_spi.c ez80_i2c.c \
diff --git a/nuttx/arch/z80/src/ez80/ez80_emac.c b/nuttx/arch/z80/src/ez80/ez80_emac.c
index 727003677..4957a5bd8 100644
--- a/nuttx/arch/z80/src/ez80/ez80_emac.c
+++ b/nuttx/arch/z80/src/ez80/ez80_emac.c
@@ -470,7 +470,7 @@ static void ez80emac_miiwrite(FAR struct ez80emac_driver_s *priv, uint8_t offset
 static uint16_t ez80emac_miiread(FAR struct ez80emac_driver_s *priv, uint32_t offset)
 {
   uint8_t regval;
-  
+
   /* Wait for any preceding MII management operation to complete */
 
   ez80emac_waitmiibusy();
@@ -613,7 +613,7 @@ static int ez80emac_miiconfigure(FAR struct ez80emac_driver_s *priv)
    ndbg("Configure autonegotiation\n");
    if (bauto)
     {
-      ez80emac_miiwrite(priv, MII_ADVERTISE, 
+      ez80emac_miiwrite(priv, MII_ADVERTISE,
                         MII_ADVERTISE_100BASETXFULL|MII_ADVERTISE_100BASETXHALF|
                         MII_ADVERTISE_10BASETXFULL|MII_ADVERTISE_10BASETXHALF|
                         MII_ADVERTISE_CSMA);
@@ -1177,7 +1177,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
    * RxDMA reads the next two bytes from the RxFIFO and writes them into
    * the Rx descriptor status LSB and MSB. The packet length counter is
    * stored into the descriptor table packet length field, the descriptor
-   * table next pointer is written into the Rx descriptor table and finally 
+   * table next pointer is written into the Rx descriptor table and finally
    * the Rx_DONE_STAT bit in the EMAC Interrupt Status Register register is
    * set to 1.
    */
@@ -1223,7 +1223,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv)
         {
           int nbytes = (int)((FAR uint8_t*)priv->rxendp1 - (FAR uint8_t*)psrc);
           nvdbg("RX wraps after %d bytes\n", nbytes + SIZEOF_EMACSDESC);
- 
+
           memcpy(pdest, psrc, nbytes);
           memcpy(&pdest[nbytes], priv->rxstart, pktlen - nbytes);
         }
@@ -1383,7 +1383,7 @@ static int ez80emac_txinterrupt(int irq, FAR void *context)
         }
     }
 
-  /* Save the new head.  If it is NULL, then we have read all the way to 
+  /* Save the new head.  If it is NULL, then we have read all the way to
    * the terminating description with np==NULL.
    */
 
@@ -1616,7 +1616,7 @@ static void ez80emac_polltimer(int argc, uint32_t arg, ...)
  *
  * Description:
  *   NuttX Callback: Bring up the Ethernet interface when an IP address is
- *   provided 
+ *   provided
  *
  * Parameters:
  *   dev  - Reference to the NuttX driver state structure
@@ -1760,7 +1760,7 @@ static int ez80emac_ifdown(struct uip_driver_s *dev)
  * Function: ez80emac_txavail
  *
  * Description:
- *   Driver callback invoked when new TX data is available.  This is a 
+ *   Driver callback invoked when new TX data is available.  This is a
  *   stimulus perform an out-of-cycle poll and, thereby, reduce the TX
  *   latency.
  *
@@ -1807,7 +1807,7 @@ static int ez80emac_txavail(struct uip_driver_s *dev)
  *
  * Parameters:
  *   dev  - Reference to the NuttX driver state structure
- *   mac  - The MAC address to be added 
+ *   mac  - The MAC address to be added
  *
  * Returned Value:
  *   None
@@ -1837,7 +1837,7 @@ static int ez80emac_addmac(struct uip_driver_s *dev, FAR const uint8_t *mac)
  *
  * Parameters:
  *   dev  - Reference to the NuttX driver state structure
- *   mac  - The MAC address to be removed 
+ *   mac  - The MAC address to be removed
  *
  * Returned Value:
  *   None
@@ -1885,12 +1885,12 @@ static int ez80_emacinitialize(void)
   outp(EZ80_EMAC_RST, 0);        /* Reset everything */
   outp(EZ80_EMAC_RST, 0xff);
   outp(EZ80_EMAC_RST, 0);
-  
+
   /* The ez80 has a fixed 8kb of EMAC SRAM memory (+ 8kb of
    * general purpose SRAM) located in the high address space.
    * Configure the GP and EMAC SRAM
    */
- 
+
   outp(EZ80_RAM_CTL, (RAMCTL_ERAMEN|RAMCTL_GPRAMEN));
   outp(EZ80_RAM_ADDR_U, (CONFIG_EZ80_RAMADDR >> 16));
   outp(EZ80_EMAC_BP_U, (CONFIG_EZ80_RAMADDR >> 16));
@@ -2014,7 +2014,7 @@ static int ez80_emacinitialize(void)
   outp(EZ80_EMAC_CFG3, EMAC_RETRY);
 
   /* EMAC_CFG4_TXFC - Pause control frames are allowed to be transmitted
-   * EMAC_CFG4_RXFC - Act on received pause control frames 
+   * EMAC_CFG4_RXFC - Act on received pause control frames
    */
 
   outp(EZ80_EMAC_CFG4, EMAC_CFG4_TXFC|EMAC_CFG4_RXFC);
diff --git a/nuttx/arch/z80/src/ez80/ez80_i2c.c b/nuttx/arch/z80/src/ez80/ez80_i2c.c
index 83942a542..329892d16 100644
--- a/nuttx/arch/z80/src/ez80/ez80_i2c.c
+++ b/nuttx/arch/z80/src/ez80/ez80_i2c.c
@@ -261,7 +261,7 @@ static uint16_t i2c_getccr(uint32_t fscl)
        fscl  = ftmp;
        n     = 7;
      }
-  
+
   /* Finally, get M:
    *
    *   M = (fsamp / 10) / fscl - 1 = ftmp / fscl - 1
@@ -340,7 +340,7 @@ static void i2c_clriflg(void)
  *   None
  *
  ****************************************************************************/
- 
+
 static void i2c_start(void)
 {
   uint8_t regval  = inp(EZ80_I2C_CTL);
@@ -362,7 +362,7 @@ static void i2c_start(void)
  *   None
  *
  ****************************************************************************/
- 
+
 static void i2c_stop(void)
 {
   uint8_t regval  = inp(EZ80_I2C_CTL);
@@ -382,11 +382,11 @@ static void i2c_stop(void)
  *
  * Returned Value:
  *   0: Success, IFLG is set and DATA can be sent or received.
- 
+
  *   Or <0: Negated error value.  IFLG is cleared.
  *
  *   -EIO: Irrecoverable (or unexpected) error occured
- *   -EAGAIN: And 
+ *   -EAGAIN: And
  *
  ****************************************************************************/
 
@@ -420,7 +420,7 @@ static int i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
 
       outp(EZ80_I2C_DR, (uint8_t)I2C_ADDR8(priv->addr) | readbit);
       i2c_clriflg();
- 
+
       /* And wait for the address transfer to complete */
 
       sr = i2c_waitiflg();
@@ -659,7 +659,7 @@ static int i2c_write(FAR struct i2c_dev_s *dev, const uint8_t *buffer, int bufle
               if (sr == I2C_SR_ARBLOST1)
                 {
                    /* Arbitration lost, break out of the inner loop and
-                    * try sending the message again 
+                    * try sending the message again
                     */
 
                    break;
@@ -745,7 +745,7 @@ static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
 
   /* Retry as necessary to receive the whole message */
 
-  for (retry = 0; retry < 100; retry++)    
+  for (retry = 0; retry < 100; retry++)
     {
       /* Enter MASTER TRANSMIT mode by setting the STA bit in the I2C_CTL
        * register to 1. The I2C then tests the I2C bus and transmits a START
@@ -784,7 +784,7 @@ static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
               /* If the AAK bit is cleared to 0 during a transfer, the I2C
                * transmits a NACK bit after the next byte is received.
                */
-             
+
               regval &= ~I2C_CTL_AAK;
             }
           else
@@ -798,7 +798,7 @@ static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
             }
           outp(EZ80_I2C_CTL, regval);
 
-          /* Wait for IFLG to be set meaning that incoming data is 
+          /* Wait for IFLG to be set meaning that incoming data is
            * available in the I2C_DR registers.
            */
 
@@ -851,7 +851,7 @@ static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
             i2c_clriflg();
             break;
           }
-          
+
         /* Unexpected status response */
 
         else
@@ -881,7 +881,7 @@ failure:
  * Description:
  *   Initialize the selected I2C port. And return a unique instance of struct
  *   struct i2c_dev_s.  This function may be called to obtain multiple
- *   instances of the interface, each of which may be set up with a 
+ *   instances of the interface, each of which may be set up with a
  *   different frequency and slave address.
  *
  * Input Parameter:
@@ -897,7 +897,7 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
   FAR struct ez80_i2cdev_s *i2c;
   uint16_t ccr;
   uint8_t  regval;
- 
+
   if (!g_initialized)
     {
       /* Set up some initial BRG value */
@@ -906,7 +906,7 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
       i2c_setccr(ccr);
 
       /* No GPIO setup is required -- I2C pints, SCL/SDA are not multiplexed */
-  
+
       /* This semaphore enforces serialized access for I2C transfers */
 
       sem_init(&g_i2csem, 0, 1);
@@ -929,4 +929,4 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
       i2c->ccr = g_currccr;
     }
   return (FAR struct i2c_dev_s *)i2c;
-} 
+}
diff --git a/nuttx/arch/z80/src/ez80/ez80_irq.c b/nuttx/arch/z80/src/ez80/ez80_irq.c
index 604e5c5b3..19c29b45d 100644
--- a/nuttx/arch/z80/src/ez80/ez80_irq.c
+++ b/nuttx/arch/z80/src/ez80/ez80_irq.c
@@ -78,7 +78,7 @@ volatile chipreg_t *current_regs;
 void up_irqinitialize(void)
 {
   current_regs = NULL;
-  
+
   /* And finally, enable interrupts */
 
 #ifndef CONFIG_SUPPRESS_INTERRUPTS
diff --git a/nuttx/arch/z80/src/ez80/ez80_registerdump.c b/nuttx/arch/z80/src/ez80/ez80_registerdump.c
index bf53f81f7..82c8cc8ad 100644
--- a/nuttx/arch/z80/src/ez80/ez80_registerdump.c
+++ b/nuttx/arch/z80/src/ez80/ez80_registerdump.c
@@ -52,7 +52,7 @@
  * Definitions
  ****************************************************************************/
 
-/* Output debug info if stack dump is selected -- even if 
+/* Output debug info if stack dump is selected -- even if
  * debug is not selected.
  */
 
diff --git a/nuttx/arch/z80/src/ez80/ez80_serial.c b/nuttx/arch/z80/src/ez80/ez80_serial.c
index a178ecb19..06ca2753e 100644
--- a/nuttx/arch/z80/src/ez80/ez80_serial.c
+++ b/nuttx/arch/z80/src/ez80/ez80_serial.c
@@ -560,7 +560,7 @@ static void ez80_rxint(struct uart_dev_s *dev, bool enable)
 {
   struct ez80_dev_s *priv = (struct ez80_dev_s*)dev->priv;
   uint8_t ier = ez80_serialin(priv, EZ80_UART_IER);
-  
+
   if (enable)
     {
 #ifndef CONFIG_SUPPRESS_SERIAL_INTS
@@ -766,7 +766,7 @@ int up_putc(int ch)
   ez80_serialout(priv, EZ80_UART_THR, (uint8_t)ch);
 
   /* Wait for the character to be sent before re-enabling interrupts */
- 
+
   ez80_waittxready(priv);
   ez80_restoreuartint(priv, ier);
   return ch;
diff --git a/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c b/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c
index 7280835d1..0f2409b9c 100644
--- a/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c
+++ b/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c
@@ -105,7 +105,7 @@ void up_sigdeliver(void)
   regs[XCPT_I]  = rtcb->xcp.saved_i;
 
   /* Get a local copy of the sigdeliver function pointer.  We do this so
-   * that we can nullify the sigdeliver function pointer in the TCB and 
+   * that we can nullify the sigdeliver function pointer in the TCB and
    * accept more signal deliveries while processing the current pending
    * signals.
    */
diff --git a/nuttx/arch/z80/src/ez80/ez80_spi.c b/nuttx/arch/z80/src/ez80/ez80_spi.c
index 260bdc777..8a6eab663 100644
--- a/nuttx/arch/z80/src/ez80/ez80_spi.c
+++ b/nuttx/arch/z80/src/ez80/ez80_spi.c
@@ -174,7 +174,7 @@ static uint32_t spi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency)
    *
    *   BRG >= System Clock Frequency / (2 * SPIR)
    */
- 
+
   uint32_t brg = ((EZ80_SYS_CLK_FREQ+1)/2 + frequency - 1) / frequency;
 
   /* "When configured as a Master, the 16-bit divisor value must be between
diff --git a/nuttx/arch/z80/src/ez80/ez80_timerisr.c b/nuttx/arch/z80/src/ez80/ez80_timerisr.c
index d29237e54..3cb3d029d 100644
--- a/nuttx/arch/z80/src/ez80/ez80_timerisr.c
+++ b/nuttx/arch/z80/src/ez80/ez80_timerisr.c
@@ -79,7 +79,7 @@ int up_timerisr(int irq, chipreg_t *regs)
   volatile uint8_t reg;
 
   /* Read the appropropriate timer0 registr to clear the interrupt */
-  
+
 #ifdef _EZ80F91
   reg = inp(EZ80_TMR0_IIR);
 #else
@@ -91,7 +91,7 @@ int up_timerisr(int irq, chipreg_t *regs)
   /* Process timer interrupt */
 
   sched_process_timer();
-   
+
  /* Architecture specific hook into the timer interrupt handler */
 
 #ifdef CONFIG_ARCH_TIMERHOOK
@@ -147,7 +147,7 @@ void up_timerinit(void)
   outp(EZ80_TMR0_RRL, (uint8_t)(reload));
 
   /* Clear any pending timer interrupts */
-  
+
 #if defined(_EZ80F91)
   reg = inp(EZ80_TMR0_IIR);
 #elif defined(_EZ80L92) || defined(_EZ80F92) ||defined(_EZ80F93)
diff --git a/nuttx/arch/z80/src/ez80/ez80_vectors.asm b/nuttx/arch/z80/src/ez80/ez80_vectors.asm
index eaec4b36f..107b570c4 100644
--- a/nuttx/arch/z80/src/ez80/ez80_vectors.asm
+++ b/nuttx/arch/z80/src/ez80/ez80_vectors.asm
@@ -137,71 +137,71 @@ _nmi:
 					; Symbol           Val VecNo Addr
 					;----------------- --- ----- -----
 _ez80_handlers:
-	irqhandler	 0		; EZ80_EMACRX_IRQ   0    0   0x040   
+	irqhandler	 0		; EZ80_EMACRX_IRQ   0    0   0x040
 	handlersize equ $-_ez80handlers
-	irqhandler	 1		; EZ80_EMACTX_IRQ   1    1   0x044   
-	irqhandler	 2		; EZ80_EMACSYS_IRQ  2    2   0x048   
-	irqhandler	 3		; EZ80_PLL_IRQ      3    3   0x04c   
-	irqhandler	 4		; EZ80_FLASH_IRQ    4    4   0x050   
-	irqhandler	 5		; EZ80_TIMER0_IRQ   5    5   0x054   
-	irqhandler	 6		; EZ80_TIMER1_IRQ   6    6   0x058   
-	irqhandler	 7		; EZ80_TIMER2_IRQ   7    7   0x05c   
-	irqhandler	 8		; EZ80_TIMER3_IRQ   8    8   0x060   
-	irqhandler	EZ80_UNUSED	;                        9   0x064   
-	irqhandler	EZ80_UNUSED+1	;                       10   0x068   
-	irqhandler	 9		; EZ80_RTC_IRQ      9   11   0x06C   
-	irqhandler	10		; EZ80_UART0_IRQ   10   12   0x070   
-	irqhandler	11		; EZ80_UART1_IRQ   11   13   0x074   
-	irqhandler	12		; EZ80_I2C_IRQ     12   14   0x078   
-	irqhandler	13		; EZ80_SPI_IRQ     13   15   0x07c   
-	irqhandler	14		; EZ80_PORTA0_IRQ  14   16   0x080   
-	irqhandler	15		; EZ80_PORTA1_IRQ  15   17   0x084   
-	irqhandler	16		; EZ80_PORTA2_IRQ  16   18   0x088   
-	irqhandler	17		; EZ80_PORTA3_IRQ  17   19   0x08c   
-	irqhandler	18		; EZ80_PORTA4_IRQ  18   20   0x090   
-	irqhandler	19		; EZ80_PORTA5_IRQ  19   21   0x094   
-	irqhandler	20		; EZ80_PORTA6_IRQ  20   22   0x098   
-	irqhandler	21		; EZ80_PORTA7_IRQ  21   23   0x09c   
-	irqhandler	22		; EZ80_PORTB0_IRQ  22   24   0x0a0   
-	irqhandler	23		; EZ80_PORTB1_IRQ  23   25   0x0a4   
-	irqhandler	24		; EZ80_PORTB2_IRQ  24   26   0x0a8   
-	irqhandler	25		; EZ80_PORTB3_IRQ  25   27   0x0ac   
-	irqhandler	26		; EZ80_PORTB4_IRQ  26   28   0x0b0   
-	irqhandler	27		; EZ80_PORTB5_IRQ  27   29   0x0b4   
-	irqhandler	28		; EZ80_PORTB6_IRQ  28   20   0x0b8   
-	irqhandler	29		; EZ80_PORTB7_IRQ  29   21   0x0bc   
-	irqhandler	30		; EZ80_PORTC0_IRQ  30   22   0x0c0   
-	irqhandler	31		; EZ80_PORTC1_IRQ  31   23   0x0c4   
-	irqhandler	32		; EZ80_PORTC2_IRQ  32   24   0x0c8   
-	irqhandler	33		; EZ80_PORTC3_IRQ  33   25   0x0cc   
-	irqhandler	34		; EZ80_PORTC4_IRQ  34   26   0x0d0   
-	irqhandler	35		; EZ80_PORTC5_IRQ  35   27   0x0d4   
-	irqhandler	36		; EZ80_PORTC6_IRQ  36   28   0x0d8   
-	irqhandler	37		; EZ80_PORTC7_IRQ  37   29   0x0dc   
-	irqhandler	38		; EZ80_PORTD0_IRQ  38   40   0x0e0   
-	irqhandler	39		; EZ80_PORTD1_IRQ  39   41   0x0e4   
-	irqhandler	40		; EZ80_PORTD2_IRQ  40   42   0x0e8   
-	irqhandler	41		; EZ80_PORTD3_IRQ  41   43   0x0ec   
-	irqhandler	42		; EZ80_PORTD4_IRQ  42   44   0x0f0   
-	irqhandler	43		; EZ80_PORTD5_IRQ  43   45   0x0f4   
-	irqhandler	44		; EZ80_PORTD6_IRQ  44   46   0x0f8   
-	irqhandler	45		; EZ80_PORTD7_IRQ  45   47   0x0fc   
-	irqhandler	EZ80_UNUSED+1	;                       48   0x100   
-	irqhandler	EZ80_UNUSED+2	;                       49   0x104   
-	irqhandler	EZ80_UNUSED+3	;                       50   0x108   
-	irqhandler	EZ80_UNUSED+4	;                       51   0x10c   
-	irqhandler	EZ80_UNUSED+5	;                       52   0x110   
-	irqhandler	EZ80_UNUSED+6	;                       53   0x114   
-	irqhandler	EZ80_UNUSED+7	;                       54   0x118   
-	irqhandler	EZ80_UNUSED+8	;                       55   0x11c   
-	irqhandler	EZ80_UNUSED+9	;                       56   0x120   
-	irqhandler	EZ80_UNUSED+10	;                       57   0x124   
-	irqhandler	EZ80_UNUSED+11	;                       58   0x128   
-	irqhandler	EZ80_UNUSED+12	;                       59   0x12c   
-	irqhandler	EZ80_UNUSED+13	;                       60   0x130   
-	irqhandler	EZ80_UNUSED+14	;                       61   0x134   
-	irqhandler	EZ80_UNUSED+15	;                       62   0x138   
-	irqhandler	EZ80_UNUSED+16	;                       63   0x13c   
+	irqhandler	 1		; EZ80_EMACTX_IRQ   1    1   0x044
+	irqhandler	 2		; EZ80_EMACSYS_IRQ  2    2   0x048
+	irqhandler	 3		; EZ80_PLL_IRQ      3    3   0x04c
+	irqhandler	 4		; EZ80_FLASH_IRQ    4    4   0x050
+	irqhandler	 5		; EZ80_TIMER0_IRQ   5    5   0x054
+	irqhandler	 6		; EZ80_TIMER1_IRQ   6    6   0x058
+	irqhandler	 7		; EZ80_TIMER2_IRQ   7    7   0x05c
+	irqhandler	 8		; EZ80_TIMER3_IRQ   8    8   0x060
+	irqhandler	EZ80_UNUSED	;                        9   0x064
+	irqhandler	EZ80_UNUSED+1	;                       10   0x068
+	irqhandler	 9		; EZ80_RTC_IRQ      9   11   0x06C
+	irqhandler	10		; EZ80_UART0_IRQ   10   12   0x070
+	irqhandler	11		; EZ80_UART1_IRQ   11   13   0x074
+	irqhandler	12		; EZ80_I2C_IRQ     12   14   0x078
+	irqhandler	13		; EZ80_SPI_IRQ     13   15   0x07c
+	irqhandler	14		; EZ80_PORTA0_IRQ  14   16   0x080
+	irqhandler	15		; EZ80_PORTA1_IRQ  15   17   0x084
+	irqhandler	16		; EZ80_PORTA2_IRQ  16   18   0x088
+	irqhandler	17		; EZ80_PORTA3_IRQ  17   19   0x08c
+	irqhandler	18		; EZ80_PORTA4_IRQ  18   20   0x090
+	irqhandler	19		; EZ80_PORTA5_IRQ  19   21   0x094
+	irqhandler	20		; EZ80_PORTA6_IRQ  20   22   0x098
+	irqhandler	21		; EZ80_PORTA7_IRQ  21   23   0x09c
+	irqhandler	22		; EZ80_PORTB0_IRQ  22   24   0x0a0
+	irqhandler	23		; EZ80_PORTB1_IRQ  23   25   0x0a4
+	irqhandler	24		; EZ80_PORTB2_IRQ  24   26   0x0a8
+	irqhandler	25		; EZ80_PORTB3_IRQ  25   27   0x0ac
+	irqhandler	26		; EZ80_PORTB4_IRQ  26   28   0x0b0
+	irqhandler	27		; EZ80_PORTB5_IRQ  27   29   0x0b4
+	irqhandler	28		; EZ80_PORTB6_IRQ  28   20   0x0b8
+	irqhandler	29		; EZ80_PORTB7_IRQ  29   21   0x0bc
+	irqhandler	30		; EZ80_PORTC0_IRQ  30   22   0x0c0
+	irqhandler	31		; EZ80_PORTC1_IRQ  31   23   0x0c4
+	irqhandler	32		; EZ80_PORTC2_IRQ  32   24   0x0c8
+	irqhandler	33		; EZ80_PORTC3_IRQ  33   25   0x0cc
+	irqhandler	34		; EZ80_PORTC4_IRQ  34   26   0x0d0
+	irqhandler	35		; EZ80_PORTC5_IRQ  35   27   0x0d4
+	irqhandler	36		; EZ80_PORTC6_IRQ  36   28   0x0d8
+	irqhandler	37		; EZ80_PORTC7_IRQ  37   29   0x0dc
+	irqhandler	38		; EZ80_PORTD0_IRQ  38   40   0x0e0
+	irqhandler	39		; EZ80_PORTD1_IRQ  39   41   0x0e4
+	irqhandler	40		; EZ80_PORTD2_IRQ  40   42   0x0e8
+	irqhandler	41		; EZ80_PORTD3_IRQ  41   43   0x0ec
+	irqhandler	42		; EZ80_PORTD4_IRQ  42   44   0x0f0
+	irqhandler	43		; EZ80_PORTD5_IRQ  43   45   0x0f4
+	irqhandler	44		; EZ80_PORTD6_IRQ  44   46   0x0f8
+	irqhandler	45		; EZ80_PORTD7_IRQ  45   47   0x0fc
+	irqhandler	EZ80_UNUSED+1	;                       48   0x100
+	irqhandler	EZ80_UNUSED+2	;                       49   0x104
+	irqhandler	EZ80_UNUSED+3	;                       50   0x108
+	irqhandler	EZ80_UNUSED+4	;                       51   0x10c
+	irqhandler	EZ80_UNUSED+5	;                       52   0x110
+	irqhandler	EZ80_UNUSED+6	;                       53   0x114
+	irqhandler	EZ80_UNUSED+7	;                       54   0x118
+	irqhandler	EZ80_UNUSED+8	;                       55   0x11c
+	irqhandler	EZ80_UNUSED+9	;                       56   0x120
+	irqhandler	EZ80_UNUSED+10	;                       57   0x124
+	irqhandler	EZ80_UNUSED+11	;                       58   0x128
+	irqhandler	EZ80_UNUSED+12	;                       59   0x12c
+	irqhandler	EZ80_UNUSED+13	;                       60   0x130
+	irqhandler	EZ80_UNUSED+14	;                       61   0x134
+	irqhandler	EZ80_UNUSED+15	;                       62   0x138
+	irqhandler	EZ80_UNUSED+16	;                       63   0x13c
 
 ;**************************************************************************
 ; Common Interrupt handler
diff --git a/nuttx/arch/z80/src/ez80/ez80f91_spi.h b/nuttx/arch/z80/src/ez80/ez80f91_spi.h
index 1ef3a755d..16bc4648b 100644
--- a/nuttx/arch/z80/src/ez80/ez80f91_spi.h
+++ b/nuttx/arch/z80/src/ez80/ez80f91_spi.h
@@ -105,7 +105,7 @@ extern "C" {
  * include/nuttx/spi/spi.h).  All other methods (including up_spiinitialize()) are
  * provided by common logic.  To use this common SPI logic on your board:
  *
- *   1. Provide ez80_spiselect() and ez80_spistatus() functions in your board-specific 
+ *   1. Provide ez80_spiselect() and ez80_spistatus() functions in your board-specific
  *      logic.  This function will perform chip selection and status operations using
  *      GPIOs in the way your board is configured.
  *   2. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration, provide the
diff --git a/nuttx/arch/z80/src/z180/Make.defs b/nuttx/arch/z80/src/z180/Make.defs
index 24d2cb64a..ad658094b 100644
--- a/nuttx/arch/z80/src/z180/Make.defs
+++ b/nuttx/arch/z80/src/z180/Make.defs
@@ -41,8 +41,8 @@ HEAD_ASRC = z180_head.asm
 endif
 endif
 
-CMN_ASRCS  = 
-CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c up_createstack.c 
+CMN_ASRCS  =
+CMN_CSRCS  = up_allocateheap.c up_assert.c up_blocktask.c up_createstack.c
 CMN_CSRCS += up_doirq.c up_exit.c up_idle.c up_initialize.c
 CMN_CSRCS += up_interruptcontext.c up_mdelay.c up_releasepending.c
 CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_unblocktask.c
diff --git a/nuttx/arch/z80/src/z180/README.txt b/nuttx/arch/z80/src/z180/README.txt
index c06164cdd..b088470b6 100644
--- a/nuttx/arch/z80/src/z180/README.txt
+++ b/nuttx/arch/z80/src/z180/README.txt
@@ -46,4 +46,4 @@ z180_saveusercontext.asm, switch
 
 z180_schedulesigaction.c and  z180_sigdeliver.c
 	These files implement Z180 signal handling.
- 
+
diff --git a/nuttx/arch/z80/src/z180/z180_mmu.c b/nuttx/arch/z80/src/z180/z180_mmu.c
index d6ed1ebcf..4306eaf5f 100644
--- a/nuttx/arch/z80/src/z180/z180_mmu.c
+++ b/nuttx/arch/z80/src/z180/z180_mmu.c
@@ -241,7 +241,7 @@ int up_addrenv_create(size_t envsize, FAR task_addrenv_t *addrenv)
       sdbg("ERROR: npages is zero\n");
       return OK;
     }
-  
+
   /* Allocate a structure in the common .bss to hold information about the
    * task's address environment.  NOTE that this is not a part of the TCB,
    * but rather a break-away structure that can be shared by the task as
@@ -287,7 +287,7 @@ int up_addrenv_create(size_t envsize, FAR task_addrenv_t *addrenv)
 
 errout_with_cbr:
   z180_mmu_freecbr(cbr);
-  
+
 errout_with_irq:
   irqrestore(flags);
   return ret;
diff --git a/nuttx/arch/z80/src/z180/z180_registerdump.c b/nuttx/arch/z80/src/z180/z180_registerdump.c
index 17a44b059..ad67f12a3 100644
--- a/nuttx/arch/z80/src/z180/z180_registerdump.c
+++ b/nuttx/arch/z80/src/z180/z180_registerdump.c
@@ -52,7 +52,7 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Output debug info if stack dump is selected -- even if 
+/* Output debug info if stack dump is selected -- even if
  * debug is not selected.
  */
 
diff --git a/nuttx/arch/z80/src/z180/z180_scc.c b/nuttx/arch/z80/src/z180/z180_scc.c
index a2f0d4561..29d0c5239 100644
--- a/nuttx/arch/z80/src/z180/z180_scc.c
+++ b/nuttx/arch/z80/src/z180/z180_scc.c
@@ -278,7 +278,7 @@ static uart_dev_t g_escca_port =
  */
 
 #undef CONSOLE_DEV
-#undef TTYS0_DEV 
+#undef TTYS0_DEV
 #undef TTYS1_DEV
 
 #if defined(CONFIG_Z180_SCC_SERIAL_CONSOLE)
diff --git a/nuttx/arch/z80/src/z180/z180_timerisr.c b/nuttx/arch/z80/src/z180/z180_timerisr.c
index ceb7efb5f..bf041519e 100644
--- a/nuttx/arch/z80/src/z180/z180_timerisr.c
+++ b/nuttx/arch/z80/src/z180/z180_timerisr.c
@@ -98,7 +98,7 @@ int up_timerisr(int irq, chipreg_t *regs)
 
   /* "When TMDR0 decrements to 0, TIF0 is set to 1. This generates an interrupt
    * request if enabled by TIE0 = 1. TIF0 is reset to 0 when TCR is read and
-   * the higher or lower byte of TMDR0 is read." 
+   * the higher or lower byte of TMDR0 is read."
    */
 
   regval = inp(Z180_PRT_TCR);
diff --git a/nuttx/arch/z80/src/z8/Make.defs b/nuttx/arch/z80/src/z8/Make.defs
index 5d7a338be..781c82182 100644
--- a/nuttx/arch/z80/src/z8/Make.defs
+++ b/nuttx/arch/z80/src/z8/Make.defs
@@ -35,7 +35,7 @@
 
 HEAD_SSRC	= z8_head.S
 
-CMN_SSRCS	= 
+CMN_SSRCS	=
 CMN_CSRCS	= up_initialize.c up_allocateheap.c up_createstack.c \
 		  up_releasestack.c up_interruptcontext.c up_blocktask.c \
 		  up_unblocktask.c up_exit.c up_releasepending.c \
diff --git a/nuttx/arch/z80/src/z8/z8_head.S b/nuttx/arch/z80/src/z8/z8_head.S
index bdd6593e0..9316c7f64 100755
--- a/nuttx/arch/z80/src/z8/z8_head.S
+++ b/nuttx/arch/z80/src/z8/z8_head.S
@@ -49,7 +49,7 @@
 
 /* Assume the large model */
 
-#if !defined(CONFIG_Z8_MODEL_LARGE) && !defined(CONFIG_Z8_MODEL_SMALL) 
+#if !defined(CONFIG_Z8_MODEL_LARGE) && !defined(CONFIG_Z8_MODEL_SMALL)
 #  define CONFIG_Z8_MODEL_LARGE 1
 #  undef  CONFIG_Z8_MODEL_SMALL
 #endif
@@ -96,7 +96,7 @@
  **************************************************************************/
 
  	segment	CODE
- 
+
 /**************************************************************************
  * Interrupt Vectors
  **************************************************************************/
@@ -222,7 +222,7 @@ _z8_reset10:
 
 	/* Start NuttX */
 
-	ldx     __intrp,#0   
+	ldx     __intrp,#0
 	xor     r15, r15
 	xor     r14, r14
 	call	_os_start
diff --git a/nuttx/arch/z80/src/z8/z8_i2c.c b/nuttx/arch/z80/src/z8/z8_i2c.c
index 59cd2fc2b..6239ad25b 100644
--- a/nuttx/arch/z80/src/z8/z8_i2c.c
+++ b/nuttx/arch/z80/src/z8/z8_i2c.c
@@ -160,7 +160,7 @@ static void i2c_semtake(void)
 
 static void i2c_waittxempty(void)
 {
-  int i;  
+  int i;
   for (i = 0; i < 10000 && (I2CSTAT & I2C_STAT_TDRE) == 0;  i++);
 }
 
@@ -178,7 +178,7 @@ static void i2c_waittxempty(void)
  *
  ****************************************************************************/
 
-static void i2c_waitrxavail(void)  
+static void i2c_waitrxavail(void)
 {
   int i;
   for (i = 0; i <= 10000 && (I2CSTAT & (I2C_STAT_RDRF | I2C_STAT_NCKI)) == 0; i++);
@@ -365,7 +365,7 @@ static int i2c_write(FAR struct i2c_dev_s *dev, const uint8_t *buffer, int bufle
 
       I2CD    = I2C_WRITEADDR8(priv->addr);
       I2CCTL |= I2C_CTL_START;
- 
+
       /* Wait for the xmt buffer to become empty */
 
       i2c_waittxempty();
@@ -385,7 +385,7 @@ static int i2c_write(FAR struct i2c_dev_s *dev, const uint8_t *buffer, int bufle
            * the last bit.. Hmmm.  If this true then we will never be
            * able to send more than one data byte???
            */
- 
+
           if (count == 1)
             {
               I2CCTL |= I2C_CTL_STOP;
@@ -470,7 +470,7 @@ static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
 
   /* Retry as necessary to receive the whole message */
 
-  for (retry = 0; retry < 100; retry++)    
+  for (retry = 0; retry < 100; retry++)
     {
       /* Load the address into the transmit register.  It is not sent
        * until the START bit is set.
@@ -481,7 +481,7 @@ static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
       /* If we want only a single byte of data, then set the NACK
        * bit now.
        */
- 
+
       I2CCTL |= I2C_CTL_NAK;
 
       /* The START bit begins the transaction */
@@ -553,7 +553,7 @@ static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
  * Description:
  *   Initialize the selected I2C port. And return a unique instance of struct
  *   struct i2c_dev_s.  This function may be called to obtain multiple
- *   instances of the interface, each of which may be set up with a 
+ *   instances of the interface, each of which may be set up with a
  *   different frequency and slave address.
  *
  * Input Parameter:
@@ -567,7 +567,7 @@ static int i2c_read(FAR struct i2c_dev_s *dev, uint8_t *buffer, int buflen)
 FAR struct i2c_dev_s *up_i2cinitialize(int port)
 {
   FAR struct z8_i2cdev_s *i2c;
- 
+
   if (!g_initialized)
     {
       /* Set up some initial BRG value */
@@ -578,7 +578,7 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
       /* Make sure that GPIOs are configured for the alternate function (this
        * varies with silicon revisions).
        */
-  
+
       PAADDR = 0x02;
       PACTL |= 0xc0;
 
@@ -603,4 +603,4 @@ FAR struct i2c_dev_s *up_i2cinitialize(int port)
     }
 
   return (FAR struct i2c_dev_s *)i2c;
-} 
+}
diff --git a/nuttx/arch/z80/src/z8/z8_lowuart.c b/nuttx/arch/z80/src/z8/z8_lowuart.c
index 730ed1b4c..ad4acb6e9 100644
--- a/nuttx/arch/z80/src/z8/z8_lowuart.c
+++ b/nuttx/arch/z80/src/z8/z8_lowuart.c
@@ -112,7 +112,7 @@ void up_lowserialinit(void)
   putreg8(brg & 0xff, U1BRL);
 
   /* Configure GPIO Port D pins 4 & 5 for alternate function */
-  
+
   putreg8(0x02, PAADDR);
   val = getreg8(PDCTL) | 0x30;    /* Set bits in alternate function register */
   putreg8(val, PDCTL);
diff --git a/nuttx/arch/z80/src/z8/z8_registerdump.c b/nuttx/arch/z80/src/z8/z8_registerdump.c
index f1ce13a24..d1319f93b 100644
--- a/nuttx/arch/z80/src/z8/z8_registerdump.c
+++ b/nuttx/arch/z80/src/z8/z8_registerdump.c
@@ -53,7 +53,7 @@
  * Definitions
  ****************************************************************************/
 
-/* Output debug info if stack dump is selected -- even if 
+/* Output debug info if stack dump is selected -- even if
  * debug is not selected.
  */
 
diff --git a/nuttx/arch/z80/src/z8/z8_serial.c b/nuttx/arch/z80/src/z8/z8_serial.c
index 8e809988c..7dcf2f258 100644
--- a/nuttx/arch/z80/src/z8/z8_serial.c
+++ b/nuttx/arch/z80/src/z8/z8_serial.c
@@ -244,7 +244,7 @@ static uart_dev_t g_uart1port =
 /****************************************************************************
  * Name: z8_putuart
  ****************************************************************************/
- 
+
 static inline void z8_putuart(FAR struct z8_uart_s *priv, uint8_t value,
                               uint8_t offset)
 {
@@ -254,7 +254,7 @@ static inline void z8_putuart(FAR struct z8_uart_s *priv, uint8_t value,
 /****************************************************************************
  * Name: z8_getuart
  ****************************************************************************/
- 
+
 static inline uint8_t z8_getuart(FAR struct z8_uart_s *priv, uint8_t offset)
 {
   return getreg8(*(priv->uartbase + offset));
@@ -338,7 +338,7 @@ void z8_uartconfigure(void)
 
 #ifdef EZ8_UART1
   /* Configure GPIO Port D pins 4 & 5 for alternate function */
-  
+
   putreg8(0x02, PAADDR);
   val = getreg8(PDCTL) | 0x30;    /* Set bits in alternate function register */
   putreg8(val, PDCTL);
@@ -759,7 +759,7 @@ int up_putc(int ch)
   uint8_t  state;
 
   /* Keep interrupts disabled so that we do not interfere with normal
-   * driver operation 
+   * driver operation
    */
 
   state = z8_disableuartirq(&CONSOLE_DEV);
diff --git a/nuttx/arch/z80/src/z8/z8_timerisr.c b/nuttx/arch/z80/src/z8/z8_timerisr.c
index 0ed61e283..14009fe2e 100644
--- a/nuttx/arch/z80/src/z8/z8_timerisr.c
+++ b/nuttx/arch/z80/src/z8/z8_timerisr.c
@@ -98,7 +98,7 @@ int up_timerisr(int irq, uint32_t *regs)
 void up_timerinit(void)
 {
   uint32_t reload;
- 
+
   up_disable_irq(Z8_IRQ_SYSTIMER);
 
   /* Write to the timer control register to disable the timer, configure
diff --git a/nuttx/arch/z80/src/z8/z8_vector.S b/nuttx/arch/z80/src/z8/z8_vector.S
index 180241521..7c4761d04 100755
--- a/nuttx/arch/z80/src/z8/z8_vector.S
+++ b/nuttx/arch/z80/src/z8/z8_vector.S
@@ -228,7 +228,7 @@ endif
 	xdef _z8_p4ap0a_handler
 	xdef _z8_potrap_handler
 	xdef _z8_wotrap_handler
-#endif 
+#endif
 
 /**************************************************************************
  * Macros
@@ -430,7 +430,7 @@ endif
 	vector P4A	= _z8_p4ap0a_handler
 	vector POTRAP	= _z8_potrap_handler
 	vector WOTRAP	= _z8_wotrap_handler
-#endif 
+#endif
 
 /**************************************************************************
  * Name: _z16f_*_handler
@@ -724,7 +724,7 @@ _z8_potrap_handler:
 	ENTER(Z8_POTRAP_IRQ)
 _z8_wotrap_handler:
 	ENTER(Z8_WOTRAP_IRQ)
-#endif 
+#endif
 
 /**************************************************************************
  * Name: _z16f_common_handler
diff --git a/nuttx/arch/z80/src/z80/Make.defs b/nuttx/arch/z80/src/z80/Make.defs
index 4f8c291c4..c60e88be6 100644
--- a/nuttx/arch/z80/src/z80/Make.defs
+++ b/nuttx/arch/z80/src/z80/Make.defs
@@ -41,7 +41,7 @@ HEAD_ASRC	= z80_head.asm
 endif
 endif
 
-CMN_ASRCS	= 
+CMN_ASRCS	=
 CMN_CSRCS	= up_initialize.c up_allocateheap.c up_createstack.c \
 		  up_releasestack.c up_interruptcontext.c up_blocktask.c  \
 		  up_unblocktask.c up_exit.c up_releasepending.c \
diff --git a/nuttx/arch/z80/src/z80/README.txt b/nuttx/arch/z80/src/z80/README.txt
index df8b36de9..f81605475 100644
--- a/nuttx/arch/z80/src/z80/README.txt
+++ b/nuttx/arch/z80/src/z80/README.txt
@@ -8,42 +8,41 @@ sub-directory contains logic unique to the classic Z80 chip.
 Files in this directory include:
 
 z80_head.asm
-	This is the main entry point into the Z80 program.  This includes the
-	handler for the RESET, power-up interrupt vector and address zero and all
-	RST interrupts.
+    This is the main entry point into the Z80 program.  This includes the
+    handler for the RESET, power-up interrupt vector and address zero and all
+    RST interrupts.
 
 z80_rom.asm
-	Some architectures may have ROM located at address zero.  In this case, a
-	special version of the "head" logic must be used.  This special "head"
-	file is probably board-specific and, hence, belongs in the board-specific
-	configs/<board-name>/src directory.  This file may, however, be used as
-	a model for such a board-specific file.
-
-	z80_rom.S is enabled by specifying CONFIG_LINKER_ROM_AT_0000 in the
-	configuration file.
-
-	A board specific version in the configs/<board-name>/src directory can be
-	used by:
-	
-	1. Define CONFIG_ARCH_HAVEHEAD
-	2. Add the board-specific head file, say <filename>.asm, to
-	   configs/<board-name>/src
-	3. Add a file called Make.defs in the configs/<board-name>/src directory
-	   containing the line:  HEAD_ASRC = <file-name>.asm
+    Some architectures may have ROM located at address zero.  In this case, a
+    special version of the "head" logic must be used.  This special "head"
+    file is probably board-specific and, hence, belongs in the board-specific
+    configs/<board-name>/src directory.  This file may, however, be used as
+    a model for such a board-specific file.
+
+    z80_rom.S is enabled by specifying CONFIG_LINKER_ROM_AT_0000 in the
+    configuration file.
+
+    A board specific version in the configs/<board-name>/src directory can be
+    used by:
+    
+    1. Define CONFIG_ARCH_HAVEHEAD
+    2. Add the board-specific head file, say <filename>.asm, to
+       configs/<board-name>/src
+    3. Add a file called Make.defs in the configs/<board-name>/src directory
+       containing the line:  HEAD_ASRC = <file-name>.asm
 
 Make.defs
-	This is the standard makefile fragment that must be provided in all
-	chip directories.  This fragment identifies the chip-specific file to
-	be used in building libarch.
+    This is the standard makefile fragment that must be provided in all
+    chip directories.  This fragment identifies the chip-specific file to
+    be used in building libarch.
 
 chip.h
-	This is the standard header file that must be provided in all chip
-	directories.
+    This is the standard header file that must be provided in all chip
+    directories.
 
 z80_initialstate.c, z80_copystate.c,  z80_restoreusercontext.asm, and
 z80_saveusercontext.asm, switch
- 	These files implement the Z80 context switching logic
+    These files implement the Z80 context switching logic
 
 z80_schedulesigaction.c and  z80_sigdeliver.c
-	These files implement Z80 signal handling.
- 
\ No newline at end of file
+    These files implement Z80 signal handling.
diff --git a/nuttx/arch/z80/src/z80/z80_head.asm b/nuttx/arch/z80/src/z80/z80_head.asm
index 7074461c2..4dadc5ba4 100644
--- a/nuttx/arch/z80/src/z80/z80_head.asm
+++ b/nuttx/arch/z80/src/z80/z80_head.asm
@@ -78,7 +78,7 @@
 ; Other reset handlers
 ;
 ; Interrupt mode 1 behavior:
-; 
+;
 ; 1. M1 cycle: 7 ticks
 ;    Acknowledge interrupt and decrements SP
 ; 2. M2 cycle: 3 ticks
diff --git a/nuttx/arch/z80/src/z80/z80_registerdump.c b/nuttx/arch/z80/src/z80/z80_registerdump.c
index 7bf21a26f..a3271e61e 100644
--- a/nuttx/arch/z80/src/z80/z80_registerdump.c
+++ b/nuttx/arch/z80/src/z80/z80_registerdump.c
@@ -52,7 +52,7 @@
  * Definitions
  ****************************************************************************/
 
-/* Output debug info if stack dump is selected -- even if 
+/* Output debug info if stack dump is selected -- even if
  * debug is not selected.
  */
 
diff --git a/nuttx/arch/z80/src/z80/z80_rom.asm b/nuttx/arch/z80/src/z80/z80_rom.asm
index 70e698bf0..abc450bcd 100644
--- a/nuttx/arch/z80/src/z80/z80_rom.asm
+++ b/nuttx/arch/z80/src/z80/z80_rom.asm
@@ -109,7 +109,7 @@ _up_rstvectors:
 ; Other reset handlers
 ;
 ; Interrupt mode 1 behavior:
-; 
+;
 ; 1. M1 cycle: 7 ticks
 ;    Acknowledge interrupt and decrements SP
 ; 2. M2 cycle: 3 ticks