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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-05-28 19:48:26 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2012-05-28 19:48:26 +0000 |
commit | 2def040cb811a71cf5e59effb304c47897640b5a (patch) | |
tree | d5af02e86fca6db39ff126655f20eb43ccacb13e /nuttx/arch | |
parent | f01a56f6ca729b143cb2a65c108fac534bc76f10 (diff) | |
download | px4-nuttx-2def040cb811a71cf5e59effb304c47897640b5a.tar.gz px4-nuttx-2def040cb811a71cf5e59effb304c47897640b5a.tar.bz2 px4-nuttx-2def040cb811a71cf5e59effb304c47897640b5a.zip |
Bring STM3220G-EVAL board configurations to same level as STM3240G-EVAL
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4779 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/arch')
-rw-r--r-- | nuttx/arch/arm/src/stm32/Kconfig | 2 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/chip/stm32f20xxx_rcc.h | 2 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_allocateheap.c | 10 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c | 6 |
4 files changed, 10 insertions, 10 deletions
diff --git a/nuttx/arch/arm/src/stm32/Kconfig b/nuttx/arch/arm/src/stm32/Kconfig index e0f822656..efeb3c855 100644 --- a/nuttx/arch/arm/src/stm32/Kconfig +++ b/nuttx/arch/arm/src/stm32/Kconfig @@ -127,7 +127,7 @@ config STM32_CAN2 config STM32_CCMDATARAM bool "CMD/DATA RAM" default n - depends on STM32_STM32F20XX || STM32_STM32F40XX + depends on STM32_STM32F40XX config STM32_CRYP bool "CRYP" diff --git a/nuttx/arch/arm/src/stm32/chip/stm32f20xxx_rcc.h b/nuttx/arch/arm/src/stm32/chip/stm32f20xxx_rcc.h index 5de2a9b58..8a926250b 100644 --- a/nuttx/arch/arm/src/stm32/chip/stm32f20xxx_rcc.h +++ b/nuttx/arch/arm/src/stm32/chip/stm32f20xxx_rcc.h @@ -311,7 +311,6 @@ #define RCC_AHB1ENR_GPIOIEN (1 << 8) /* Bit 8: IO port I clock enable */ #define RCC_AHB1ENR_CRCEN (1 << 12) /* Bit 12: CRC clock enable */ #define RCC_AHB1ENR_BKPSRAMEN (1 << 18) /* Bit 18: Backup SRAM interface clock enable */ -#define RCC_AHB1ENR_CCMDATARAMEN (1 << 20) /* Bit 20: CCM data RAM clock enable */ #define RCC_AHB1ENR_DMA1EN (1 << 21) /* Bit 21: DMA1 clock enable */ #define RCC_AHB1ENR_DMA2EN (1 << 22) /* Bit 22: DMA2 clock enable */ #define RCC_AHB1ENR_ETHMACEN (1 << 25) /* Bit 25: Ethernet MAC clock enable */ @@ -392,7 +391,6 @@ #define RCC_AHB1LPENR_SRAM1LPEN (1 << 16) /* Bit 16: SRAM 1 interface clock enable during Sleep mode */ #define RCC_AHB1LPENR_SRAM2LPEN (1 << 17) /* Bit 17: SRAM 2 interface clock enable during Sleep mode */ #define RCC_AHB1LPENR_BKPSRAMLPEN (1 << 18) /* Bit 18: Backup SRAM interface clock enable during Sleep mode */ -#define RCC_AHB1LPENR_CCMDATARAMLPEN (1 << 20) /* Bit 20: CCM data RAM clock enable during Sleep mode */ #define RCC_AHB1LPENR_DMA1LPEN (1 << 21) /* Bit 21: DMA1 clock enable during Sleep mode */ #define RCC_AHB1LPENR_DMA2LPEN (1 << 22) /* Bit 22: DMA2 clock enable during Sleep mode */ #define RCC_AHB1LPENR_ETHMACLPEN (1 << 25) /* Bit 25: Ethernet MAC clock enable during Sleep mode */ diff --git a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c index cef41929e..4c186a852 100644 --- a/nuttx/arch/arm/src/stm32/stm32_allocateheap.c +++ b/nuttx/arch/arm/src/stm32/stm32_allocateheap.c @@ -112,7 +112,7 @@ # error "CONFIG_MM_REGIONS > 1 but I don't know what the other region(s) are" # endif - /* The STM32 F1 has not CCM SRAM */ + /* The STM32 F1 has no CCM SRAM */ # undef CONFIG_STM32_CCMEXCLUDE # define CONFIG_STM32_CCMEXCLUDE 1 @@ -136,6 +136,14 @@ #elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) + + /* The STM32 F2 has no CCM SRAM */ + +# ifdef CONFIG_STM32_STM32F20XX +# undef CONFIG_STM32_CCMEXCLUDE +# define CONFIG_STM32_CCMEXCLUDE 1 +# endif + /* Set the end of system SRAM */ # define SRAM1_END 0x20020000 diff --git a/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c b/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c index e4af2770b..fac15902f 100644 --- a/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c +++ b/nuttx/arch/arm/src/stm32/stm32f20xxx_rcc.c @@ -167,12 +167,6 @@ static inline void rcc_enableahb1(void) regval |= RCC_AHB1ENR_BKPSRAMEN; #endif -#ifdef CONFIG_STM32_CCMDATARAM - /* CCM data RAM clock enable */ - - regval |= RCC_AHB1ENR_CCMDATARAMEN; -#endif - #ifdef CONFIG_STM32_DMA1 /* DMA 1 clock enable */ |