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author | Gregory Nutt <gnutt@nuttx.org> | 2014-01-07 08:38:00 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2014-01-07 08:38:00 -0600 |
commit | b55b8aa1fa19eea6b3684b76cf9c35f45de43f2b (patch) | |
tree | 77eb97747d3f9bcfc7fe2f073ea263a983ea39dd /nuttx/arch | |
parent | b859b662f1cf99d863aeebe04f5d9dbc76a0a835 (diff) | |
download | px4-nuttx-b55b8aa1fa19eea6b3684b76cf9c35f45de43f2b.tar.gz px4-nuttx-b55b8aa1fa19eea6b3684b76cf9c35f45de43f2b.tar.bz2 px4-nuttx-b55b8aa1fa19eea6b3684b76cf9c35f45de43f2b.zip |
Add more nops after enabling MMU for Cortex-A8
Diffstat (limited to 'nuttx/arch')
-rw-r--r-- | nuttx/arch/arm/src/armv7-a/arm_head.S | 11 | ||||
-rw-r--r-- | nuttx/arch/arm/src/armv7-a/arm_pghead.S | 13 |
2 files changed, 7 insertions, 17 deletions
diff --git a/nuttx/arch/arm/src/armv7-a/arm_head.S b/nuttx/arch/arm/src/armv7-a/arm_head.S index b5bab0022..bce82d50b 100644 --- a/nuttx/arch/arm/src/armv7-a/arm_head.S +++ b/nuttx/arch/arm/src/armv7-a/arm_head.S @@ -505,14 +505,9 @@ __start: /* Then write the configured control register */ mcr CP15_SCTLR(r0) /* Write control reg */ - - /* Read the Main ID register. This will be available in R1 after - * MMU trampoline (not currently used) - */ - - mrc CP15_MIDR(r1) /* Read main id reg */ - mov r1, r1 /* Null-avoiding nop */ - mov r1, r1 /* Null-avoiding nop */ + .rept 12 /* Cortex A8 wants lots of NOPs here */ + nop + .endr /* And "jump" to .Lvstart in the newly mapped virtual address space */ diff --git a/nuttx/arch/arm/src/armv7-a/arm_pghead.S b/nuttx/arch/arm/src/armv7-a/arm_pghead.S index a11570515..36497e755 100644 --- a/nuttx/arch/arm/src/armv7-a/arm_pghead.S +++ b/nuttx/arch/arm/src/armv7-a/arm_pghead.S @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/armv7-a/arm_pghead.S * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without @@ -491,14 +491,9 @@ __start: /* Then write the configured control register */ mcr CP15_SCTLR(r0) /* Write control reg */ - - /* Read the Main ID register. This will be available in R1 after - * MMU trampoline (not currently used) - */ - - mrc CP15_MIDR(r1) /* Read main id reg */ - mov r1, r1 /* Null-avoiding nop */ - mov r1, r1 /* Null-avoiding nop */ + .rept 12 /* Cortex A8 wants lots of NOPs here */ + nop + .endr /* And "jump" to .Lvstart in the newly mapped virtual address space */ |