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| author | Gregory Nutt <gnutt@nuttx.org> | 2015-03-29 14:42:03 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2015-03-29 14:42:03 -0600 |
| commit | 64f02764e9c2d0d4a2bdc496e9f21b262ef818cc (patch) | |
| tree | ca3c8230c9507db18c4ea6104ecc23b79a921c73 /nuttx/arch | |
| parent | 72adecb9057d7015c5d1729ec3752926284bab8c (diff) | |
| download | px4-nuttx-64f02764e9c2d0d4a2bdc496e9f21b262ef818cc.tar.gz px4-nuttx-64f02764e9c2d0d4a2bdc496e9f21b262ef818cc.tar.bz2 px4-nuttx-64f02764e9c2d0d4a2bdc496e9f21b262ef818cc.zip | |
Cortex-M7: Add support for enabled the D-Cache in write only mode.
SAMV7 Ethernet: I- and D-Cache are now enabled in the netnsh/ configuration. D-Cache is enabled in write-though mode. This mode is necessary because the DMA descriptors are each 8-bytes in size but the D-Cache cache line is 32-bits in size. So it is impossible make coherency for every 8-byte DMA descriptor without write-through.
Diffstat (limited to 'nuttx/arch')
| -rw-r--r-- | nuttx/arch/arm/src/samv7/Kconfig | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/nuttx/arch/arm/src/samv7/Kconfig b/nuttx/arch/arm/src/samv7/Kconfig index 41e40b5df..08d8f7570 100644 --- a/nuttx/arch/arm/src/samv7/Kconfig +++ b/nuttx/arch/arm/src/samv7/Kconfig @@ -120,10 +120,10 @@ config SAMV7_EMAC select ARMV7M_DCACHE_WRITETHROUGH if ARMV7M_DCACHE ---help--- NOTE that write-through caching is automatically selected. This is - to work around issues with the RX and TX descriptors with are 8-bits + to work around issues with the RX and TX descriptors with are 8-bytes in size. But the D-Cache cache line size is 32-bytes. That means that you cannot reload, clean or invalidate a descriptor without also - effecting three neighboring desciptors. Setting write through mode + effecting three neighboring descriptors. Setting write through mode eliminates the need for cleaning. If only reloading and invalidating are done, then there is no problem. |