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| author | Gregory Nutt <gnutt@nuttx.org> | 2015-03-23 11:21:26 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2015-03-23 11:21:26 -0600 |
| commit | ad6c69e6edc9367b166cfa743b886c1cff179e3a (patch) | |
| tree | de3dd7eed0fc18c9d9469a19b76adfc932cb8b71 /nuttx/arch | |
| parent | 2a7dfd3f259447c48dd6700edfe590a5ee5a79db (diff) | |
| download | px4-nuttx-ad6c69e6edc9367b166cfa743b886c1cff179e3a.tar.gz px4-nuttx-ad6c69e6edc9367b166cfa743b886c1cff179e3a.tar.bz2 px4-nuttx-ad6c69e6edc9367b166cfa743b886c1cff179e3a.zip | |
Update some recent Tiva changes so that old LM3S parts at least still build (but have not been retested)
Diffstat (limited to 'nuttx/arch')
| -rw-r--r-- | nuttx/arch/arm/src/tiva/chip/lm3s_memorymap.h | 8 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/tiva/tiva_gpio.c | 19 |
2 files changed, 23 insertions, 4 deletions
diff --git a/nuttx/arch/arm/src/tiva/chip/lm3s_memorymap.h b/nuttx/arch/arm/src/tiva/chip/lm3s_memorymap.h index 8d3b5097d..71ad565c1 100644 --- a/nuttx/arch/arm/src/tiva/chip/lm3s_memorymap.h +++ b/nuttx/arch/arm/src/tiva/chip/lm3s_memorymap.h @@ -129,7 +129,7 @@ # define TIVA_TIMER2_BASE (TIVA_PERIPH_BASE + 0x32000) /* -0x32fff: Timer 2 */ # define TIVA_TIMER3_BASE (TIVA_PERIPH_BASE + 0x33000) /* -0x33fff: Timer 3 */ /* -0x37fff: Reserved */ -# define TIVA_ADC_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */ +# define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */ /* -0x3bfff: Reserved */ # define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */ /* -0x47fff: Reserved */ @@ -167,7 +167,7 @@ # define TIVA_TIMER1_BASE (TIVA_PERIPH_BASE + 0x31000) /* -0x31fff: Timer 1 */ # define TIVA_TIMER2_BASE (TIVA_PERIPH_BASE + 0x32000) /* -0x32fff: Timer 2 */ /* -0x37fff: Reserved */ -# define TIVA_ADC_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */ +# define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */ /* -0x3bfff: Reserved */ # define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */ /* -0x47fff: Reserved */ @@ -212,7 +212,7 @@ # define TIVA_TIMER2_BASE (TIVA_PERIPH_BASE + 0x32000) /* -0x32fff: Timer 2 */ # define TIVA_TIMER3_BASE (TIVA_PERIPH_BASE + 0x33000) /* -0x33fff: Timer 3 */ /* -0x37fff: Reserved */ -# define TIVA_ADC_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */ +# define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */ /* -0x3bfff: Reserved */ # define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */ /* -0x47fff: Reserved */ @@ -254,7 +254,7 @@ # define TIVA_TIMER2_BASE (TIVA_PERIPH_BASE + 0x32000) /* -0x32fff: Timer 2 */ # define TIVA_TIMER3_BASE (TIVA_PERIPH_BASE + 0x33000) /* -0x33fff: Timer 3 */ /* -0x37fff: Reserved */ -# define TIVA_ADC_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */ +# define TIVA_ADC0_BASE (TIVA_PERIPH_BASE + 0x38000) /* -0x38fff: ADC */ /* -0x3bfff: Reserved */ # define TIVA_CMP_BASE (TIVA_PERIPH_BASE + 0x3c000) /* -0x3cfff: Analog Comparators */ /* -0x3fffff: Reserved */ diff --git a/nuttx/arch/arm/src/tiva/tiva_gpio.c b/nuttx/arch/arm/src/tiva/tiva_gpio.c index e02b17f88..247873bb6 100644 --- a/nuttx/arch/arm/src/tiva/tiva_gpio.c +++ b/nuttx/arch/arm/src/tiva/tiva_gpio.c @@ -499,8 +499,10 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin, uint32_t pdrclr = 0; uint32_t denset = 0; uint32_t denclr = 0; +#if defined(LM4F) || defined(TM4C) uint32_t amselset = 0; uint32_t amselclr = 0; +#endif /* Set the pin type. */ @@ -512,7 +514,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin, purclr = pin; pdrclr = pin; denset = pin; +#if defined(LM4F) || defined(TM4C) amselclr = pin; +#endif } break; @@ -522,7 +526,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin, purset = pin; pdrclr = pin; denset = pin; +#if defined(LM4F) || defined(TM4C) amselclr = pin; +#endif } break; @@ -532,7 +538,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin, purclr = pin; pdrset = pin; denset = pin; +#if defined(LM4F) || defined(TM4C) amselclr = pin; +#endif } break; @@ -542,7 +550,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin, purclr = pin; pdrclr = pin; denset = pin; +#if defined(LM4F) || defined(TM4C) amselclr = pin; +#endif } break; @@ -552,7 +562,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin, purset = pin; pdrclr = pin; denclr = pin; +#if defined(LM4F) || defined(TM4C) amselclr = pin; +#endif } break; @@ -562,7 +574,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin, purclr = pin; pdrset = pin; denclr = pin; +#if defined(LM4F) || defined(TM4C) amselclr = pin; +#endif } break; @@ -572,7 +586,9 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin, purclr = pin; pdrclr = pin; denclr = pin; +#if defined(LM4F) || defined(TM4C) amselset = pin; +#endif } break; @@ -584,7 +600,10 @@ static inline void tiva_gpiopadtype(uint32_t base, uint32_t pin, modifyreg32(base + TIVA_GPIO_PUR_OFFSET, purclr, purset); modifyreg32(base + TIVA_GPIO_PDR_OFFSET, pdrclr, pdrset); modifyreg32(base + TIVA_GPIO_DEN_OFFSET, denclr, denset); + +#if defined(LM4F) || defined(TM4C) modifyreg32(base + TIVA_GPIO_AMSEL_OFFSET, amselclr, amselset); +#endif #ifdef CONFIG_ARCH_CHIP_TM4C129 /* Set the wake pin enable register and the wake level register. These |