Add a configuration for the lpc3152

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4043 42af7a65-404d-4744-a932-0658087f49c3

1 files changed, 78 insertions, 0 deletions

diff --git a/nuttx/configs/ea3152/tools/lpc3152.cfg b/nuttx/configs/ea3152/tools/lpc3152.cfg
new file mode 100755
index 000000000..6a741b5dc
--- /dev/null
+++ b/nuttx/configs/ea3152/tools/lpc3152.cfg
@@ -0,0 +1,78 @@
+######################################
+# Target:    NXP lpc3152
+######################################
+
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME lpc3152
+}
+
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
+   set  _ENDIAN little
+}
+
+# ARM926EJS core
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x07926f0f
+}
+
+# Scan Tap
+# Wired to seperate STDO pin on the lpc3152, externally muxed to TDO on ea3152 module 
+# JTAGSEL pin must be 0 to activate, which reassigns arm tdo to a pass through.
+if { [info exists SJCTAPID ] } {
+   set _SJCTAPID $SJCTAPID
+} else {
+   set _SJCTAPID 0x1392e02b
+}
+
+#jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
+jtag newtap $_CHIPNAME sjc -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_SJCTAPID
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+##################################################################
+# various symbol definitions, to avoid hard-wiring addresses
+##################################################################
+
+global lpc315x
+set lpc315x [ dict create ]
+
+# Physical addresses for controllers and memory
+dict set lpc315x sram0			0x11028000
+dict set lpc315x sram1			0x11040000
+dict set lpc315x uart			0x15001000
+dict set lpc315x cgu			0x13004000
+dict set lpc315x ioconfig		0x13003000
+dict set lpc315x sysconfig		0x13002800
+dict set lpc315x wdt			0x13002400
+
+##################################################################
+# Target configuration
+##################################################################
+
+jtag_nsrst_delay 1000
+jtag_ntrst_delay 0
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME 
+
+$_TARGETNAME invoke-event halted
+
+$_TARGETNAME configure -work-area-phys [dict get $lpc315x sram0] -work-area-size 0x30000 -work-area-backup 0
+
+$_TARGETNAME configure -event reset-init {
+	echo "\nRunning reset init script for LPC3152\n"
+	halt
+	wait_halt
+	reg cpsr 0xa00000d3	;#Supervisor mode
+	reg pc 0x11029000
+	poll
+	sleep 500
+}
+
+arm7_9 fast_memory_access enable
+arm7_9 dcc_downloads enable