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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-05-11 17:05:13 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2009-05-11 17:05:13 +0000 |
commit | dcc3cf5161bebdcd28bc1a8a4cd563b3ce8c2fd6 (patch) | |
tree | bf964dd9f4ac9a1b83a2176e2a7c6092136bc0f8 /nuttx/configs/eagle100/include/board.h | |
parent | ec87f216bcee185ec0d85fa58774cd7c6387af5f (diff) | |
download | px4-nuttx-dcc3cf5161bebdcd28bc1a8a4cd563b3ce8c2fd6.tar.gz px4-nuttx-dcc3cf5161bebdcd28bc1a8a4cd563b3ce8c2fd6.tar.bz2 px4-nuttx-dcc3cf5161bebdcd28bc1a8a4cd563b3ce8c2fd6.zip |
More lm3s6918 -- clocking + misc fixes
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1768 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs/eagle100/include/board.h')
-rw-r--r-- | nuttx/configs/eagle100/include/board.h | 38 |
1 files changed, 37 insertions, 1 deletions
diff --git a/nuttx/configs/eagle100/include/board.h b/nuttx/configs/eagle100/include/board.h index e08d7af83..ec5b32981 100644 --- a/nuttx/configs/eagle100/include/board.h +++ b/nuttx/configs/eagle100/include/board.h @@ -51,7 +51,43 @@ /* Clocking *************************************************************************/ -#define LM3X_ARM_CLK_FREQ 50000000 /* 50MHz */ +/* RCC settings */ + +#define SYSCON_RCC_XTAL SYSCON_RCC_XTAL8000KHZ /* Eagle100 on-board crystall is 8.00 MHz */ +#define XTAL_FREQUENCY 8000000 + +/* Oscillator source is the main oscillator (not internal, internal/4, 30KHz or + * 30KHz from hibernate module) */ + +#define SYSCON_RCC_OSCSRC SYSCON_RCC_OSCSRC_MOSC +#define SYSCON_RCC2_OSCSRC SYSCON_RCC2_OSCSRC2_MOSC +#define OSCSRC_FREQUENCY XTAL_FREQUENCY + +/* Use system divider = 4; this corresponds to a system clock frequency + * of (400 / 2) / 4 = 50MHz + */ + +#define LM3S_SYSDIV 4 +#define SYSCLK_FREQUENCY 50000000 /* 50MHz */ + +/* Other RCC settings: + * + * - Main and internal oscillators enabled. + * - PLL and sys dividers not bypassed + * - PLL not powered down + * - No auto-clock gating reset + */ + +#define LM3S_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(LM3S_SYSDIV)) + +/* RCC2 settings -- RCC2 not used. Other RCC2 settings + * + * - PLL and sys dividers not bypassed. + * - PLL not powered down + * - Not using RCC2 + */ + +#define LM3S_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV(LM3S_SYSDIV)) /* LED definitions ******************************************************************/ |