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| author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2008-10-31 22:38:28 +0000 |
|---|---|---|
| committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2008-10-31 22:38:28 +0000 |
| commit | 3970b62c012fc06f99e31e8e0f8b9a4a578dccc2 (patch) | |
| tree | 291765ac623565c9728533899f5a888600415aec /nuttx/configs | |
| parent | a843c2be5cd076663201fd86109d031c4f425645 (diff) | |
| download | px4-nuttx-3970b62c012fc06f99e31e8e0f8b9a4a578dccc2.tar.gz px4-nuttx-3970b62c012fc06f99e31e8e0f8b9a4a578dccc2.tar.bz2 px4-nuttx-3970b62c012fc06f99e31e8e0f8b9a4a578dccc2.zip | |
Board should specify multipliers, not bit settings
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1109 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx/configs')
| -rw-r--r-- | nuttx/configs/olimex-strp711/include/board.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/nuttx/configs/olimex-strp711/include/board.h b/nuttx/configs/olimex-strp711/include/board.h index d0471c971..15a979750 100644 --- a/nuttx/configs/olimex-strp711/include/board.h +++ b/nuttx/configs/olimex-strp711/include/board.h @@ -103,12 +103,12 @@ * Main system clock: MCLK = RCLK = 32MHz */ -#undef STR71X_PLL1IN_DIV2 /* Don't divide main OSC by two */ -#define STR71X_PLL1OUT_MUL STR71X_RCCUPLL1CR_MUL16 /* PLL1OUT = 16 * CLK2 */ -#define STR71X_PLL1OUT_DIV STR71X_RCCUPLL1CR_DIV2 /* PLL1OUT = CLK2 / 2 */ -#define STR71X_APB1_DIV STR71X_PCUPDIVR_APB1DIV1 /* PCLK1 = RCLK */ -#define STR71X_APB2_DIV STR71X_PCUPDIVR_APB1DIV1 /* PCLK2 = RCLK */ -#define STR71X_MCLK_DIV STR71X_PCUMDIVR_DIV1 /* MCLK = RCLK */ +#undef STR71X_PLL1IN_DIV2 /* Don't divide main OSC by two */ +#define STR71X_PLL1OUT_MUL 16 /* PLL1OUT = 16 * CLK2 */ +#define STR71X_PLL1OUT_DIV 2 /* PLL1OUT = CLK2 / 2 */ +#define STR71X_APB1_DIV 1 /* PCLK1 = RCLK */ +#define STR71X_APB2_DIV 1 /* PCLK2 = RCLK */ +#define STR71X_MCLK_DIV 1 /* MCLK = RCLK */ /* PLL2 Setup -- only needed for HDLC or USB * @@ -117,20 +117,20 @@ * USB clock = 12 * HCLK / 1 = 48 MHz */ -#undef STR71X_USBIN_PLL2 /* USB input is USB clock */ -#define STR71X_PLL2OUT_MUL STR71X_PCUPPL2CR_MUL12 /* PLL2OUT = 12 * HCLK */ -#define STR71X_PLL2OUT_DIV STR71X_PCUPPL2CR_DIV1 /* PLL2OUT = HCLK / 1 */ +#undef STR71X_USBIN_PLL2 /* USB input is USB clock */ +#define STR71X_PLL2OUT_MUL 12 /* PLL2OUT = 12 * HCLK */ +#define STR71X_PLL2OUT_DIV 1 /* PLL2OUT = HCLK / 1 */ /* LED definitions **********************************************************/ -#define LED_STARTED 0 -#define LED_HEAPALLOCATE 1 -#define LED_IRQSENABLED 2 -#define LED_STACKCREATED 3 -#define LED_INIRQ 4 -#define LED_SIGNAL 5 -#define LED_ASSERTION 6 -#define LED_PANIC 7 +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 /**************************************************************************** * Inline Functions |