Fix an issue for architectures where interrupt numbers and vector numbers do not match 1-to-1

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4258 42af7a65-404d-4744-a932-0658087f49c3

6 files changed, 92 insertions, 1 deletions

diff --git a/nuttx/configs/README.txt b/nuttx/configs/README.txt
index ecbaaf51b..786b45332 100644
--- a/nuttx/configs/README.txt
+++ b/nuttx/configs/README.txt
@@ -138,6 +138,15 @@ defconfig -- This is a configuration file similar to the Linux
 		CONFIG_ARCH_NOINTC - define if the architecture does not
 		  support an interrupt controller or otherwise cannot support
 		  APIs like up_enable_irq() and up_disable_irq().
+		CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
+		  to interfaces like irq_attach() and irq_detach are the same as IRQ
+		  numbers that are provied to IRQ management functions like
+		  up_enable_irq() and up_disable_irq().  But that is not true for all
+		  interrupt controller implementations.  For example, the PIC32MX
+		  interrupt controller manages interrupt sources that have a many-to-one
+		  relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
+		  must defined so that the OS logic will know not to assume it can use
+		  a vector number to enable or disable interrupts.
 		CONFIG_ARCH_IRQPRIO
 		  Define if the architecture suports prioritizaton of interrupts
 		  and the up_prioritize_irq() API.
diff --git a/nuttx/configs/pcblogic-pic32mx/nsh/defconfig b/nuttx/configs/pcblogic-pic32mx/nsh/defconfig
index 426c53b0e..cb3735cd1 100644
--- a/nuttx/configs/pcblogic-pic32mx/nsh/defconfig
+++ b/nuttx/configs/pcblogic-pic32mx/nsh/defconfig
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/pcblogic-pic32mx/nsh/defconfig
 #
-#   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.orgr>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -53,6 +53,18 @@
 # CONFIG_DRAM_SIZE - Describes the installed DRAM.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_END - Last address+1 of installed RAM
+# CONFIG_ARCH_NOINTC - define if the architecture does not
+#   support an interrupt controller or otherwise cannot support
+#   APIs like up_enable_irq() and up_disable_irq().
+# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
+#   to interfaces like irq_attach() and irq_detach are the same as IRQ
+#   numbers that are provied to IRQ management functions like
+#   up_enable_irq() and up_disable_irq().  But that is not true for all
+#   interrupt controller implementations.  For example, the PIC32MX
+#   interrupt controller manages interrupt sources that have a many-to-one
+#   relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
+#   must defined so that the OS logic will know not to assume it can use
+#   a vector number to enable or disable interrupts.
 # CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
@@ -81,6 +93,8 @@ CONFIG_BOARD_LOOPSPERMSEC=8079
 CONFIG_DRAM_SIZE=(32*1024)
 CONFIG_DRAM_START=0xa0000000
 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
+CONFIG_ARCH_NOINTC=n
+CONFIG_ARCH_VECNOTIRQ=y
 CONFIG_ARCH_IRQPRIO=y
 CONFIG_ARCH_INTERRUPTSTACK=n
 CONFIG_ARCH_STACKDUMP=y
diff --git a/nuttx/configs/pcblogic-pic32mx/ostest/defconfig b/nuttx/configs/pcblogic-pic32mx/ostest/defconfig
index 100b9f158..4a07a16d6 100644
--- a/nuttx/configs/pcblogic-pic32mx/ostest/defconfig
+++ b/nuttx/configs/pcblogic-pic32mx/ostest/defconfig
@@ -53,6 +53,18 @@
 # CONFIG_DRAM_SIZE - Describes the installed DRAM.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_END - Last address+1 of installed RAM
+# CONFIG_ARCH_NOINTC - define if the architecture does not
+#   support an interrupt controller or otherwise cannot support
+#   APIs like up_enable_irq() and up_disable_irq().
+# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
+#   to interfaces like irq_attach() and irq_detach are the same as IRQ
+#   numbers that are provied to IRQ management functions like
+#   up_enable_irq() and up_disable_irq().  But that is not true for all
+#   interrupt controller implementations.  For example, the PIC32MX
+#   interrupt controller manages interrupt sources that have a many-to-one
+#   relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
+#   must defined so that the OS logic will know not to assume it can use
+#   a vector number to enable or disable interrupts.
 # CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
@@ -81,6 +93,8 @@ CONFIG_BOARD_LOOPSPERMSEC=8079
 CONFIG_DRAM_SIZE=(32*1024)
 CONFIG_DRAM_START=0xa0000000
 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
+CONFIG_ARCH_NOINTC=n
+CONFIG_ARCH_VECNOTIRQ=y
 CONFIG_ARCH_IRQPRIO=y
 CONFIG_ARCH_INTERRUPTSTACK=n
 CONFIG_ARCH_STACKDUMP=y
diff --git a/nuttx/configs/pic32-starterkit/ostest/defconfig b/nuttx/configs/pic32-starterkit/ostest/defconfig
index 30bc31457..feffbc9a4 100644
--- a/nuttx/configs/pic32-starterkit/ostest/defconfig
+++ b/nuttx/configs/pic32-starterkit/ostest/defconfig
@@ -55,6 +55,18 @@
 # CONFIG_DRAM_SIZE - Describes the installed DRAM.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_END - Last address+1 of installed RAM
+# CONFIG_ARCH_NOINTC - define if the architecture does not
+#   support an interrupt controller or otherwise cannot support
+#   APIs like up_enable_irq() and up_disable_irq().
+# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
+#   to interfaces like irq_attach() and irq_detach are the same as IRQ
+#   numbers that are provied to IRQ management functions like
+#   up_enable_irq() and up_disable_irq().  But that is not true for all
+#   interrupt controller implementations.  For example, the PIC32MX
+#   interrupt controller manages interrupt sources that have a many-to-one
+#   relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
+#   must defined so that the OS logic will know not to assume it can use
+#   a vector number to enable or disable interrupts.
 # CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
@@ -80,6 +92,8 @@ CONFIG_BOARD_LOOPSPERMSEC=5560
 CONFIG_DRAM_SIZE=(128*1024)
 CONFIG_DRAM_START=0xa0000000
 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
+CONFIG_ARCH_NOINTC=n
+CONFIG_ARCH_VECNOTIRQ=y
 CONFIG_ARCH_IRQPRIO=y
 CONFIG_ARCH_INTERRUPTSTACK=n
 CONFIG_ARCH_STACKDUMP=y
diff --git a/nuttx/configs/sure-pic32mx/nsh/defconfig b/nuttx/configs/sure-pic32mx/nsh/defconfig
index 3f2d9edcb..518c75acd 100644
--- a/nuttx/configs/sure-pic32mx/nsh/defconfig
+++ b/nuttx/configs/sure-pic32mx/nsh/defconfig
@@ -55,6 +55,30 @@
 # CONFIG_DRAM_SIZE - Describes the installed DRAM.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_END - Last address+1 of installed RAM
+# CONFIG_ARCH_NOINTC - define if the architecture does not
+#   support an interrupt controller or otherwise cannot support
+#   APIs like up_enable_irq() and up_disable_irq().
+# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
+#   to interfaces like irq_attach() and irq_detach are the same as IRQ
+#   numbers that are provied to IRQ management functions like
+#   up_enable_irq() and up_disable_irq().  But that is not true for all
+#   interrupt controller implementations.  For example, the PIC32MX
+#   interrupt controller manages interrupt sources that have a many-to-one
+#   relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
+#   must defined so that the OS logic will know not to assume it can use
+#   a vector number to enable or disable interrupts.
+# CONFIG_ARCH_NOINTC - define if the architecture does not
+#   support an interrupt controller or otherwise cannot support
+#   APIs like up_enable_irq() and up_disable_irq().
+# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
+#   to interfaces like irq_attach() and irq_detach are the same as IRQ
+#   numbers that are provied to IRQ management functions like
+#   up_enable_irq() and up_disable_irq().  But that is not true for all
+#   interrupt controller implementations.  For example, the PIC32MX
+#   interrupt controller manages interrupt sources that have a many-to-one
+#   relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
+#   must defined so that the OS logic will know not to assume it can use
+#   a vector number to enable or disable interrupts.
 # CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
@@ -80,6 +104,8 @@ CONFIG_BOARD_LOOPSPERMSEC=4275
 CONFIG_DRAM_SIZE=(32*1024)
 CONFIG_DRAM_START=0xa0000000
 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
+CONFIG_ARCH_NOINTC=n
+CONFIG_ARCH_VECNOTIRQ=y
 CONFIG_ARCH_IRQPRIO=y
 CONFIG_ARCH_INTERRUPTSTACK=n
 CONFIG_ARCH_STACKDUMP=y
diff --git a/nuttx/configs/sure-pic32mx/ostest/defconfig b/nuttx/configs/sure-pic32mx/ostest/defconfig
index 838e553ef..d528c1bc9 100644
--- a/nuttx/configs/sure-pic32mx/ostest/defconfig
+++ b/nuttx/configs/sure-pic32mx/ostest/defconfig
@@ -55,6 +55,18 @@
 # CONFIG_DRAM_SIZE - Describes the installed DRAM.
 # CONFIG_DRAM_START - The start address of DRAM (physical)
 # CONFIG_DRAM_END - Last address+1 of installed RAM
+# CONFIG_ARCH_NOINTC - define if the architecture does not
+#   support an interrupt controller or otherwise cannot support
+#   APIs like up_enable_irq() and up_disable_irq().
+# CONFIG_ARCH_VECNOTIRQ - Usually the interrupt vector number provided
+#   to interfaces like irq_attach() and irq_detach are the same as IRQ
+#   numbers that are provied to IRQ management functions like
+#   up_enable_irq() and up_disable_irq().  But that is not true for all
+#   interrupt controller implementations.  For example, the PIC32MX
+#   interrupt controller manages interrupt sources that have a many-to-one
+#   relationship to interrupt vectors. In such cases, CONFIG_ARCH_VECNOTIRQ
+#   must defined so that the OS logic will know not to assume it can use
+#   a vector number to enable or disable interrupts.
 # CONFIG_ARCH_IRQPRIO - The PIC32MX supports interrupt prioritization
 # CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
 #   stack. If defined, this symbol is the size of the interrupt
@@ -80,6 +92,8 @@ CONFIG_BOARD_LOOPSPERMSEC=4275
 CONFIG_DRAM_SIZE=(32*1024)
 CONFIG_DRAM_START=0xa0000000
 CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
+CONFIG_ARCH_NOINTC=n
+CONFIG_ARCH_VECNOTIRQ=y
 CONFIG_ARCH_IRQPRIO=y
 CONFIG_ARCH_INTERRUPTSTACK=n
 CONFIG_ARCH_STACKDUMP=y