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author | Gregory Nutt <gnutt@nuttx.org> | 2013-11-15 09:30:05 -0600 |
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committer | Gregory Nutt <gnutt@nuttx.org> | 2013-11-15 09:30:05 -0600 |
commit | 6ce7e02551987f0b8643e02de47f808dd894f42c (patch) | |
tree | 1b036195da88ffa0b8f557d5955b981cac1028d9 /nuttx/configs | |
parent | 35924e56ce2178417dff1582c323f8c01a11337a (diff) | |
download | px4-nuttx-6ce7e02551987f0b8643e02de47f808dd894f42c.tar.gz px4-nuttx-6ce7e02551987f0b8643e02de47f808dd894f42c.tar.bz2 px4-nuttx-6ce7e02551987f0b8643e02de47f808dd894f42c.zip |
SAMA5 NAND: Basic support for access to NAND FLASH
Diffstat (limited to 'nuttx/configs')
-rw-r--r-- | nuttx/configs/sama5d3x-ek/src/Makefile | 6 | ||||
-rw-r--r-- | nuttx/configs/sama5d3x-ek/src/sam_nandflash.c | 140 |
2 files changed, 145 insertions, 1 deletions
diff --git a/nuttx/configs/sama5d3x-ek/src/Makefile b/nuttx/configs/sama5d3x-ek/src/Makefile index 89e330495..5d69c0fd3 100644 --- a/nuttx/configs/sama5d3x-ek/src/Makefile +++ b/nuttx/configs/sama5d3x-ek/src/Makefile @@ -58,10 +58,14 @@ ifeq ($(CONFIG_SAMA5_DDRCS),y) CSRCS += sam_sdram.c endif -ifeq ($(CONFIG_SAMA5_BOOT_CS0FLASH),y) +ifeq ($(CONFIG_SAMA5_EBICS0_NOR),y) CSRCS += sam_norflash.c endif +ifeq ($(CONFIG_SAMA5_EBICS3_NAND),y) +CSRCS += sam_nandflash.c +endif + ifeq ($(CONFIG_SAMA5_NOR_MAIN),y) CSRCS += nor_main.c endif diff --git a/nuttx/configs/sama5d3x-ek/src/sam_nandflash.c b/nuttx/configs/sama5d3x-ek/src/sam_nandflash.c new file mode 100644 index 000000000..8ad48ccc5 --- /dev/null +++ b/nuttx/configs/sama5d3x-ek/src/sam_nandflash.c @@ -0,0 +1,140 @@ +/**************************************************************************** + * configs/sama5d3x-ek/src/sam_norflash.c + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Most of this file derives from Atmel sample code for the SAMA5D3x-EK + * board. That sample code has licensing that is compatible with the NuttX + * modified BSD license: + * + * Copyright (c) 2012, Atmel Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor Atmel nor the names of its contributors may + * be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include <debug.h> + +#include "up_arch.h" +#include "sam_periphclks.h" +#include "sam_nand.h" +#include "chip/sam_hsmc.h" + +#include "sama5d3x-ek.h" + +#ifdef CONFIG_SAMA5_BOOT_CS3FLASH + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: board_nandflash_config + * + * Description: + * If CONFIG_SAMA5_BOOT_CS3FLASH is defined, then NAND FLASH support is + * enabled. This function provides the board-specific implementation of + * the logic to reprogram the SMC to support NAND FLASH on the specified + * CS. + * + * Input Parameters: + * cs - Chip select number (in the event that multiple NAND devices + * are connected on-board). + * + * Returned Values: + * OK if the HSMC was successfully configured for this CS. A negated + * errno value is returned on a failure. This would fail with -ENODEV, + * for example, if the board does not support NAND FLASH on the requested + * CS. + * + ****************************************************************************/ + +int board_nandflash_config(int cs) +{ + uint32_t regval; + + /* The Embest and Ronetix CM boards and one Hynix NAND HY27UF(08/16)2G2B + * Series NAND (MT29F2G08ABAEAWP). This part has a capacity of 256Mx8bit + * () with spare 8Mx8 bit capacity. The device contains 2048 blocks, composed + * by 64 x 2112 byte pages. The effective size is approximately 256MiB. + * + * NAND is available on CS3. + */ + + if (cs == HSMC_CS3) + { + /* Make sure that the SMC peripheral is enabled. */ + + sam_hsmc_enableclk(); + + /* Configure the SMC */ + + regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(1) | + HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(1); + putreg32(regval, SAM_HSMC_SETUP(HSMC_CS3)); + + regval = HSMC_PULSE_NWE_PULSE(5) | HSMC_PULSE_NCS_WRPULSE(7) | + HSMC_PULSE_NRD_PULSE(5) | HSMC_PULSE_NCS_RDPULSE(7); + putreg32(regval, SAM_HSMC_PULSE(HSMC_CS3)); + + regval = HSMC_CYCLE_NWE_CYCLE(8) | HSMC_CYCLE_NRD_CYCLE(9); + putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS3)); + + regval = HSMC_TIMINGS_TCLR(3) | HSMC_TIMINGS_TADL(10) | + HSMC_TIMINGS_TAR(3) | HSMC_TIMINGS_TRR(4) | + HSMC_TIMINGS_TWB(5) | HSMC_TIMINGS_RBNSEL(3) | + HSMC_TIMINGS_NFSEL; + putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS3)); + + regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE | + HSMC_MODE_BIT_8 | HSMC_MODE_TDFCYCLES(1); + putreg32(regval, SAM_HSMC_MODE(HSMC_CS3)); + + return OK; + } + + return -ENODEV; +} + +#endif /* CONFIG_SAMA5_BOOT_CS3FLASH */ |