diff options
author | Gregory Nutt <gnutt@nuttx.org> | 2013-06-22 17:01:44 -0600 |
---|---|---|
committer | Gregory Nutt <gnutt@nuttx.org> | 2013-06-22 17:01:44 -0600 |
commit | bc275cdcafb407c3f95626e606e753872c25dbf1 (patch) | |
tree | b9fe7d479ea3dc13a4147443d9b14b57a4eccf35 /nuttx/drivers/net | |
parent | 2ea1dd8c2ca683824db4cc7714f05ea48545605b (diff) | |
download | px4-nuttx-bc275cdcafb407c3f95626e606e753872c25dbf1.tar.gz px4-nuttx-bc275cdcafb407c3f95626e606e753872c25dbf1.tar.bz2 px4-nuttx-bc275cdcafb407c3f95626e606e753872c25dbf1.zip |
Beginning debug of SAM4L Xplained SLCD
Diffstat (limited to 'nuttx/drivers/net')
-rw-r--r-- | nuttx/drivers/net/enc28j60.c | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/nuttx/drivers/net/enc28j60.c b/nuttx/drivers/net/enc28j60.c index 6b4408f12..b6e265bc2 100644 --- a/nuttx/drivers/net/enc28j60.c +++ b/nuttx/drivers/net/enc28j60.c @@ -156,16 +156,21 @@ #define ALIGNED_BUFSIZE ((CONFIG_NET_BUFSIZE + 255) & ~255) -#if 0 /* Fix for Errata #5 */ -# define PKTMEM_TX_START 0x0000 /* Start TX buffer at 0 */ -# define PKTMEM_TX_ENDP1 ALIGNED_BUFSIZE /* Allow TX buffer for one frame */ -# define PKTMEM_RX_START PKTMEM_TX_ENDP1 /* Followed by RX buffer */ -# define PKTMEM_RX_END PKTMEM_END /* RX buffer goes to the end of SRAM */ +/* Work around Errata #5 (spurious reset of ERXWRPT to 0) by placing the RX + * FIFO at the beginning of packet memory. + */ + +#define ERRATA5 1 +#if ERRATA5 +# define PKTMEM_RX_START 0x0000 /* RX buffer must be at addr 0 for errata 5 */ +# define PKTMEM_RX_END (PKTMEM_END-ALIGNED_BUFSIZE) /* RX buffer length is total SRAM minus TX buffer */ +# define PKTMEM_TX_START (PKTMEM_RX_END+1) /* Start TX buffer after */ +# define PKTMEM_TX_ENDP1 (PKTMEM_TX_START+ALIGNED_BUFSIZE) /* Allow TX buffer for one frame */ #else -# define PKTMEM_RX_START 0x0000 -# define PKTMEM_RX_END (PKTMEM_END-ALIGNED_BUFSIZE) -# define PKTMEM_TX_START (PKTMEM_RX_END+1) -# define PKTMEM_TX_ENDP1 (PKTMEM_TX_START+ALIGNED_BUFSIZE) +# define PKTMEM_TX_START 0x0000 /* Start TX buffer at 0 */ +# define PKTMEM_TX_ENDP1 ALIGNED_BUFSIZE /* Allow TX buffer for one frame */ +# define PKTMEM_RX_START PKTMEM_TX_ENDP1 /* Followed by RX buffer */ +# define PKTMEM_RX_END PKTMEM_END /* RX buffer goes to the end of SRAM */ #endif /* Misc. Helper Macros ******************************************************/ |