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author | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-06-13 16:30:00 +0000 |
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committer | patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3> | 2010-06-13 16:30:00 +0000 |
commit | eaa1d21a966ad397b565bb824d14e15b78af2f38 (patch) | |
tree | 4dfa779d8a5073efcb89d7103f971c8ff6375d91 /nuttx | |
parent | 0798efef0c881858173d0001682526195e5a6b85 (diff) | |
download | px4-nuttx-eaa1d21a966ad397b565bb824d14e15b78af2f38.tar.gz px4-nuttx-eaa1d21a966ad397b565bb824d14e15b78af2f38.tar.bz2 px4-nuttx-eaa1d21a966ad397b565bb824d14e15b78af2f38.zip |
USB config update
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2744 42af7a65-404d-4744-a932-0658087f49c3
Diffstat (limited to 'nuttx')
-rwxr-xr-x | nuttx/arch/arm/src/lpc17xx/lpc17_usbdev.c | 59 | ||||
-rwxr-xr-x | nuttx/configs/nucleus2g/README.txt | 17 | ||||
-rwxr-xr-x | nuttx/configs/nucleus2g/ostest/defconfig | 21 |
3 files changed, 64 insertions, 33 deletions
diff --git a/nuttx/arch/arm/src/lpc17xx/lpc17_usbdev.c b/nuttx/arch/arm/src/lpc17xx/lpc17_usbdev.c index cf77f07a4..f1bd5e23f 100755 --- a/nuttx/arch/arm/src/lpc17xx/lpc17_usbdev.c +++ b/nuttx/arch/arm/src/lpc17xx/lpc17_usbdev.c @@ -208,30 +208,6 @@ #define LPC17_READOVERRUN_BIT (0x80000000) #define LPC17_READOVERRUN(s) (((s) & LPC17_READOVERRUN_BIT) != 0) -/* USB RAM ******************************************************************** - * - * UBS_UDCA is is list of 32 pointers to DMA desciptors located at the - * beginning of USB RAM. Each pointer points to a DMA descriptor with - * assocated DMA buffer. - */ - -#define USB_UDCA (uint32_t*)LPC17_USBDEV_RAMBASE) -#define USB_USCASIZE (LPC17_NPHYSENDPOINTS*sizeof(uint32_t)) - -/* Each descriptor must be aligned to a 128 address boundary */ - -#define USB_DDALIGNDOWN(a) ((a)&~0x7f) -#define USB_DDALIGNUP(a) USB_DDALIGNDOWN((a)+0x7f) - -#define USB_DDSIZE USB_DDALIGNDOWN((LPC17_USBDEV_RAMSIZE-USB_USCASIZE)/CONFIG_LPC17_USBDEV_NDMADESCRIPTORS) -#define USB_DDESC ((struct lpc17_dmadesc_s*)(LPC17_USBDEV_RAMBASE+USB_USCASIZE)) - -#ifdef CONFIG_USBDEV_ISOCHRONOUS -# define USB_DDESCSIZE (5*sizeof(uint32_t)) -#else -# define USB_DDESCSIZE (4*sizeof(uint32_t)) -#endif - /* Endpoints ******************************************************************/ /* Number of endpoints */ @@ -321,14 +297,13 @@ struct lpc17_ep_s #ifdef CONFIG_LPC17_USBDEV_DMA struct lpc17_dmadesc_s { - uint32_t nextdesc; /* Address of the next DMA descripto in RAM */ + uint32_t nextdesc; /* Address of the next DMA descriptor in RAM */ uint32_t config; /* Misc. bit encoded configuration information */ uint32_t start; /* DMA start address */ uint32_t status; /* Misc. bit encoded status inforamation */ #ifdef CONFIG_USBDEV_ISOCHRONOUS uint32_t size; /* Isochronous packet size address */ #endif - uint8_t buffer[USB_DDSIZE-USB_DDESCSIZE]; }; #endif @@ -500,6 +475,26 @@ static const struct usbdev_ops_s g_devops = .pullup = lpc17_pullup, }; +/* USB Device Communication Area *********************************************** + * + * The CPU and DMA controller communicate through a common area of memory, called + * the USB Device Communication Area, or UDCA. The UDCA is a 32-word array of DMA + * Descriptor Pointers (DDPs), each of which corresponds to a physical endpoint. + * Each DDP points to the start address of a DMA Descriptor, if one is defined for + * the endpoint. DDPs for unrealized endpoints and endpoints disabled for DMA + * operation are ignored and can be set to a NULL (0x0) value. + * + * The start address of the UDCA is stored in the USBUDCAH register. The UDCA can + * reside at any 128-byte boundary of RAM that is accessible to both the CPU and DMA + * controller (on other MCU's like the LPC2148, the UDCA lies in a specialized + * 8Kb memory region). + */ + +#ifdef CONFIG_LPC17_USBDEV_DMA +static uint32_t g_udca[LPC17_NPHYSENDPOINTS] __attribute__ ((aligned (128))); +static struct lpc17_dmadesc_s g_usbddesc[CONFIG_LPC17_USBDEV_NDMADESCRIPTORS]; +#endif + /******************************************************************************* * Public Data *******************************************************************************/ @@ -1362,18 +1357,18 @@ static inline void lpc17_dmareset(uint32_t enable) for (i = 0; i < LPC17_NPHYSENDPOINTS; ++i) { - USB_UDCA[i] = NULL; + g_udca[i] = NULL; } /* Set USB UDCA Head register */ - lpc17_putreg((uint32_t)USB_UDCA, LPC17_USBDEV_UDCAH); + lpc17_putreg((uint32_t)g_udca, LPC17_USBDEV_UDCAH); /* Invalidate all DMA descriptors */ for (i = 0; i < CONFIG_LPC17_USBDEV_NDMADESCRIPTORS; ++i) { - memset(&USB_DDESC[i], 0, USB_DDESCSIZE); + memset(&g_usbddesc[i], 0, sizeof(struct lpc17_dmadesc_s)); } /* Enable DMA interrupts */ @@ -2635,8 +2630,8 @@ static FAR void *lpc17_epallocbuffer(FAR struct usbdev_ep_s *ep, uint16_t nbytes /* Set UDCA to the allocated DMA descriptor for this endpoint */ - USB_UDCA[privep->epphy] = &USB_DDESC[descndx]; - return &USB_DDESC[descndx] + g_udca[privep->epphy] = &g_usbddesc[descndx]; + return &g_usbddesc[descndx] } #endif @@ -2657,7 +2652,7 @@ static void lpc17_epfreebuffer(FAR struct usbdev_ep_s *ep, FAR void *buf) /* Indicate that there is no DMA descriptor associated with this endpoint */ - USB_UDCA[privep->epphy] = NULL; + g_udca[privep->epphy] = NULL; /* Mark the DMA descriptor as free for re-allocation */ diff --git a/nuttx/configs/nucleus2g/README.txt b/nuttx/configs/nucleus2g/README.txt index d2cfd733c..d77c77c83 100755 --- a/nuttx/configs/nucleus2g/README.txt +++ b/nuttx/configs/nucleus2g/README.txt @@ -318,7 +318,7 @@ Nucleus 2G Configuration Options CONFIG_LPC17_ADC=n
CONFIG_LPC17_DAC=n
CONFIG_LPC17_GPDMA=n
- CONFIG_LP17_FLASH=n
+ CONFIG_LPC17_FLASH=n
LPC17xx specific device driver settings
@@ -333,6 +333,21 @@ Nucleus 2G Configuration Options CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_UARTn_2STOP - Two stop bits
+ LPC17xx USB Configuration
+
+ CONFIG_LPC17_USBDEV_FRAME_INTERRUPT
+ Handle USB Start-Of-Frame events.
+ Enable reading SOF from interrupt handler vs. simply reading on demand.
+ Probably a bad idea... Unless there is some issue with sampling the SOF
+ from hardware asynchronously.
+ CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT
+ Enable high priority interrupts. I have no idea why you might want to
+ do that
+ CONFIG_LPC17_USBDEV_NDMADESCRIPTORS
+ Number of DMA descriptors to allocate in SRAM.
+ CONFIG_LPC17_USBDEV_DMA
+ Enable lpc17xx-specific DMA support
+
Configurations
^^^^^^^^^^^^^^
diff --git a/nuttx/configs/nucleus2g/ostest/defconfig b/nuttx/configs/nucleus2g/ostest/defconfig index 26b9035cd..93a11c454 100755 --- a/nuttx/configs/nucleus2g/ostest/defconfig +++ b/nuttx/configs/nucleus2g/ostest/defconfig @@ -558,6 +558,27 @@ CONFIG_USBDEV_TRACE=n CONFIG_USBDEV_TRACE_NRECORDS=128 # +# LPC17xx USB Configuration +# +# CONFIG_LPC17_USBDEV_FRAME_INTERRUPT +# Handle USB Start-Of-Frame events. +# Enable reading SOF from interrupt handler vs. simply reading on demand. +# Probably a bad idea... Unless there is some issue with sampling the SOF +# from hardware asynchronously. +# CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT +# Enable high priority interrupts. I have no idea why you might want to +# do that +# CONFIG_LPC17_USBDEV_NDMADESCRIPTORS +# Number of DMA descriptors to allocate in SRAM. +# CONFIG_LPC17_USBDEV_DMA +# Enable lpc17xx-specific DMA support +# +CONFIG_LPC17_USBDEV_FRAME_INTERRUPT=n +CONFIG_LPC17_USBDEV_EPFAST_INTERRUPT=n +CONFIG_LPC17_USBDEV_DMA=n +CONFIG_LPC17_USBDEV_NDMADESCRIPTORS=0 +CONFIG_LPC17_USBDEV_DMAINTMASK=0 +# # USB Serial Device Configuration # # CONFIG_USBSER |