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| author | Gregory Nutt <gnutt@nuttx.org> | 2015-03-13 10:37:21 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2015-03-13 10:37:21 -0600 |
| commit | db15472483516a1e9814868fcc367f796698987a (patch) | |
| tree | 96e35342122e4c02cb3f15cc85e358ee34cb9f55 /nuttx | |
| parent | 0c8263ad4c82b734931a8e8ce0c0c862e3c9ad72 (diff) | |
| download | px4-nuttx-db15472483516a1e9814868fcc367f796698987a.tar.gz px4-nuttx-db15472483516a1e9814868fcc367f796698987a.tar.bz2 px4-nuttx-db15472483516a1e9814868fcc367f796698987a.zip | |
Fix a typo in a Cortex-M7 address
Diffstat (limited to 'nuttx')
| -rw-r--r-- | nuttx/arch/arm/src/armv7-m/nvic.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/nuttx/arch/arm/src/armv7-m/nvic.h b/nuttx/arch/arm/src/armv7-m/nvic.h index bba30f44a..a8f5049ee 100644 --- a/nuttx/arch/arm/src/armv7-m/nvic.h +++ b/nuttx/arch/arm/src/armv7-m/nvic.h @@ -224,7 +224,7 @@ #define NVIC_DCISW_OFFSET 0x0f60 /* D-Cache Invalidate by Set-way (Cortex-M7) */ #define NVIC_DCCMVAU_OFFSET 0x0f64 /* D-Cache Clean by MVA to PoU (Cortex-M7) */ #define NVIC_DCCMVAC_OFFSET 0x0f68 /* D-Cache Clean by MVA to PoC (Cortex-M7) */ -#define NVIC_DCCSW_OFFSET 0x0f62 /* D-Cache Clean by Set-way (Cortex-M7) */ +#define NVIC_DCCSW_OFFSET 0x0f6c /* D-Cache Clean by Set-way (Cortex-M7) */ #define NVIC_DCCIMVAC_OFFSET 0x0f70 /* D-Cache Clean and Invalidate by MVA to PoC (Cortex-M7) */ #define NVIC_DCCISW_OFFSET 0x0f74 /* D-Cache Clean and Invalidate by Set-way (Cortex-M7) */ #define NVIC_ITCMCR_OFFSET 0x0f90 /* Instruction Tightly-Coupled Memory Control Register */ |