1 files changed, 28 insertions, 40 deletions
diff --git a/nuttx/arch/arm/include/armv6-m/irq.h b/nuttx/arch/arm/include/armv6-m/irq.h
index f4b026c41..4538317e3 100644
--- a/nuttx/arch/arm/include/armv6-m/irq.h
+++ b/nuttx/arch/arm/include/armv6-m/irq.h
@@ -71,7 +71,7 @@
  */
 
 #define REG_R13             (0)  /* R13 = SP at time of interrupt */
-#define REG_BASEPRI         (1)  /* BASEPRI */
+#define REG_PRIMASK         (1)  /* PRIMASK */
 #define REG_R4              (2)  /* R4 */
 #define REG_R5              (3)  /* R5 */
 #define REG_R6              (4)  /* R6 */
@@ -176,7 +176,7 @@ struct xcptcontext
    */
 
   uint32_t saved_pc;
-  uint32_t saved_basepri;
+  uint32_t saved_primask;
   uint32_t saved_xpsr;
 
 # ifdef CONFIG_NUTTX_KERNEL
@@ -237,44 +237,12 @@ static inline void setprimask(uint32_t primask)
       : "memory");
 }
 
-/* Get/set the BASEPRI register.  The BASEPRI register defines the minimum
- * priority for exception processing. When BASEPRI is set to a nonzero
- * value, it prevents the activation of all exceptions with the same or
- * lower priority level as the BASEPRI value.
- */
-
-static inline uint8_t getbasepri(void) inline_function;
-static inline uint8_t getbasepri(void)
-{
-  uint32_t basepri;
-
-  __asm__ __volatile__
-    (
-     "\tmrs  %0, basepri\n"
-     : "=r" (basepri)
-     :
-     : "memory");
-
-  return (uint8_t)basepri;
-}
-
-static inline void setbasepri(uint32_t basepri) inline_function;
-static inline void setbasepri(uint32_t basepri)
-{
-  __asm__ __volatile__
-    (
-      "\tmsr basepri, %0\n"
-      :
-      : "r" (basepri)
-      : "memory");
-}
-
 /* Disable IRQs */
 
 static inline void irqdisable(void) inline_function;
 static inline void irqdisable(void)
 {
-  setbasepri(NVIC_SYSH_DISABLE_PRIORITY);
+  __asm__ __volatile__ ("\tcpsid  i\n");
 }
 
 /* Save the current primask state & disable IRQs */
@@ -282,9 +250,21 @@ static inline void irqdisable(void)
 static inline irqstate_t irqsave(void) inline_function;
 static inline irqstate_t irqsave(void)
 {
-  uint8_t basepri = getbasepri();
-  setbasepri(NVIC_SYSH_DISABLE_PRIORITY);
-  return (irqstate_t)basepri;
+  unsigned short primask;
+
+  /* Return the current value of primask register and set
+   * bit 0 of the primask register to disable interrupts
+   */
+
+  __asm__ __volatile__
+    (
+     "\tmrs    %0, primask\n"
+     "\tcpsid  i\n"
+     : "=r" (primask)
+     :
+     : "memory");
+
+  return primask;
 }
 
 /* Enable IRQs */
@@ -292,7 +272,6 @@ static inline irqstate_t irqsave(void)
 static inline void irqenable(void) inline_function;
 static inline void irqenable(void)
 {
-  setbasepri(0);
   __asm__ __volatile__ ("\tcpsie  i\n");
 }
 
@@ -301,7 +280,16 @@ static inline void irqenable(void)
 static inline void irqrestore(irqstate_t flags) inline_function;
 static inline void irqrestore(irqstate_t flags)
 {
-  setbasepri((uint32_t)flags);
+  /* If bit 0 of the primask is 0, then we need to restore
+   * interrupts.
+   */
+
+  __asm__ __volatile__
+    (
+      "\tmsr primask, %0\n"
+      :
+      : "r" (flags)
+      : "memory");
 }
 
 /* Get/set IPSR */