diff options
Diffstat (limited to 'nuttx/arch/arm/include/sam3u/chip.h')
| -rw-r--r-- | nuttx/arch/arm/include/sam3u/chip.h | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/nuttx/arch/arm/include/sam3u/chip.h b/nuttx/arch/arm/include/sam3u/chip.h index da8c28345..afd475faf 100644 --- a/nuttx/arch/arm/include/sam3u/chip.h +++ b/nuttx/arch/arm/include/sam3u/chip.h @@ -51,19 +51,19 @@ #ifdef CONFIG_ARCH_CHIP_AT91SAM3U4E /* Internal memory */ -# define CONFIG_SAM3U_SRAM0_SIZE 0x00008000 /* 32Kb */ -# define CONFIG_SAM3U_SRAM1_SIZE 0x00004000 /* 16Kb */ -# define CONFIG_SAM3U_NFCSRAM_SIZE 0x00001000 /* 4Kb */ +# define CONFIG_SAM34_SRAM0_SIZE 0x00008000 /* 32Kb */ +# define CONFIG_SAM34_SRAM1_SIZE 0x00004000 /* 16Kb */ +# define CONFIG_SAM34_NFCSRAM_SIZE 0x00001000 /* 4Kb */ /* DMA */ -# define CONFIG_SAM3U_NDMACHAN 4 /* 4 DMA Channels */ +# define CONFIG_SAM34_NDMACHAN 4 /* 4 DMA Channels */ /* Memory card interface */ -# define CONFIG_SAM3U_MCI2 1 +# define CONFIG_SAM34_MCI2 1 #else -# error "Unknown SAM3U chip type" +# error "Unknown SAM3/4 chip type" #endif /* NVIC priority levels *************************************************************/ @@ -71,14 +71,14 @@ * the priority of the corresponding interrupt. The processor implements only * bits[7:4] of each field, bits[3:0] read as zero and ignore writes. */ - -#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits[7:4] set is minimum priority */ -#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */ -#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */ -#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */ - -#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP) -#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX + +#define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits[7:4] set is minimum priority */ +#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */ +#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */ +#define NVIC_SYSH_PRIORITY_STEP 0x10 /* Four bits of interrupt priority used */ + +#define NVIC_SYSH_DISABLE_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP) +#define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX /************************************************************************************ * Public Types |