diff options
Diffstat (limited to 'nuttx/arch/arm/include/sam3u/irq.h')
-rwxr-xr-x | nuttx/arch/arm/include/sam3u/irq.h | 127 |
1 files changed, 126 insertions, 1 deletions
diff --git a/nuttx/arch/arm/include/sam3u/irq.h b/nuttx/arch/arm/include/sam3u/irq.h index b2df14c88..d36d39a88 100755 --- a/nuttx/arch/arm/include/sam3u/irq.h +++ b/nuttx/arch/arm/include/sam3u/irq.h @@ -136,7 +136,132 @@ #define SAM3U_IRQ_ADC (SAM3U_IRQ_EXTINT+SAM3U_PID_ADC) /* 10-bit ADC Controller */ #define SAM3U_IRQ_DMAC (SAM3U_IRQ_EXTINT+SAM3U_PID_DMAC) /* DMA Controller */ #define SAM3U_IRQ_UDPHS (SAM3U_IRQ_EXTINT+SAM3U_PID_UDPHS) /* USB Device High Speed */ -#define NR_IRQS (SAM3U_IRQ_EXTINT+NR_PIDS) /* Total number of IRQ numbers */ +#define SAM3U_IRQ_NEXTINT NR_PIDS /* Total number of external interrupt numbers */ +#define SAM3U_IRQ_NIRQS (SAM3U_IRQ_EXTINT+NR_PIDS) /* The number of real IRQs */ + +/* GPIO interrupts (derived from SAM3U_IRQ_PIOA/B/C) */ + +#ifdef CONFIG_GPIOA_IRQ +# define SAM3U_IRQ_GPIOA_PINS (SAM3U_IRQ_EXTINT+SAM3U_IRQ_NEXTINT) +# define SAM3U_IRQ_PA0 (SAM3U_IRQ_GPIOA_PINS+0) /* GPIOA, PIN 0 */ +# define SAM3U_IRQ_PA1 (SAM3U_IRQ_GPIOA_PINS+1) /* GPIOA, PIN 1 */ +# define SAM3U_IRQ_PA2 (SAM3U_IRQ_GPIOA_PINS+2) /* GPIOA, PIN 2 */ +# define SAM3U_IRQ_PA3 (SAM3U_IRQ_GPIOA_PINS+3) /* GPIOA, PIN 3 */ +# define SAM3U_IRQ_PA4 (SAM3U_IRQ_GPIOA_PINS+4) /* GPIOA, PIN 4 */ +# define SAM3U_IRQ_PA5 (SAM3U_IRQ_GPIOA_PINS+5) /* GPIOA, PIN 5 */ +# define SAM3U_IRQ_PA6 (SAM3U_IRQ_GPIOA_PINS+6) /* GPIOA, PIN 6 */ +# define SAM3U_IRQ_PA7 (SAM3U_IRQ_GPIOA_PINS+7) /* GPIOA, PIN 7 */ +# define SAM3U_IRQ_PA8 (SAM3U_IRQ_GPIOA_PINS+8) /* GPIOA, PIN 8 */ +# define SAM3U_IRQ_PA9 (SAM3U_IRQ_GPIOA_PINS+9) /* GPIOA, PIN 9 */ +# define SAM3U_IRQ_PA10 (SAM3U_IRQ_GPIOA_PINS+10) /* GPIOA, PIN 10 */ +# define SAM3U_IRQ_PA11 (SAM3U_IRQ_GPIOA_PINS+11) /* GPIOA, PIN 11 */ +# define SAM3U_IRQ_PA12 (SAM3U_IRQ_GPIOA_PINS+12) /* GPIOA, PIN 12 */ +# define SAM3U_IRQ_PA13 (SAM3U_IRQ_GPIOA_PINS+13) /* GPIOA, PIN 13 */ +# define SAM3U_IRQ_PA14 (SAM3U_IRQ_GPIOA_PINS+14) /* GPIOA, PIN 14 */ +# define SAM3U_IRQ_PA15 (SAM3U_IRQ_GPIOA_PINS+15) /* GPIOA, PIN 15 */ +# define SAM3U_IRQ_PA16 (SAM3U_IRQ_GPIOA_PINS+16) /* GPIOA, PIN 16 */ +# define SAM3U_IRQ_PA17 (SAM3U_IRQ_GPIOA_PINS+17) /* GPIOA, PIN 17 */ +# define SAM3U_IRQ_PA18 (SAM3U_IRQ_GPIOA_PINS+18) /* GPIOA, PIN 18 */ +# define SAM3U_IRQ_PA19 (SAM3U_IRQ_GPIOA_PINS+19) /* GPIOA, PIN 19 */ +# define SAM3U_IRQ_PA20 (SAM3U_IRQ_GPIOA_PINS+20) /* GPIOA, PIN 20 */ +# define SAM3U_IRQ_PA21 (SAM3U_IRQ_GPIOA_PINS+21) /* GPIOA, PIN 21 */ +# define SAM3U_IRQ_PA22 (SAM3U_IRQ_GPIOA_PINS+22) /* GPIOA, PIN 22 */ +# define SAM3U_IRQ_PA23 (SAM3U_IRQ_GPIOA_PINS+23) /* GPIOA, PIN 23 */ +# define SAM3U_IRQ_PA24 (SAM3U_IRQ_GPIOA_PINS+24) /* GPIOA, PIN 24 */ +# define SAM3U_IRQ_PA25 (SAM3U_IRQ_GPIOA_PINS+25) /* GPIOA, PIN 25 */ +# define SAM3U_IRQ_PA26 (SAM3U_IRQ_GPIOA_PINS+26) /* GPIOA, PIN 26 */ +# define SAM3U_IRQ_PA27 (SAM3U_IRQ_GPIOA_PINS+27) /* GPIOA, PIN 27 */ +# define SAM3U_IRQ_PA28 (SAM3U_IRQ_GPIOA_PINS+28) /* GPIOA, PIN 28 */ +# define SAM3U_IRQ_PA29 (SAM3U_IRQ_GPIOA_PINS+29) /* GPIOA, PIN 29 */ +# define SAM3U_IRQ_PA30 (SAM3U_IRQ_GPIOA_PINS+30) /* GPIOA, PIN 30 */ +# define SAM3U_IRQ_PA31 (SAM3U_IRQ_GPIOA_PINS+31) /* GPIOA, PIN 31 */ +# define SAM3U_NGPIOAIRQS 32 +#else +# define SAM3U_NGPIOAIRQS 0 +#endif + +#ifdef CONFIG_GPIOB_IRQ +# define SAM3U_IRQ_GPIOB_PINS (SAM3U_IRQ_EXTINT+SAM3U_IRQ_NEXTINT+SAM3U_IRQ_GPIOA_PINS) +# define SAM3U_IRQ_PB0 (SAM3U_IRQ_GPIOB_PINS+0) /* GPIOB, PIN 0 */ +# define SAM3U_IRQ_PB1 (SAM3U_IRQ_GPIOB_PINS+1) /* GPIOB, PIN 1 */ +# define SAM3U_IRQ_PB2 (SAM3U_IRQ_GPIOB_PINS+2) /* GPIOB, PIN 2 */ +# define SAM3U_IRQ_PB3 (SAM3U_IRQ_GPIOB_PINS+3) /* GPIOB, PIN 3 */ +# define SAM3U_IRQ_PB4 (SAM3U_IRQ_GPIOB_PINS+4) /* GPIOB, PIN 4 */ +# define SAM3U_IRQ_PB5 (SAM3U_IRQ_GPIOB_PINS+5) /* GPIOB, PIN 5 */ +# define SAM3U_IRQ_PB6 (SAM3U_IRQ_GPIOB_PINS+6) /* GPIOB, PIN 6 */ +# define SAM3U_IRQ_PB7 (SAM3U_IRQ_GPIOB_PINS+7) /* GPIOB, PIN 7 */ +# define SAM3U_IRQ_PB8 (SAM3U_IRQ_GPIOB_PINS+8) /* GPIOB, PIN 8 */ +# define SAM3U_IRQ_PB9 (SAM3U_IRQ_GPIOB_PINS+9) /* GPIOB, PIN 9 */ +# define SAM3U_IRQ_PB10 (SAM3U_IRQ_GPIOB_PINS+10) /* GPIOB, PIN 10 */ +# define SAM3U_IRQ_PB11 (SAM3U_IRQ_GPIOB_PINS+11) /* GPIOB, PIN 11 */ +# define SAM3U_IRQ_PB12 (SAM3U_IRQ_GPIOB_PINS+12) /* GPIOB, PIN 12 */ +# define SAM3U_IRQ_PB13 (SAM3U_IRQ_GPIOB_PINS+13) /* GPIOB, PIN 13 */ +# define SAM3U_IRQ_PB14 (SAM3U_IRQ_GPIOB_PINS+14) /* GPIOB, PIN 14 */ +# define SAM3U_IRQ_PB15 (SAM3U_IRQ_GPIOB_PINS+15) /* GPIOB, PIN 15 */ +# define SAM3U_IRQ_PB16 (SAM3U_IRQ_GPIOB_PINS+16) /* GPIOB, PIN 16 */ +# define SAM3U_IRQ_PB17 (SAM3U_IRQ_GPIOB_PINS+17) /* GPIOB, PIN 17 */ +# define SAM3U_IRQ_PB18 (SAM3U_IRQ_GPIOB_PINS+18) /* GPIOB, PIN 18 */ +# define SAM3U_IRQ_PB19 (SAM3U_IRQ_GPIOB_PINS+19) /* GPIOB, PIN 19 */ +# define SAM3U_IRQ_PB20 (SAM3U_IRQ_GPIOB_PINS+20) /* GPIOB, PIN 20 */ +# define SAM3U_IRQ_PB21 (SAM3U_IRQ_GPIOB_PINS+21) /* GPIOB, PIN 21 */ +# define SAM3U_IRQ_PB22 (SAM3U_IRQ_GPIOB_PINS+22) /* GPIOB, PIN 22 */ +# define SAM3U_IRQ_PB23 (SAM3U_IRQ_GPIOB_PINS+23) /* GPIOB, PIN 23 */ +# define SAM3U_IRQ_PB24 (SAM3U_IRQ_GPIOB_PINS+24) /* GPIOB, PIN 24 */ +# define SAM3U_IRQ_PB25 (SAM3U_IRQ_GPIOB_PINS+25) /* GPIOB, PIN 25 */ +# define SAM3U_IRQ_PB26 (SAM3U_IRQ_GPIOB_PINS+26) /* GPIOB, PIN 26 */ +# define SAM3U_IRQ_PB27 (SAM3U_IRQ_GPIOB_PINS+27) /* GPIOB, PIN 27 */ +# define SAM3U_IRQ_PB28 (SAM3U_IRQ_GPIOB_PINS+28) /* GPIOB, PIN 28 */ +# define SAM3U_IRQ_PB29 (SAM3U_IRQ_GPIOB_PINS+29) /* GPIOB, PIN 29 */ +# define SAM3U_IRQ_PB30 (SAM3U_IRQ_GPIOB_PINS+30) /* GPIOB, PIN 30 */ +# define SAM3U_IRQ_PB31 (SAM3U_IRQ_GPIOB_PINS+31) /* GPIOB, PIN 31 */ +# define SAM3U_NGPIOAIRQS 32 +#else +# define SAM3U_NGPIOBIRQS 0 +#endif + +#ifdef CONFIG_GPIOC_IRQ +# define SAM3U_IRQ_GPIOC_PINS (SAM3U_IRQ_EXTINT+SAM3U_IRQ_NEXTINT+SAM3U_IRQ_GPIOA_PINS+SAM3U_IRQ_GPIOB_PINS) +# define SAM3U_IRQ_PC0 (SAM3U_IRQ_GPIOC_PINS+0) /* GPIOC, PIN 0 */ +# define SAM3U_IRQ_PC1 (SAM3U_IRQ_GPIOC_PINS+1) /* GPIOC, PIN 1 */ +# define SAM3U_IRQ_PC2 (SAM3U_IRQ_GPIOC_PINS+2) /* GPIOC, PIN 2 */ +# define SAM3U_IRQ_PC3 (SAM3U_IRQ_GPIOC_PINS+3) /* GPIOC, PIN 3 */ +# define SAM3U_IRQ_PC4 (SAM3U_IRQ_GPIOC_PINS+4) /* GPIOC, PIN 4 */ +# define SAM3U_IRQ_PC5 (SAM3U_IRQ_GPIOC_PINS+5) /* GPIOC, PIN 5 */ +# define SAM3U_IRQ_PC6 (SAM3U_IRQ_GPIOC_PINS+6) /* GPIOC, PIN 6 */ +# define SAM3U_IRQ_PC7 (SAM3U_IRQ_GPIOC_PINS+7) /* GPIOC, PIN 7 */ +# define SAM3U_IRQ_PC8 (SAM3U_IRQ_GPIOC_PINS+8) /* GPIOC, PIN 8 */ +# define SAM3U_IRQ_PC9 (SAM3U_IRQ_GPIOC_PINS+9) /* GPIOC, PIN 9 */ +# define SAM3U_IRQ_PC10 (SAM3U_IRQ_GPIOC_PINS+10) /* GPIOC, PIN 10 */ +# define SAM3U_IRQ_PC11 (SAM3U_IRQ_GPIOC_PINS+11) /* GPIOC, PIN 11 */ +# define SAM3U_IRQ_PC12 (SAM3U_IRQ_GPIOC_PINS+12) /* GPIOC, PIN 12 */ +# define SAM3U_IRQ_PC13 (SAM3U_IRQ_GPIOC_PINS+13) /* GPIOC, PIN 13 */ +# define SAM3U_IRQ_PC14 (SAM3U_IRQ_GPIOC_PINS+14) /* GPIOC, PIN 14 */ +# define SAM3U_IRQ_PC15 (SAM3U_IRQ_GPIOC_PINS+15) /* GPIOC, PIN 15 */ +# define SAM3U_IRQ_PC16 (SAM3U_IRQ_GPIOC_PINS+16) /* GPIOC, PIN 16 */ +# define SAM3U_IRQ_PC17 (SAM3U_IRQ_GPIOC_PINS+17) /* GPIOC, PIN 17 */ +# define SAM3U_IRQ_PC18 (SAM3U_IRQ_GPIOC_PINS+18) /* GPIOC, PIN 18 */ +# define SAM3U_IRQ_PC19 (SAM3U_IRQ_GPIOC_PINS+19) /* GPIOC, PIN 19 */ +# define SAM3U_IRQ_PC20 (SAM3U_IRQ_GPIOC_PINS+20) /* GPIOC, PIN 20 */ +# define SAM3U_IRQ_PC21 (SAM3U_IRQ_GPIOC_PINS+21) /* GPIOC, PIN 21 */ +# define SAM3U_IRQ_PC22 (SAM3U_IRQ_GPIOC_PINS+22) /* GPIOC, PIN 22 */ +# define SAM3U_IRQ_PC23 (SAM3U_IRQ_GPIOC_PINS+23) /* GPIOC, PIN 23 */ +# define SAM3U_IRQ_PC24 (SAM3U_IRQ_GPIOC_PINS+24) /* GPIOC, PIN 24 */ +# define SAM3U_IRQ_PC25 (SAM3U_IRQ_GPIOC_PINS+25) /* GPIOC, PIN 25 */ +# define SAM3U_IRQ_PC26 (SAM3U_IRQ_GPIOC_PINS+26) /* GPIOC, PIN 26 */ +# define SAM3U_IRQ_PC27 (SAM3U_IRQ_GPIOC_PINS+27) /* GPIOC, PIN 27 */ +# define SAM3U_IRQ_PC28 (SAM3U_IRQ_GPIOC_PINS+28) /* GPIOC, PIN 28 */ +# define SAM3U_IRQ_PC29 (SAM3U_IRQ_GPIOC_PINS+29) /* GPIOC, PIN 29 */ +# define SAM3U_IRQ_PC30 (SAM3U_IRQ_GPIOC_PINS+30) /* GPIOC, PIN 30 */ +# define SAM3U_IRQ_PC31 (SAM3U_IRQ_GPIOC_PINS+31) /* GPIOC, PIN 31 */ +# define SAM3U_NGPIOAIRQS 32 +#else +# define SAM3U_NGPIOCIRQS 0 +#endif + +/* Total number of IRQ numbers */ + +#define NR_IRQS (SAM3U_IRQ_EXTINT+SAM3U_IRQ_NEXTINT+\ + SAM3U_NGPIOAIRQS+SAM3U_NGPIOBIRQS+SAM3U_NGPIOCIRQS) /**************************************************************************************** * Public Types |