diff options
Diffstat (limited to 'nuttx/arch/arm/src/c5471')
-rw-r--r-- | nuttx/arch/arm/src/c5471/c5471_vectors.S | 62 |
1 files changed, 31 insertions, 31 deletions
diff --git a/nuttx/arch/arm/src/c5471/c5471_vectors.S b/nuttx/arch/arm/src/c5471/c5471_vectors.S index b10842b69..1329017bc 100644 --- a/nuttx/arch/arm/src/c5471/c5471_vectors.S +++ b/nuttx/arch/arm/src/c5471/c5471_vectors.S @@ -1,7 +1,7 @@ -/******************************************************************** - * c5471/c5471_vectors.S +/************************************************************************************ + * arch/arm/src/c5471/c5471_vectors.S * - * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <spudmonkey@racsa.co.cr> * * Redistribution and use in source and binary forms, with or without @@ -14,7 +14,7 @@ * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. - * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * 3. Neither the name NuttX nor the names of its contributors may be * used to endorse or promote products derived from this software * without specific prior written permission. * @@ -31,23 +31,23 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ********************************************************************/ + ************************************************************************************/ -/******************************************************************** +/************************************************************************************ * Included Files - ********************************************************************/ + ************************************************************************************/ #include <nuttx/config.h> #include <nuttx/irq.h> #include "up_arch.h" -/******************************************************************** +/************************************************************************************ * Definitions - ********************************************************************/ + ************************************************************************************/ -/******************************************************************** +/************************************************************************************ * Global Data - ********************************************************************/ + ************************************************************************************/ .data g_irqtmp: @@ -60,29 +60,29 @@ g_aborttmp: .word 0 /* Saved lr */ .word 0 /* Saved spsr */ -/******************************************************************** +/************************************************************************************ * Assembly Macros - ********************************************************************/ + ************************************************************************************/ -/******************************************************************** +/************************************************************************************ * Private Functions - ********************************************************************/ + ************************************************************************************/ .text -/******************************************************************** +/************************************************************************************ * Public Functions - ********************************************************************/ + ************************************************************************************/ .text -/******************************************************************** +/************************************************************************************ * Name: up_vectorirq * * Description: * Interrupt excetpion. Entered in IRQ mode with spsr = SVC * CPSR, lr = SVC PC - ********************************************************************/ + ************************************************************************************/ .globl up_vectorirq .type up_vectorirq, %function @@ -169,12 +169,12 @@ up_vectorirq: .align 5 -/******************************************************************** +/************************************************************************************ * Function: up_vectorswi * * Description: * SWI interrupt. We enter the SWI in SVC mode - ********************************************************************/ + ************************************************************************************/ .globl up_vectorswi .type up_vectorswi, %function @@ -222,7 +222,7 @@ up_vectorswi: .align 5 -/******************************************************************** +/************************************************************************************ * Name: up_vectordata * * Description: @@ -230,7 +230,7 @@ up_vectorswi: * abort handler. This function is entered in ABORT mode * with spsr = SVC CPSR, lr = SVC PC * - ********************************************************************/ + ************************************************************************************/ .globl up_vectordata .type up_vectordata, %function @@ -290,13 +290,13 @@ up_vectordata: .align 5 -/******************************************************************** +/************************************************************************************ * Name: up_vectorprefetch * * Description: * Prefetch abort exception. Entered in ABT mode with * spsr = SVC CPSR, lr = SVC PC - ********************************************************************/ + ************************************************************************************/ .globl up_vectorprefetch .type up_vectorprefetch, %function @@ -356,14 +356,14 @@ up_vectorprefetch: .align 5 -/******************************************************************** +/************************************************************************************ * Name: up_vectorundefinsn * * Description: * Undefined instruction entry exception. Entered in * UND mode, spsr = SVC CPSR, lr = SVC PC * - ********************************************************************/ + ************************************************************************************/ .globl up_vectorundefinsn .type up_vectorundefinsn, %function @@ -422,25 +422,25 @@ up_vectorundefinsn: .align 5 -/******************************************************************** +/************************************************************************************ * Name: up_vectorfiq * * Description: * Shouldn't happen - ********************************************************************/ + ************************************************************************************/ .globl up_vectorfiq .type up_vectorfiq, %function up_vectorfiq: subs pc, lr, #4 -/******************************************************************** +/************************************************************************************ * Name: up_vectoraddrexcption * * Description: * Shouldn't happen * - ********************************************************************/ + ************************************************************************************/ .globl up_vectoraddrexcptn .type up_vectoraddrexcptn, %function |