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Diffstat (limited to 'nuttx/arch/arm/src/lm3s/lm3s_lowputc.c')
-rw-r--r--nuttx/arch/arm/src/lm3s/lm3s_lowputc.c16
1 files changed, 0 insertions, 16 deletions
diff --git a/nuttx/arch/arm/src/lm3s/lm3s_lowputc.c b/nuttx/arch/arm/src/lm3s/lm3s_lowputc.c
index bec33ac5e..7e675f110 100644
--- a/nuttx/arch/arm/src/lm3s/lm3s_lowputc.c
+++ b/nuttx/arch/arm/src/lm3s/lm3s_lowputc.c
@@ -249,22 +249,6 @@ void up_lowsetup(void)
putreg32(ctl, LM3S_CONSOLE_BASE+LM3S_UART_CTL_OFFSET);
#endif
- /* Peripheral clocking to the selected UART modules and to the GPIO
- * modules used for the pin configuration. NOTE: this function is
- * called very early in the boot sequence so we do not need to be
- * concerned about exclusive access to registers.
- */
-
- rcgc1 = getreg32(LM3S_SYSCON_RCGC1);
-#if !defined(CONFIG_UART0_DISABLE) && !defined(CONFIG_UART1_DISABLE)
- rcgc1 |= (SYSCON_RCGC1_UART0|SYSCON_RCGC2_GPIOA|SYSCON_RCGC1_UART1|SYSCON_RCGC2_GPIOD);
-#elif !defined(CONFIG_UART0_DISABLE)
- rcgc1 |= (SYSCON_RCGC1_UART0|SYSCON_RCGC2_GPIOA);
-#elif !defined(CONFIG_UART1_DISABLE)
- rcgc1 |= (SYSCON_RCGC1_UART1|SYSCON_RCGC2_GPIOD);
-#endif
- putreg32(rcgc1, LM3S_SYSCON_RCGC1);
-
/* Then configure GPIO pins to enable the selected UARTs. NOTE: The
* serial driver later depends on this pin configuration.
*/