diff options
Diffstat (limited to 'nuttx/arch/arm/src/lm3s')
-rw-r--r-- | nuttx/arch/arm/src/lm3s/chip.h | 3 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_dumpgpio.c | 19 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_ethernet.c | 154 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_ethernet.h | 3 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_flash.h | 3 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_gpio.c | 113 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_gpio.h | 3 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_gpioirq.c | 20 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_i2c.h | 3 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_internal.h | 19 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_irq.c | 24 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_lowputc.c | 10 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_memorymap.h | 3 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_serial.c | 108 | ||||
-rwxr-xr-x | nuttx/arch/arm/src/lm3s/lm3s_ssi.c | 209 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_start.c | 8 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c | 22 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_syscontrol.h | 3 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_timerisr.c | 9 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lm3s/lm3s_uart.h | 3 |
20 files changed, 374 insertions, 365 deletions
diff --git a/nuttx/arch/arm/src/lm3s/chip.h b/nuttx/arch/arm/src/lm3s/chip.h index 21cf9baad..d96b6fb0f 100644 --- a/nuttx/arch/arm/src/lm3s/chip.h +++ b/nuttx/arch/arm/src/lm3s/chip.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Get customizations for each supported chip (only the LM3S6918 right now) */ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_dumpgpio.c b/nuttx/arch/arm/src/lm3s/lm3s_dumpgpio.c index e58a5ceb7..f7bb7c7d7 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_dumpgpio.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_dumpgpio.c @@ -38,8 +38,9 @@ ****************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <stdint.h> +#include <stdbool.h> #include <debug.h> #include <nuttx/arch.h> @@ -50,7 +51,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -59,7 +60,7 @@ /* NOTE: this is duplicated in lm3s_gpio.c */ -static const uint32 g_gpiobase[8] = +static const uint32_t g_gpiobase[8] = { LM3S_GPIOA_BASE, LM3S_GPIOB_BASE, LM3S_GPIOC_BASE, LM3S_GPIOD_BASE, LM3S_GPIOE_BASE, LM3S_GPIOF_BASE, LM3S_GPIOG_BASE, LM3S_GPIOH_BASE, @@ -80,7 +81,7 @@ static const char g_portchar[8] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' }; * ****************************************************************************/ -static inline uint32 lm3s_gpiobaseaddress(int port) +static inline uint32_t lm3s_gpiobaseaddress(int port) { return g_gpiobase[port & 7]; } @@ -94,7 +95,7 @@ static inline uint32 lm3s_gpiobaseaddress(int port) * ****************************************************************************/ -static inline ubyte lm3s_gpioport(int port) +static inline uint8_t lm3s_gpioport(int port) { return g_portchar[port & 7]; } @@ -111,13 +112,13 @@ static inline ubyte lm3s_gpioport(int port) * ****************************************************************************/ -int lm3s_dumpgpio(uint32 pinset, const char *msg) +int lm3s_dumpgpio(uint32_t pinset, const char *msg) { irqstate_t flags; unsigned int port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; - uint32 base; - uint32 rcgc2; - boolean enabled; + uint32_t base; + uint32_t rcgc2; + bool enabled; /* Get the base address associated with the GPIO port */ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_ethernet.c b/nuttx/arch/arm/src/lm3s/lm3s_ethernet.c index 5d9e4b711..41224418b 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_ethernet.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_ethernet.c @@ -40,6 +40,8 @@ #include <nuttx/config.h> #if defined(CONFIG_NET) && defined(CONFIG_LM3S_ETHERNET) +#include <stdint.h> +#include <stdbool.h> #include <time.h> #include <string.h> #include <debug.h> @@ -58,7 +60,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Half duplex can be forced if CONFIG_LM3S_ETHHDUPLEX is defined. */ @@ -159,18 +161,18 @@ #if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET) struct ez80mac_statistics_s { - uint32 rx_int; /* Number of Rx interrupts received */ - uint32 rx_packets; /* Number of packets received (sum of the following): */ - uint32 rx_ip; /* Number of Rx IP packets received */ - uint32 rx_arp; /* Number of Rx ARP packets received */ - uint32 rx_dropped; /* Number of dropped, unsupported Rx packets */ - uint32 rx_pktsize; /* Number of dropped, too small or too bigr */ - uint32 rx_errors; /* Number of Rx errors (reception error) */ - uint32 rx_ovrerrors; /* Number of Rx FIFO overrun errors */ - uint32 tx_int; /* Number of Tx interrupts received */ - uint32 tx_packets; /* Number of Tx packets queued */ - uint32 tx_errors; /* Number of Tx errors (transmission error)*/ - uint32 tx_timeouts; /* Number of Tx timeout errors */ + uint32_t rx_int; /* Number of Rx interrupts received */ + uint32_t rx_packets; /* Number of packets received (sum of the following): */ + uint32_t rx_ip; /* Number of Rx IP packets received */ + uint32_t rx_arp; /* Number of Rx ARP packets received */ + uint32_t rx_dropped; /* Number of dropped, unsupported Rx packets */ + uint32_t rx_pktsize; /* Number of dropped, too small or too bigr */ + uint32_t rx_errors; /* Number of Rx errors (reception error) */ + uint32_t rx_ovrerrors; /* Number of Rx FIFO overrun errors */ + uint32_t tx_int; /* Number of Tx interrupts received */ + uint32_t tx_packets; /* Number of Tx packets queued */ + uint32_t tx_errors; /* Number of Tx errors (transmission error)*/ + uint32_t tx_timeouts; /* Number of Tx timeout errors */ }; # define EMAC_STAT(priv,name) priv->ld_stat.name++ #else @@ -188,13 +190,13 @@ struct lm3s_driver_s */ #if LM3S_NETHCONTROLLERS > 1 - uint32 ld_base; /* Ethernet controller base address */ - int ld-irq; /* Ethernet controller IRQ */ + uint32_t ld_base; /* Ethernet controller base address */ + int ld-irq; /* Ethernet controller IRQ */ #endif - boolean ld_bifup; /* TRUE:ifup FALSE:ifdown */ - WDOG_ID ld_txpoll; /* TX poll timer */ - WDOG_ID ld_txtimeout; /* TX timeout timer */ + bool ld_bifup; /* true:ifup false:ifdown */ + WDOG_ID ld_txpoll; /* TX poll timer */ + WDOG_ID ld_txtimeout; /* TX timeout timer */ #if defined(CONFIG_DEBUG) && defined(CONFIG_DEBUG_NET) struct ez80mac_statistics_s ld_stat; @@ -218,39 +220,39 @@ static struct lm3s_driver_s g_lm3sdev[LM3S_NETHCONTROLLERS]; /* Miscellaneous low level helpers */ #if LM3S_NETHCONTROLLERS > 1 -static uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset); -static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value); +static uint32_t lm3s_ethin(struct lm3s_driver_s *priv, int offset); +static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32_t value); #else -static inline uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset); -static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value); +static inline uint32_t lm3s_ethin(struct lm3s_driver_s *priv, int offset); +static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32_t value); #endif -static void lm3s_ethreset(struct lm3s_driver_s *priv); +static void lm3s_ethreset(struct lm3s_driver_s *priv); #if 0 /* Not used */ -static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16 value); +static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16_t value); #endif -static uint16 lm3s_phyread(struct lm3s_driver_s *priv, int regaddr); +static uint16_t lm3s_phyread(struct lm3s_driver_s *priv, int regaddr); /* Common TX logic */ -static int lm3s_transmit(struct lm3s_driver_s *priv); -static int lm3s_uiptxpoll(struct uip_driver_s *dev); +static int lm3s_transmit(struct lm3s_driver_s *priv); +static int lm3s_uiptxpoll(struct uip_driver_s *dev); /* Interrupt handling */ -static void lm3s_receive(struct lm3s_driver_s *priv); -static void lm3s_txdone(struct lm3s_driver_s *priv); -static int lm3s_interrupt(int irq, FAR void *context); +static void lm3s_receive(struct lm3s_driver_s *priv); +static void lm3s_txdone(struct lm3s_driver_s *priv); +static int lm3s_interrupt(int irq, FAR void *context); /* Watchdog timer expirations */ -static void lm3s_polltimer(int argc, uint32 arg, ...); -static void lm3s_txtimeout(int argc, uint32 arg, ...); +static void lm3s_polltimer(int argc, uint32_t arg, ...); +static void lm3s_txtimeout(int argc, uint32_t arg, ...); /* NuttX callback functions */ -static int lm3s_ifup(struct uip_driver_s *dev); -static int lm3s_ifdown(struct uip_driver_s *dev); -static int lm3s_txavail(struct uip_driver_s *dev); +static int lm3s_ifup(struct uip_driver_s *dev); +static int lm3s_ifdown(struct uip_driver_s *dev); +static int lm3s_txavail(struct uip_driver_s *dev); /**************************************************************************** * Private Functions @@ -272,12 +274,12 @@ static int lm3s_txavail(struct uip_driver_s *dev); ****************************************************************************/ #if LM3S_NETHCONTROLLERS > 1 -static uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset) +static uint32_t lm3s_ethin(struct lm3s_driver_s *priv, int offset) { return getreg32(priv->ld_base + offset); } #else -static inline uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset) +static inline uint32_t lm3s_ethin(struct lm3s_driver_s *priv, int offset) { return getreg32(LM3S_ETHCON_BASE + offset); } @@ -300,12 +302,12 @@ static inline uint32 lm3s_ethin(struct lm3s_driver_s *priv, int offset) ****************************************************************************/ #if LM3S_NETHCONTROLLERS > 1 -static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value) +static void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32_t value) { putreg32(value, priv->ld_base + offset); } #else -static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 value) +static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32_t value) { putreg32(value, LM3S_ETHCON_BASE + offset); } @@ -330,7 +332,7 @@ static inline void lm3s_ethout(struct lm3s_driver_s *priv, int offset, uint32 va static void lm3s_ethreset(struct lm3s_driver_s *priv) { irqstate_t flags; - uint32 regval; + uint32_t regval; #if LM3S_NETHCONTROLLERS > 1 # error "If multiple interfaces are supported, this function would have to be redesigned" @@ -399,7 +401,7 @@ static void lm3s_ethreset(struct lm3s_driver_s *priv) ****************************************************************************/ #if 0 /* Not used */ -static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16 value) +static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16_t value) { /* Wait for any MII transactions in progress to complete */ @@ -438,7 +440,7 @@ static void lm3s_phywrite(struct lm3s_driver_s *priv, int regaddr, uint16 value) * ****************************************************************************/ -static uint16 lm3s_phyread(struct lm3s_driver_s *priv, int regaddr) +static uint16_t lm3s_phyread(struct lm3s_driver_s *priv, int regaddr) { /* Wait for any MII transactions in progress to complete */ @@ -456,7 +458,7 @@ static uint16 lm3s_phyread(struct lm3s_driver_s *priv, int regaddr) /* Read and return the PHY data */ - return (uint16)(lm3s_ethin(priv, LM3S_MAC_MRXD_OFFSET) & MAC_MTRD_MASK); + return (uint16_t)(lm3s_ethin(priv, LM3S_MAC_MRXD_OFFSET) & MAC_MTRD_MASK); } /**************************************************************************** @@ -477,8 +479,8 @@ static uint16 lm3s_phyread(struct lm3s_driver_s *priv, int regaddr) static int lm3s_transmit(struct lm3s_driver_s *priv) { irqstate_t flags; - uint32 regval; - ubyte *dbuf; + uint32_t regval; + uint8_t *dbuf; int pktlen; int bytesleft; int ret = -EBUSY; @@ -504,9 +506,9 @@ static int lm3s_transmit(struct lm3s_driver_s *priv) DEBUGASSERT(pktlen > UIP_LLH_LEN); dbuf = priv->ld_dev.d_buf; - regval = (uint32)(pktlen - 14); - regval |= ((uint32)(*dbuf++) << 16); - regval |= ((uint32)(*dbuf++) << 24); + regval = (uint32_t)(pktlen - 14); + regval |= ((uint32_t)(*dbuf++) << 16); + regval |= ((uint32_t)(*dbuf++) << 24); lm3s_ethout(priv, LM3S_MAC_DATA_OFFSET, regval); /* Write all of the whole, 32-bit values in the middle of the packet */ @@ -517,7 +519,7 @@ static int lm3s_transmit(struct lm3s_driver_s *priv) * buffer may be un-aligned. */ - lm3s_ethout(priv, LM3S_MAC_DATA_OFFSET, *(uint32*)dbuf); + lm3s_ethout(priv, LM3S_MAC_DATA_OFFSET, *(uint32_t*)dbuf); } /* Write the last, partial word in the FIFO */ @@ -534,11 +536,11 @@ static int lm3s_transmit(struct lm3s_driver_s *priv) break; case 3: - regval |= ((uint32)dbuf[2] << 16); + regval |= ((uint32_t)dbuf[2] << 16); case 2: - regval |= ((uint32)dbuf[1] << 8); + regval |= ((uint32_t)dbuf[1] << 8); case 1: - regval |= (uint32)dbuf[0]; + regval |= (uint32_t)dbuf[0]; break; } lm3s_ethout(priv, LM3S_MAC_DATA_OFFSET, regval); @@ -550,7 +552,7 @@ static int lm3s_transmit(struct lm3s_driver_s *priv) /* Setup the TX timeout watchdog (perhaps restarting the timer) */ - (void)wd_start(priv->ld_txtimeout, LM3S_TXTIMEOUT, lm3s_txtimeout, 1, (uint32)priv); + (void)wd_start(priv->ld_txtimeout, LM3S_TXTIMEOUT, lm3s_txtimeout, 1, (uint32_t)priv); ret = OK; } @@ -625,10 +627,10 @@ static int lm3s_uiptxpoll(struct uip_driver_s *dev) static void lm3s_receive(struct lm3s_driver_s *priv) { - uint32 regval; - ubyte *dbuf; - int pktlen; - int bytesleft; + uint32_t regval; + uint8_t *dbuf; + int pktlen; + int bytesleft; /* Loop while there are incoming packets to be processed */ @@ -690,8 +692,8 @@ static void lm3s_receive(struct lm3s_driver_s *priv) /* Save the first two bytes from the first word */ - *dbuf++ = (ubyte)((regval >> 16) & 0xff); - *dbuf++ = (ubyte)((regval >> 24) & 0xff); + *dbuf++ = (uint8_t)((regval >> 16) & 0xff); + *dbuf++ = (uint8_t)((regval >> 24) & 0xff); /* Read all of the whole, 32-bit values in the middle of the packet. * We've already read the length (2 bytes) plus the first two bytes @@ -704,7 +706,7 @@ static void lm3s_receive(struct lm3s_driver_s *priv) * buffer may be un-aligned. */ - *(uint32*)dbuf = lm3s_ethin(priv, LM3S_MAC_DATA_OFFSET); + *(uint32_t*)dbuf = lm3s_ethin(priv, LM3S_MAC_DATA_OFFSET); } /* Handle the last, partial word in the FIFO */ @@ -845,7 +847,7 @@ static void lm3s_txdone(struct lm3s_driver_s *priv) static int lm3s_interrupt(int irq, FAR void *context) { register struct lm3s_driver_s *priv; - uint32 ris; + uint32_t ris; #if LM3S_NETHCONTROLLERS > 1 # error "A mechanism to associate and interface with an IRQ is needed" @@ -929,7 +931,7 @@ static int lm3s_interrupt(int irq, FAR void *context) * ****************************************************************************/ -static void lm3s_txtimeout(int argc, uint32 arg, ...) +static void lm3s_txtimeout(int argc, uint32_t arg, ...) { struct lm3s_driver_s *priv = (struct lm3s_driver_s *)arg; @@ -966,7 +968,7 @@ static void lm3s_txtimeout(int argc, uint32 arg, ...) * ****************************************************************************/ -static void lm3s_polltimer(int argc, uint32 arg, ...) +static void lm3s_polltimer(int argc, uint32_t arg, ...) { struct lm3s_driver_s *priv = (struct lm3s_driver_s *)arg; @@ -1011,9 +1013,9 @@ static int lm3s_ifup(struct uip_driver_s *dev) { struct lm3s_driver_s *priv = (struct lm3s_driver_s *)dev->d_private; irqstate_t flags; - uint32 regval; - uint32 div; - uint16 phyreg; + uint32_t regval; + uint32_t div; + uint16_t phyreg; nlldbg("Bringing up: %d.%d.%d.%d\n", dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff, @@ -1127,21 +1129,21 @@ static int lm3s_ifup(struct uip_driver_s *dev) /* Program the hardware with it's MAC address (for filtering) */ - regval = (uint32)priv->ld_dev.d_mac.ether_addr_octet[3] << 24 | - (uint32)priv->ld_dev.d_mac.ether_addr_octet[2] << 16 | - (uint32)priv->ld_dev.d_mac.ether_addr_octet[1] << 8 | - (uint32)priv->ld_dev.d_mac.ether_addr_octet[0]; + regval = (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[3] << 24 | + (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[2] << 16 | + (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[1] << 8 | + (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[0]; lm3s_ethout(priv, LM3S_MAC_IA0_OFFSET, regval); - regval = (uint32)priv->ld_dev.d_mac.ether_addr_octet[5] << 8 | - (uint32)priv->ld_dev.d_mac.ether_addr_octet[4]; + regval = (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[5] << 8 | + (uint32_t)priv->ld_dev.d_mac.ether_addr_octet[4]; lm3s_ethout(priv, LM3S_MAC_IA1_OFFSET, regval); /* Set and activate a timer process */ - (void)wd_start(priv->ld_txpoll, LM3S_WDDELAY, lm3s_polltimer, 1, (uint32)priv); + (void)wd_start(priv->ld_txpoll, LM3S_WDDELAY, lm3s_polltimer, 1, (uint32_t)priv); - priv->ld_bifup = TRUE; + priv->ld_bifup = true; irqrestore(flags); return OK; } @@ -1167,7 +1169,7 @@ static int lm3s_ifdown(struct uip_driver_s *dev) { struct lm3s_driver_s *priv = (struct lm3s_driver_s *)dev->d_private; irqstate_t flags; - uint32 regval; + uint32_t regval; nlldbg("Taking down: %d.%d.%d.%d\n", dev->d_ipaddr & 0xff, (dev->d_ipaddr >> 8) & 0xff, @@ -1224,7 +1226,7 @@ static int lm3s_ifdown(struct uip_driver_s *dev) /* The interface is now DOWN */ - priv->ld_bifup = FALSE; + priv->ld_bifup = false; irqrestore(flags); return OK; } diff --git a/nuttx/arch/arm/src/lm3s/lm3s_ethernet.h b/nuttx/arch/arm/src/lm3s/lm3s_ethernet.h index e67a0a34e..7b0a043a9 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_ethernet.h +++ b/nuttx/arch/arm/src/lm3s/lm3s_ethernet.h @@ -41,11 +41,10 @@ ************************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> #include <nuttx/mii.h> /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Ethernet Controller Register Offsets *********************************************/ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_flash.h b/nuttx/arch/arm/src/lm3s/lm3s_flash.h index 22f94ca0a..53b0e685a 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_flash.h +++ b/nuttx/arch/arm/src/lm3s/lm3s_flash.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* FLASH register offsets ***********************************************************/ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_gpio.c b/nuttx/arch/arm/src/lm3s/lm3s_gpio.c index d289022a9..d227e62ea 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_gpio.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_gpio.c @@ -39,8 +39,9 @@ ****************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <stdint.h> +#include <stdbool.h> #include <string.h> #include <assert.h> #include <debug.h> @@ -52,7 +53,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /* These definitions are part of the implementation of the GPIO pad @@ -119,8 +120,8 @@ struct gpio_func_s { - ubyte setbits; /* A set of GPIO register bits to set */ - ubyte clrbits; /* A set of GPIO register bits to clear */ + uint8_t setbits; /* A set of GPIO register bits to set */ + uint8_t clrbits; /* A set of GPIO register bits to clear */ }; /**************************************************************************** @@ -139,7 +140,7 @@ static const struct gpio_func_s g_funcbits[] = {GPIO_INTERRUPT_SETBITS, GPIO_INTERRUPT_CLRBITS}, /* GPIO_FUNC_INTERRUPT */ }; -static const uint32 g_gpiobase[] = +static const uint32_t g_gpiobase[] = { LM3S_GPIOA_BASE, LM3S_GPIOB_BASE, LM3S_GPIOC_BASE, LM3S_GPIOD_BASE, LM3S_GPIOE_BASE, LM3S_GPIOF_BASE, LM3S_GPIOG_BASE, LM3S_GPIOH_BASE, @@ -162,7 +163,7 @@ static const uint32 g_gpiobase[] = * ****************************************************************************/ -static inline uint32 lm3s_gpiobaseaddress(unsigned int port) +static inline uint32_t lm3s_gpiobaseaddress(unsigned int port) { return g_gpiobase[port & 7]; } @@ -175,11 +176,11 @@ static inline uint32 lm3s_gpiobaseaddress(unsigned int port) * ****************************************************************************/ -static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *func) +static void lm3s_gpiofunc(uint32_t base, uint32_t pinno, const struct gpio_func_s *func) { - uint32 setbit; - uint32 clrbit; - uint32 regval; + uint32_t setbit; + uint32_t clrbit; + uint32_t regval; /* Set/clear/ignore the GPIO ODR bit. "The GPIO ODR register is the open drain * control register. Setting a bit in this register enables the open drain @@ -192,8 +193,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * drain output when set to 1." */ - setbit = (((uint32)func->setbits >> ODR_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> ODR_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> ODR_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> ODR_SHIFT) & 1) << pinno; regval = getreg32(base + LM3S_GPIO_ODR_OFFSET); regval &= ~clrbit; @@ -206,8 +207,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * corresponding bit in the GPIO Pull-Down Select (GPIOPDR) register ..." */ - setbit = (((uint32)func->setbits >> PUR_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> PUR_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> PUR_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> PUR_SHIFT) & 1) << pinno; if (setbit || clrbit) { @@ -223,8 +224,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * the corresponding bit in the GPIO Pull-Up Select (GPIOPUR) register ..." */ - setbit = (((uint32)func->setbits >> PDR_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> PDR_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> PDR_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> PDR_SHIFT) & 1) << pinno; if (setbit || clrbit) { @@ -243,8 +244,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * corresponding GPIODEN bit must be set." */ - setbit = (((uint32)func->setbits >> DEN_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> DEN_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> DEN_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> DEN_SHIFT) & 1) << pinno; regval = getreg32(base + LM3S_GPIO_DEN_OFFSET); regval &= ~clrbit; @@ -258,8 +259,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * pins are inputs by default. */ - setbit = (((uint32)func->setbits >> DIR_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> DIR_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> DIR_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> DIR_SHIFT) & 1) << pinno; regval = getreg32(base + LM3S_GPIO_DIR_OFFSET); regval &= ~clrbit; @@ -275,8 +276,8 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * and unlock the GPIO. That is not implemented here. */ - setbit = (((uint32)func->setbits >> AFSEL_SHIFT) & 1) << pinno; - clrbit = (((uint32)func->clrbits >> AFSEL_SHIFT) & 1) << pinno; + setbit = (((uint32_t)func->setbits >> AFSEL_SHIFT) & 1) << pinno; + clrbit = (((uint32_t)func->clrbits >> AFSEL_SHIFT) & 1) << pinno; regval = getreg32(base + LM3S_GPIO_AFSEL_OFFSET); regval &= ~clrbit; @@ -292,13 +293,13 @@ static void lm3s_gpiofunc(uint32 base, uint32 pinno, const struct gpio_func_s *f * ****************************************************************************/ -static inline void lm3s_gpiopadstrength(uint32 base, uint32 pin, uint32 cfgset) +static inline void lm3s_gpiopadstrength(uint32_t base, uint32_t pin, uint32_t cfgset) { int strength = (cfgset & GPIO_STRENGTH_MASK) >> GPIO_STRENGTH_SHIFT; - uint32 regoffset; - uint32 regval; - uint32 slrset; - uint32 slrclr; + uint32_t regoffset; + uint32_t regval; + uint32_t slrset; + uint32_t slrclr; /* Prepare bits to disable slew */ @@ -381,22 +382,22 @@ static inline void lm3s_gpiopadstrength(uint32 base, uint32 pin, uint32 cfgset) * ****************************************************************************/ -static inline void lm3s_gpiopadtype(uint32 base, uint32 pin, uint32 cfgset) +static inline void lm3s_gpiopadtype(uint32_t base, uint32_t pin, uint32_t cfgset) { int padtype = (cfgset & GPIO_PADTYPE_MASK) >> GPIO_PADTYPE_SHIFT; #if 0 /* always overwritten by lm3s_gpiofunc */ - uint32 odrset; - uint32 odrclr; + uint32_t odrset; + uint32_t odrclr; #endif - uint32 purset; - uint32 purclr; - uint32 pdrset; - uint32 pdrclr; + uint32_t purset; + uint32_t purclr; + uint32_t pdrset; + uint32_t pdrclr; #if 0 /* always overwritten by lm3s_gpiofunc */ - uint32 denset; - uint32 denclr; + uint32_t denset; + uint32_t denclr; #endif - uint32 regval; + uint32_t regval; /* Assume digital GPIO function, push-pull with no pull-up or pull-down */ @@ -536,9 +537,9 @@ static inline void lm3s_gpiopadtype(uint32 base, uint32 pin, uint32 cfgset) * ****************************************************************************/ -static inline void lm3s_initoutput(uint32 cfgset) +static inline void lm3s_initoutput(uint32_t cfgset) { - boolean value = ((cfgset & GPIO_VALUE_MASK) != GPIO_VALUE_ZERO); + bool value = ((cfgset & GPIO_VALUE_MASK) != GPIO_VALUE_ZERO); lm3s_gpiowrite(cfgset, value); } @@ -550,16 +551,16 @@ static inline void lm3s_initoutput(uint32 cfgset) * ****************************************************************************/ -static inline void lm3s_interrupt(uint32 base, uint32 pin, uint32 cfgset) +static inline void lm3s_interrupt(uint32_t base, uint32_t pin, uint32_t cfgset) { int inttype = (cfgset & GPIO_INT_MASK) >> GPIO_INT_SHIFT; - uint32 regval; - uint32 isset; - uint32 isclr; - uint32 ibeset; - uint32 ibeclr; - uint32 iveset; - uint32 iveclr; + uint32_t regval; + uint32_t isset; + uint32_t isclr; + uint32_t ibeset; + uint32_t ibeclr; + uint32_t iveset; + uint32_t iveclr; /* Mask and clear the GPIO interrupt * @@ -681,15 +682,15 @@ static inline void lm3s_interrupt(uint32 base, uint32 pin, uint32 cfgset) * ****************************************************************************/ -int lm3s_configgpio(uint32 cfgset) +int lm3s_configgpio(uint32_t cfgset) { irqstate_t flags; unsigned int func; unsigned int port; unsigned int pinno; - uint32 pin; - uint32 base; - uint32 regval; + uint32_t pin; + uint32_t base; + uint32_t regval; /* Decode the basics */ @@ -762,11 +763,11 @@ int lm3s_configgpio(uint32 cfgset) * ****************************************************************************/ -void lm3s_gpiowrite(uint32 pinset, boolean value) +void lm3s_gpiowrite(uint32_t pinset, bool value) { unsigned int port; unsigned int pinno; - uint32 base; + uint32_t base; /* Decode the basics */ @@ -789,7 +790,7 @@ void lm3s_gpiowrite(uint32 pinset, boolean value) * "... All bits are cleared by a reset." */ - putreg32((uint32)value << pinno, base + LM3S_GPIO_DATA_OFFSET + (1 << (pinno + 2))); + putreg32((uint32_t)value << pinno, base + LM3S_GPIO_DATA_OFFSET + (1 << (pinno + 2))); } /**************************************************************************** @@ -800,11 +801,11 @@ void lm3s_gpiowrite(uint32 pinset, boolean value) * ****************************************************************************/ -boolean lm3s_gpioread(uint32 pinset, boolean value) +bool lm3s_gpioread(uint32_t pinset, bool value) { unsigned int port; unsigned int pinno; - uint32 base; + uint32_t base; /* Decode the basics */ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_gpio.h b/nuttx/arch/arm/src/lm3s/lm3s_gpio.h index 7424d74e3..886e58e78 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_gpio.h +++ b/nuttx/arch/arm/src/lm3s/lm3s_gpio.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* GPIO Register Offsets ************************************************************/ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_gpioirq.c b/nuttx/arch/arm/src/lm3s/lm3s_gpioirq.c index 590e0d753..3d0ebf472 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_gpioirq.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_gpioirq.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <stdint.h> #include <string.h> #include <assert.h> #include <debug.h> @@ -53,7 +53,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -68,7 +68,7 @@ static FAR xcpt_t g_gpioirqvector[NR_GPIO_IRQS]; * be we support disabling interrupt support for arbitrary ports */ -static const uint32 g_gpiobase[] = +static const uint32_t g_gpiobase[] = { #ifndef CONFIG_LM3S_DISABLE_GPIOA_IRQS LM3S_GPIOA_BASE, @@ -113,7 +113,7 @@ static const uint32 g_gpiobase[] = * ****************************************************************************/ -static inline uint32 lm3s_gpiobaseaddress(unsigned int port) +static inline uint32_t lm3s_gpiobaseaddress(unsigned int port) { return g_gpiobase[port >> 3]; } @@ -126,9 +126,9 @@ static inline uint32 lm3s_gpiobaseaddress(unsigned int port) * ****************************************************************************/ -static int lm3s_gpiohandler(uint32 regbase, int irqbase, void *context) +static int lm3s_gpiohandler(uint32_t regbase, int irqbase, void *context) { - uint32 mis; + uint32_t mis; int irq; int pin; @@ -322,8 +322,8 @@ void gpio_irqenable(int irq) { irqstate_t flags; int gpioirq = irq - NR_IRQS; - uint32 base; - uint32 regval; + uint32_t base; + uint32_t regval; int pin; int ret = ERROR; @@ -363,8 +363,8 @@ void gpio_irqdisable(int irq) { irqstate_t flags; int gpioirq = irq - NR_IRQS; - uint32 base; - uint32 regval; + uint32_t base; + uint32_t regval; int pin; int ret = ERROR; diff --git a/nuttx/arch/arm/src/lm3s/lm3s_i2c.h b/nuttx/arch/arm/src/lm3s/lm3s_i2c.h index 167b15796..f306328e3 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_i2c.h +++ b/nuttx/arch/arm/src/lm3s/lm3s_i2c.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* I2C Register Offsets *************************************************************/ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_internal.h b/nuttx/arch/arm/src/lm3s/lm3s_internal.h index 29ce8f5a3..2548e6c5b 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_internal.h +++ b/nuttx/arch/arm/src/lm3s/lm3s_internal.h @@ -41,13 +41,14 @@ ************************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <stdint.h> +#include <stdbool.h> #include "up_internal.h" #include "chip.h" /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* The LM3S6918 only supports 8 priority levels. The hardware priority mechanism @@ -236,7 +237,7 @@ EXTERN void up_lowsetup(void); * ****************************************************************************/ -EXTERN void lm3s_clockconfig(uint32 newrcc, uint32 newrcc2); +EXTERN void lm3s_clockconfig(uint32_t newrcc, uint32_t newrcc2); /**************************************************************************** * Name: up_clockconfig @@ -257,7 +258,7 @@ EXTERN void up_clockconfig(void); * ****************************************************************************/ -EXTERN int lm3s_configgpio(uint32 cfgset); +EXTERN int lm3s_configgpio(uint32_t cfgset); /**************************************************************************** * Name: lm3s_gpiowrite @@ -267,7 +268,7 @@ EXTERN int lm3s_configgpio(uint32 cfgset); * ****************************************************************************/ -EXTERN void lm3s_gpiowrite(uint32 pinset, boolean value); +EXTERN void lm3s_gpiowrite(uint32_t pinset, bool value); /**************************************************************************** * Name: lm3s_gpioread @@ -277,7 +278,7 @@ EXTERN void lm3s_gpiowrite(uint32 pinset, boolean value); * ****************************************************************************/ -EXTERN boolean lm3s_gpioread(uint32 pinset, boolean value); +EXTERN bool lm3s_gpioread(uint32_t pinset, bool value); /**************************************************************************** * Function: lm3s_dumpgpio @@ -287,7 +288,7 @@ EXTERN boolean lm3s_gpioread(uint32 pinset, boolean value); * ****************************************************************************/ -EXTERN int lm3s_dumpgpio(uint32 pinset, const char *msg); +EXTERN int lm3s_dumpgpio(uint32_t pinset, const char *msg); /**************************************************************************** * Name: gpio_irqinitialize @@ -345,8 +346,8 @@ EXTERN int lm3s_ethinitialize(int intf); struct spi_dev_s; enum spi_dev_e; -EXTERN void lm3s_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected); -EXTERN ubyte lm3s_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +EXTERN void lm3s_spiselect(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +EXTERN uint8_t lm3s_spistatus(FAR struct spi_dev_s *dev, enum spi_dev_e devid); #undef EXTERN #if defined(__cplusplus) diff --git a/nuttx/arch/arm/src/lm3s/lm3s_irq.c b/nuttx/arch/arm/src/lm3s/lm3s_irq.c index 63744581a..160d76912 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_irq.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_irq.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <stdint.h> #include <debug.h> #include <nuttx/irq.h> @@ -54,7 +54,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Enable NVIC debug features that are probably only desireable during @@ -75,7 +75,7 @@ * Public Data ****************************************************************************/ -uint32 *current_regs; +uint32_t *current_regs; /**************************************************************************** * Private Data @@ -205,7 +205,7 @@ static int lm3s_reserved(int irq, FAR void *context) * ****************************************************************************/ -static int lm3s_irqinfo(int irq, uint32 *regaddr, uint32 *bit) +static int lm3s_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit) { DEBUGASSERT(irq >= LM3S_IRQ_NMI && irq < NR_IRQS); @@ -363,9 +363,9 @@ void up_irqinitialize(void) void up_disable_irq(int irq) { - uint32 regaddr; - uint32 regval; - uint32 bit; + uint32_t regaddr; + uint32_t regval; + uint32_t bit; if (lm3s_irqinfo(irq, ®addr, &bit) == 0) { @@ -388,9 +388,9 @@ void up_disable_irq(int irq) void up_enable_irq(int irq) { - uint32 regaddr; - uint32 regval; - uint32 bit; + uint32_t regaddr; + uint32_t regval; + uint32_t bit; if (lm3s_irqinfo(irq, ®addr, &bit) == 0) { @@ -430,8 +430,8 @@ void up_maskack_irq(int irq) #ifdef CONFIG_ARCH_IRQPRIO int up_prioritize_irq(int irq, int priority) { - uint32 regaddr; - uint32 regval; + uint32_t regaddr; + uint32_t regval; int shift; DEBUGASSERT(irq >= LM3S_IRQ_MPU && irq < NR_IRQS && (unsigned)priority <= NVIC_SYSH_PRIORITY_MIN); diff --git a/nuttx/arch/arm/src/lm3s/lm3s_lowputc.c b/nuttx/arch/arm/src/lm3s/lm3s_lowputc.c index 8ab1d1a47..aa7f5466a 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_lowputc.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_lowputc.c @@ -38,7 +38,7 @@ **************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <stdint.h> #include "up_internal.h" #include "up_arch.h" @@ -47,7 +47,7 @@ #include "lm3s_internal.h" /************************************************************************** - * Private Definitions + * Pre-processor Definitions **************************************************************************/ /* Configuration **********************************************************/ @@ -204,7 +204,7 @@ void up_lowputc(char ch) /* Then send the character */ - putreg32((uint32)ch, LM3S_CONSOLE_BASE+LM3S_UART_DR_OFFSET); + putreg32((uint32_t)ch, LM3S_CONSOLE_BASE+LM3S_UART_DR_OFFSET); #endif } @@ -220,9 +220,9 @@ void up_lowputc(char ch) void up_lowsetup(void) { - uint32 regval; + uint32_t regval; #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) - uint32 ctl; + uint32_t ctl; #endif /* Enable the selected UARTs and configure GPIO pins to need by the diff --git a/nuttx/arch/arm/src/lm3s/lm3s_memorymap.h b/nuttx/arch/arm/src/lm3s/lm3s_memorymap.h index 0b4401069..c3ffab27d 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_memorymap.h +++ b/nuttx/arch/arm/src/lm3s/lm3s_memorymap.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* Memory map ***********************************************************************/ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_serial.c b/nuttx/arch/arm/src/lm3s/lm3s_serial.c index 3c4247da5..f8cde80e7 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_serial.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_serial.c @@ -38,8 +38,10 @@ ****************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <sys/types.h> +#include <stdint.h> +#include <stdbool.h> #include <unistd.h> #include <semaphore.h> #include <string.h> @@ -57,7 +59,7 @@ #include "os_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Some sanity checks *******************************************************/ @@ -132,32 +134,32 @@ struct up_dev_s { - uint32 uartbase; /* Base address of UART registers */ - uint32 baud; /* Configured baud */ - uint32 im; /* Saved IM value */ - ubyte irq; /* IRQ associated with this UART */ - ubyte parity; /* 0=none, 1=odd, 2=even */ - ubyte bits; /* Number of bits (7 or 8) */ - boolean stopbits2; /* TRUE: Configure with 2 stop bits instead of 1 */ + uint32_t uartbase; /* Base address of UART registers */ + uint32_t baud; /* Configured baud */ + uint32_t im; /* Saved IM value */ + uint8_t irq; /* IRQ associated with this UART */ + uint8_t parity; /* 0=none, 1=odd, 2=even */ + uint8_t bits; /* Number of bits (7 or 8) */ + bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */ }; /**************************************************************************** * Private Function Prototypes ****************************************************************************/ -static int up_setup(struct uart_dev_s *dev); -static void up_shutdown(struct uart_dev_s *dev); -static int up_attach(struct uart_dev_s *dev); -static void up_detach(struct uart_dev_s *dev); -static int up_interrupt(int irq, void *context); -static int up_ioctl(struct file *filep, int cmd, unsigned long arg); -static int up_receive(struct uart_dev_s *dev, uint32 *status); -static void up_rxint(struct uart_dev_s *dev, boolean enable); -static boolean up_rxavailable(struct uart_dev_s *dev); -static void up_send(struct uart_dev_s *dev, int ch); -static void up_txint(struct uart_dev_s *dev, boolean enable); -static boolean up_txready(struct uart_dev_s *dev); -static boolean up_txempty(struct uart_dev_s *dev); +static int up_setup(struct uart_dev_s *dev); +static void up_shutdown(struct uart_dev_s *dev); +static int up_attach(struct uart_dev_s *dev); +static void up_detach(struct uart_dev_s *dev); +static int up_interrupt(int irq, void *context); +static int up_ioctl(struct file *filep, int cmd, unsigned long arg); +static int up_receive(struct uart_dev_s *dev, uint32_t *status); +static void up_rxint(struct uart_dev_s *dev, bool enable); +static bool up_rxavailable(struct uart_dev_s *dev); +static void up_send(struct uart_dev_s *dev, int ch); +static void up_txint(struct uart_dev_s *dev, bool enable); +static bool up_txready(struct uart_dev_s *dev); +static bool up_txempty(struct uart_dev_s *dev); /**************************************************************************** * Private Variables @@ -258,7 +260,7 @@ static uart_dev_t g_uart1port = * Name: up_serialin ****************************************************************************/ -static inline uint32 up_serialin(struct up_dev_s *priv, int offset) +static inline uint32_t up_serialin(struct up_dev_s *priv, int offset) { return getreg32(priv->uartbase + offset); } @@ -267,7 +269,7 @@ static inline uint32 up_serialin(struct up_dev_s *priv, int offset) * Name: up_serialout ****************************************************************************/ -static inline void up_serialout(struct up_dev_s *priv, int offset, uint32 value) +static inline void up_serialout(struct up_dev_s *priv, int offset, uint32_t value) { putreg32(value, priv->uartbase + offset); } @@ -276,7 +278,7 @@ static inline void up_serialout(struct up_dev_s *priv, int offset, uint32 value) * Name: up_disableuartint ****************************************************************************/ -static inline void up_disableuartint(struct up_dev_s *priv, uint32 *im) +static inline void up_disableuartint(struct up_dev_s *priv, uint32_t *im) { /* Return the current interrupt mask value */ @@ -295,7 +297,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint32 *im) * Name: up_restoreuartint ****************************************************************************/ -static inline void up_restoreuartint(struct up_dev_s *priv, uint32 im) +static inline void up_restoreuartint(struct up_dev_s *priv, uint32_t im) { priv->im = im; up_serialout(priv, LM3S_UART_IM_OFFSET, im); @@ -343,13 +345,13 @@ static inline void up_waittxnotfull(struct up_dev_s *priv) static int up_setup(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 lcrh; - uint32 ctl; + uint32_t lcrh; + uint32_t ctl; #ifndef CONFIG_SUPPRESS_UART_CONFIG - uint32 den; - uint32 brdi; - uint32 remainder; - uint32 divfrac; + uint32_t den; + uint32_t brdi; + uint32_t remainder; + uint32_t divfrac; /* Note: The logic here depends on the fact that that the UART module * was enabled and the GPIOs were configured in up_lowsetup(). @@ -568,9 +570,9 @@ static int up_interrupt(int irq, void *context) { struct uart_dev_s *dev = NULL; struct up_dev_s *priv; - uint32 mis; + uint32_t mis; int passes; - boolean handled; + bool handled; #ifndef CONFIG_UART0_DISABLE if (g_uart0priv.irq == irq) @@ -595,10 +597,10 @@ static int up_interrupt(int irq, void *context) * until we have been looping for a long time. */ - handled = TRUE; + handled = true; for (passes = 0; passes < 256 && handled; passes++) { - handled = FALSE; + handled = false; /* Get the masked UART status and clear the pending interrupts. */ @@ -612,7 +614,7 @@ static int up_interrupt(int irq, void *context) /* Rx buffer not empty ... process incoming bytes */ uart_recvchars(dev); - handled = TRUE; + handled = true; } /* Handle outgoing, transmit bytes */ @@ -622,7 +624,7 @@ static int up_interrupt(int irq, void *context) /* Tx FIFO not full ... process outgoing bytes */ uart_xmitchars(dev); - handled = TRUE; + handled = true; } } return OK; @@ -678,10 +680,10 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) * ****************************************************************************/ -static int up_receive(struct uart_dev_s *dev, uint32 *status) +static int up_receive(struct uart_dev_s *dev, uint32_t *status) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - uint32 rxd; + uint32_t rxd; /* Get the Rx byte + 4 bits of error information. Return those in status */ @@ -701,7 +703,7 @@ static int up_receive(struct uart_dev_s *dev, uint32 *status) * ****************************************************************************/ -static void up_rxint(struct uart_dev_s *dev, boolean enable) +static void up_rxint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; if (enable) @@ -725,11 +727,11 @@ static void up_rxint(struct uart_dev_s *dev, boolean enable) * Name: up_rxavailable * * Description: - * Return TRUE if the receive fifo is not empty + * Return true if the receive fifo is not empty * ****************************************************************************/ -static boolean up_rxavailable(struct uart_dev_s *dev) +static bool up_rxavailable(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, LM3S_UART_FR_OFFSET) & UART_FR_RXFE) == 0); @@ -746,7 +748,7 @@ static boolean up_rxavailable(struct uart_dev_s *dev) static void up_send(struct uart_dev_s *dev, int ch) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; - up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32)ch); + up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32_t)ch); } /**************************************************************************** @@ -757,7 +759,7 @@ static void up_send(struct uart_dev_s *dev, int ch) * ****************************************************************************/ -static void up_txint(struct uart_dev_s *dev, boolean enable) +static void up_txint(struct uart_dev_s *dev, bool enable) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; irqstate_t flags; @@ -798,11 +800,11 @@ static void up_txint(struct uart_dev_s *dev, boolean enable) * Name: up_txready * * Description: - * Return TRUE if the tranmsit fifo is not full + * Return true if the tranmsit fifo is not full * ****************************************************************************/ -static boolean up_txready(struct uart_dev_s *dev) +static bool up_txready(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, LM3S_UART_FR_OFFSET) & UART_FR_TXFF) == 0); @@ -812,11 +814,11 @@ static boolean up_txready(struct uart_dev_s *dev) * Name: up_txempty * * Description: - * Return TRUE if the transmit fifo is empty + * Return true if the transmit fifo is empty * ****************************************************************************/ -static boolean up_txempty(struct uart_dev_s *dev) +static bool up_txempty(struct uart_dev_s *dev) { struct up_dev_s *priv = (struct up_dev_s*)dev->priv; return ((up_serialin(priv, LM3S_UART_FR_OFFSET) & UART_FR_TXFE) != 0); @@ -852,7 +854,7 @@ void up_earlyserialinit(void) /* Configuration whichever one is the console */ #ifdef HAVE_CONSOLE - CONSOLE_DEV.isconsole = TRUE; + CONSOLE_DEV.isconsole = true; up_setup(&CONSOLE_DEV); #endif } @@ -894,11 +896,11 @@ int up_putc(int ch) { #ifdef HAVE_CONSOLE struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv; - uint32 im; + uint32_t im; up_disableuartint(priv, &im); up_waittxnotfull(priv); - up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32)ch); + up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32_t)ch); /* Check for LF */ @@ -907,7 +909,7 @@ int up_putc(int ch) /* Add CR */ up_waittxnotfull(priv); - up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32)'\r'); + up_serialout(priv, LM3S_UART_DR_OFFSET, (uint32_t)'\r'); } up_waittxnotfull(priv); diff --git a/nuttx/arch/arm/src/lm3s/lm3s_ssi.c b/nuttx/arch/arm/src/lm3s/lm3s_ssi.c index 2821dc87e..980164ba9 100755 --- a/nuttx/arch/arm/src/lm3s/lm3s_ssi.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_ssi.c @@ -38,8 +38,10 @@ ****************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <sys/types.h> +#include <stdint.h> +#include <stdbool.h> #include <semaphore.h> #include <errno.h> #include <debug.h> @@ -57,7 +59,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* Enables debug output from this file (needs CONFIG_DEBUG with @@ -150,8 +152,8 @@ struct lm3s_ssidev_s /* These following are the source and destination buffers of the transfer. * they are retained in this structure so that they will be accessible - * from an interrupt handler. The actual type of the buffer is ubyte is - * nbits <=8 and uint16 is nbits >8. + * from an interrupt handler. The actual type of the buffer is uint8_t is + * nbits <=8 and uint16_t is nbits >8. */ void *txbuffer; /* Source buffer */ @@ -168,19 +170,19 @@ struct lm3s_ssidev_s void (*rxword)(struct lm3s_ssidev_s *priv); #if NSSI_ENABLED > 1 - uint32 base; /* SSI register base address */ + uint32_t base; /* SSI register base address */ #endif - uint32 frequency; /* Current desired SCLK frequency */ - uint32 actual; /* Current actual SCLK frequency */ + uint32_t frequency; /* Current desired SCLK frequency */ + uint32_t actual; /* Current actual SCLK frequency */ - int ntxwords; /* Number of words left to transfer on the Tx FIFO */ - int nrxwords; /* Number of words received on the Rx FIFO */ - int nwords; /* Number of words to be exchanged */ + int ntxwords; /* Number of words left to transfer on the Tx FIFO */ + int nrxwords; /* Number of words received on the Rx FIFO */ + int nwords; /* Number of words to be exchanged */ - ubyte mode; /* Current mode */ - ubyte nbits; /* Current number of bits per word */ + uint8_t mode; /* Current mode */ + uint8_t nbits; /* Current number of bits per word */ #if !defined(CONFIG_SSI_POLLWAIT) && NSSI_ENABLED > 1 - ubyte irq; /* SSI IRQ number */ + uint8_t irq; /* SSI IRQ number */ #endif }; @@ -190,57 +192,64 @@ struct lm3s_ssidev_s /* SSI register access */ -static inline uint32 ssi_getreg(struct lm3s_ssidev_s *priv, unsigned int offset); -static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, uint32 value); +static inline uint32_t ssi_getreg(struct lm3s_ssidev_s *priv, + unsigned int offset); +static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, + uint32_t value); /* Misc helpers */ -static uint32 ssi_disable(struct lm3s_ssidev_s *priv); -static void ssi_enable(struct lm3s_ssidev_s *priv, uint32 enable); +static uint32_t ssi_disable(struct lm3s_ssidev_s *priv); +static void ssi_enable(struct lm3s_ssidev_s *priv, uint32_t enable); static void ssi_semtake(sem_t *sem); #define ssi_semgive(s) sem_post(s); /* SSI data transfer */ -static void ssi_txnull(struct lm3s_ssidev_s *priv); -static void ssi_txuint16(struct lm3s_ssidev_s *priv); -static void ssi_txubyte(struct lm3s_ssidev_s *priv); -static void ssi_rxnull(struct lm3s_ssidev_s *priv); -static void ssi_rxuint16(struct lm3s_ssidev_s *priv); -static void ssi_rxubyte(struct lm3s_ssidev_s *priv); -static inline boolean ssi_txfifofull(struct lm3s_ssidev_s *priv); -static inline boolean ssi_rxfifoempty(struct lm3s_ssidev_s *priv); +static void ssi_txnull(struct lm3s_ssidev_s *priv); +static void ssi_txuint16(struct lm3s_ssidev_s *priv); +static void ssi_txuint8(struct lm3s_ssidev_s *priv); +static void ssi_rxnull(struct lm3s_ssidev_s *priv); +static void ssi_rxuint16(struct lm3s_ssidev_s *priv); +static void ssi_rxuint8(struct lm3s_ssidev_s *priv); +static inline bool ssi_txfifofull(struct lm3s_ssidev_s *priv); +static inline bool ssi_rxfifoempty(struct lm3s_ssidev_s *priv); #if CONFIG_SSI_TXLIMIT == 1 && defined(CONFIG_SSI_POLLWAIT) static inline int ssi_performtx(struct lm3s_ssidev_s *priv); #else -static int ssi_performtx(struct lm3s_ssidev_s *priv); +static int ssi_performtx(struct lm3s_ssidev_s *priv); #endif static inline void ssi_performrx(struct lm3s_ssidev_s *priv); -static int ssi_transfer(struct lm3s_ssidev_s *priv, const void *txbuffer, - void *rxbuffer, unsigned int nwords); +static int ssi_transfer(struct lm3s_ssidev_s *priv, const void *txbuffer, + void *rxbuffer, unsigned int nwords); /* Interrupt handling */ #ifndef CONFIG_SSI_POLLWAIT static inline struct lm3s_ssidev_s *ssi_mapirq(int irq); -static int ssi_interrupt(int irq, void *context); +static int ssi_interrupt(int irq, void *context); #endif /* SPI methods */ -static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, uint32 frequency); -static uint32 ssi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency); -static void ssi_setmodeinternal(struct lm3s_ssidev_s *priv, enum spi_mode_e mode); -static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode); -static void ssi_setbitsinternal(struct lm3s_ssidev_s *priv, int nbits); -static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits); -static uint16 ssi_send(FAR struct spi_dev_s *dev, uint16 wd); +static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, + uint32_t frequency); +static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev, + uint32_t frequency); +static void ssi_setmodeinternal(struct lm3s_ssidev_s *priv, + enum spi_mode_e mode); +static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode); +static void ssi_setbitsinternal(struct lm3s_ssidev_s *priv, int nbits); +static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits); +static uint16_t ssi_send(FAR struct spi_dev_s *dev, uint16_t wd); #ifdef CONFIG_SPI_EXCHANGE -static void ssi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, - FAR void *rxbuffer, size_t nwords); +static void ssi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, + FAR void *rxbuffer, size_t nwords); #else -static void ssi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size_t nwords); -static void ssi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t nwords); +static void ssi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, + size_t nwords); +static void ssi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, + size_t nwords); #endif /**************************************************************************** @@ -317,7 +326,7 @@ static struct lm3s_ssidev_s g_ssidev[] = * ****************************************************************************/ -static inline uint32 ssi_getreg(struct lm3s_ssidev_s *priv, unsigned int offset) +static inline uint32_t ssi_getreg(struct lm3s_ssidev_s *priv, unsigned int offset) { #if NSSI_ENABLED > 1 return getreg32(priv->base + offset); @@ -342,7 +351,7 @@ static inline uint32 ssi_getreg(struct lm3s_ssidev_s *priv, unsigned int offset) * ****************************************************************************/ -static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, uint32 value) +static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, uint32_t value) { #if NSSI_ENABLED > 1 putreg32(value, priv->base + offset); @@ -366,10 +375,10 @@ static inline void ssi_putreg(struct lm3s_ssidev_s *priv, unsigned int offset, u * ****************************************************************************/ -static uint32 ssi_disable(struct lm3s_ssidev_s *priv) +static uint32_t ssi_disable(struct lm3s_ssidev_s *priv) { - uint32 retval; - uint32 regval; + uint32_t retval; + uint32_t regval; retval = ssi_getreg(priv, LM3S_SSI_CR1_OFFSET); regval = (retval & ~SSI_CR1_SSE); @@ -392,9 +401,9 @@ static uint32 ssi_disable(struct lm3s_ssidev_s *priv) * ****************************************************************************/ -static void ssi_enable(struct lm3s_ssidev_s *priv, uint32 enable) +static void ssi_enable(struct lm3s_ssidev_s *priv, uint32_t enable) { - uint32 regval = ssi_getreg(priv, LM3S_SSI_CR1_OFFSET); + uint32_t regval = ssi_getreg(priv, LM3S_SSI_CR1_OFFSET); regval &= ~SSI_CR1_SSE; regval |= (enable & SSI_CR1_SSE); ssi_putreg(priv, LM3S_SSI_CR1_OFFSET, regval); @@ -427,10 +436,10 @@ static void ssi_semtake(sem_t *sem) } /**************************************************************************** - * Name: ssi_txnull, ssi_txuint16, and ssi_txubyte + * Name: ssi_txnull, ssi_txuint16, and ssi_txuint8 * * Description: - * Transfer all ones, a ubyte, or uint16 to Tx FIFO and update the txbuffer + * Transfer all ones, a uint8_t, or uint16_t to Tx FIFO and update the txbuffer * pointer appropriately. The selected function dependes on (1) if there * is a source txbuffer provided, and (2) if the number of bits per * word is <=8 or >8. @@ -451,25 +460,25 @@ static void ssi_txnull(struct lm3s_ssidev_s *priv) static void ssi_txuint16(struct lm3s_ssidev_s *priv) { - uint16 *ptr = (uint16*)priv->txbuffer; + uint16_t *ptr = (uint16_t*)priv->txbuffer; ssivdbg("TX: %p->%04x\n", ptr, *ptr); - ssi_putreg(priv, LM3S_SSI_DR_OFFSET, (uint32)(*ptr++)); + ssi_putreg(priv, LM3S_SSI_DR_OFFSET, (uint32_t)(*ptr++)); priv->txbuffer = (void*)ptr; } -static void ssi_txubyte(struct lm3s_ssidev_s *priv) +static void ssi_txuint8(struct lm3s_ssidev_s *priv) { - ubyte *ptr = (ubyte*)priv->txbuffer; + uint8_t *ptr = (uint8_t*)priv->txbuffer; ssivdbg("TX: %p->%02x\n", ptr, *ptr); - ssi_putreg(priv, LM3S_SSI_DR_OFFSET, (uint32)(*ptr++)); + ssi_putreg(priv, LM3S_SSI_DR_OFFSET, (uint32_t)(*ptr++)); priv->txbuffer = (void*)ptr; } /**************************************************************************** - * Name: ssi_rxnull, ssi_rxuint16, and ssi_rxubyte + * Name: ssi_rxnull, ssi_rxuint16, and ssi_rxuint8 * * Description: - * Discard input, save a ubyte, or or save a uint16 from Tx FIFO in the + * Discard input, save a uint8_t, or or save a uint16_t from Tx FIFO in the * user rxvbuffer and update the rxbuffer pointer appropriately. The * selected function dependes on (1) if there is a desination rxbuffer * provided, and (2) if the number of bits per word is <=8 or >8. @@ -485,7 +494,7 @@ static void ssi_txubyte(struct lm3s_ssidev_s *priv) static void ssi_rxnull(struct lm3s_ssidev_s *priv) { #if defined(SSI_DEBUG) && defined(CONFIG_DEBUG_VERBOSE) - uint32 regval = ssi_getreg(priv, LM3S_SSI_DR_OFFSET); + uint32_t regval = ssi_getreg(priv, LM3S_SSI_DR_OFFSET); ssivdbg("RX: discard %04x\n", regval); #else (void)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); @@ -494,16 +503,16 @@ static void ssi_rxnull(struct lm3s_ssidev_s *priv) static void ssi_rxuint16(struct lm3s_ssidev_s *priv) { - uint16 *ptr = (uint16*)priv->rxbuffer; - *ptr = (uint16)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); + uint16_t *ptr = (uint16_t*)priv->rxbuffer; + *ptr = (uint16_t)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); ssivdbg("RX: %p<-%04x\n", ptr, *ptr); priv->rxbuffer = (void*)(++ptr); } -static void ssi_rxubyte(struct lm3s_ssidev_s *priv) +static void ssi_rxuint8(struct lm3s_ssidev_s *priv) { - ubyte *ptr = (ubyte*)priv->rxbuffer; - *ptr = (ubyte)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); + uint8_t *ptr = (uint8_t*)priv->rxbuffer; + *ptr = (uint8_t)ssi_getreg(priv, LM3S_SSI_DR_OFFSET); ssivdbg("RX: %p<-%02x\n", ptr, *ptr); priv->rxbuffer = (void*)(++ptr); } @@ -512,17 +521,17 @@ static void ssi_rxubyte(struct lm3s_ssidev_s *priv) * Name: ssi_txfifofull * * Description: - * Return TRUE if the Tx FIFO is full + * Return true if the Tx FIFO is full * * Input Parameters: * priv - Device-specific state data * * Returned Value: - * TRUE: Not full + * true: Not full * ****************************************************************************/ -static inline boolean ssi_txfifofull(struct lm3s_ssidev_s *priv) +static inline bool ssi_txfifofull(struct lm3s_ssidev_s *priv) { return (ssi_getreg(priv, LM3S_SSI_SR_OFFSET) & SSI_SR_TNF) == 0; } @@ -531,17 +540,17 @@ static inline boolean ssi_txfifofull(struct lm3s_ssidev_s *priv) * Name: ssi_rxfifoempty * * Description: - * Return TRUE if the Rx FIFO is empty + * Return true if the Rx FIFO is empty * * Input Parameters: * priv - Device-specific state data * * Returned Value: - * TRUE: Not empty + * true: Not empty * ****************************************************************************/ -static inline boolean ssi_rxfifoempty(struct lm3s_ssidev_s *priv) +static inline bool ssi_rxfifoempty(struct lm3s_ssidev_s *priv) { return (ssi_getreg(priv, LM3S_SSI_SR_OFFSET) & SSI_SR_RNE) == 0; } @@ -583,7 +592,7 @@ static inline int ssi_performtx(struct lm3s_ssidev_s *priv) static int ssi_performtx(struct lm3s_ssidev_s *priv) { #ifndef CONFIG_SSI_POLLWAIT - uint32 regval; + uint32_t regval; #endif int ntxd = 0; /* Number of words written to Tx FIFO */ @@ -666,7 +675,7 @@ static int ssi_performtx(struct lm3s_ssidev_s *priv) static inline void ssi_performrx(struct lm3s_ssidev_s *priv) { #ifndef CONFIG_SSI_POLLWAIT - uint32 regval; + uint32_t regval; #endif /* Loop while data is available in the Rx FIFO */ @@ -728,9 +737,9 @@ static inline void ssi_performrx(struct lm3s_ssidev_s *priv) * txbuffer - The buffer of data to send to the device (may be NULL). * rxbuffer - The buffer to receive data from the device (may be NULL). * nwords - The total number of words to be exchanged. If the interface - * uses <= 8 bits per word, then this is the number of ubytes; + * uses <= 8 bits per word, then this is the number of uint8_t's; * if the interface uses >8 bits per word, then this is the - * number of uint16's + * number of uint16_t's * * Returned Value: * 0: success, <0:Negated error number on failure @@ -750,11 +759,11 @@ static int ssi_transfer(struct lm3s_ssidev_s *priv, const void *txbuffer, /* Set up to perform the transfer */ - priv->txbuffer = (ubyte*)txbuffer; /* Source buffer */ - priv->rxbuffer = (ubyte*)rxbuffer; /* Destination buffer */ - priv->ntxwords = nwords; /* Number of words left to send */ - priv->nrxwords = 0; /* Number of words received */ - priv->nwords = nwords; /* Total number of exchanges */ + priv->txbuffer = (uint8_t*)txbuffer; /* Source buffer */ + priv->rxbuffer = (uint8_t*)rxbuffer; /* Destination buffer */ + priv->ntxwords = nwords; /* Number of words left to send */ + priv->nrxwords = 0; /* Number of words received */ + priv->nwords = nwords; /* Total number of exchanges */ /* Set up the low-level data transfer function pointers */ @@ -765,8 +774,8 @@ static int ssi_transfer(struct lm3s_ssidev_s *priv, const void *txbuffer, } else { - priv->txword = ssi_txubyte; - priv->rxword = ssi_rxubyte; + priv->txword = ssi_txuint8; + priv->rxword = ssi_rxuint8; } if (!txbuffer) @@ -893,9 +902,9 @@ static inline struct lm3s_ssidev_s *ssi_mapirq(int irq) * txbuffer - The buffer of data to send to the device (may be NULL). * rxbuffer - The buffer to receive data from the device (may be NULL). * nwords - The total number of words to be exchanged. If the interface - * uses <= 8 bits per word, then this is the number of ubytes; + * uses <= 8 bits per word, then this is the number of uint8_t's; * if the interface uses >8 bits per word, then this is the - * number of uint16's + * number of uint16_t's * * Returned Value: * 0: success, <0:Negated error number on failure @@ -906,7 +915,7 @@ static inline struct lm3s_ssidev_s *ssi_mapirq(int irq) static int ssi_interrupt(int irq, void *context) { struct lm3s_ssidev_s *priv = ssi_mapirq(irq); - uint32 regval; + uint32_t regval; int ntxd; DEBUGASSERT(priv != NULL); @@ -974,12 +983,12 @@ static int ssi_interrupt(int irq, void *context) * ****************************************************************************/ -static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, uint32 frequency) +static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, uint32_t frequency) { - uint32 maxdvsr; - uint32 cpsdvsr; - uint32 regval; - uint32 scr; + uint32_t maxdvsr; + uint32_t cpsdvsr; + uint32_t regval; + uint32_t scr; ssidbg("frequency: %d\n", frequency); if (priv && frequency != priv->frequency) @@ -1055,10 +1064,10 @@ static void ssi_setfrequencyinternal(struct lm3s_ssidev_s *priv, uint32 frequenc } } -static uint32 ssi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency) +static uint32_t ssi_setfrequency(FAR struct spi_dev_s *dev, uint32_t frequency) { struct lm3s_ssidev_s *priv = (struct lm3s_ssidev_s *)dev; - uint32 enable; + uint32_t enable; /* NOTE that the SSI must be disabled when setting any configuration registers. */ @@ -1087,8 +1096,8 @@ static uint32 ssi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency) static void ssi_setmodeinternal(struct lm3s_ssidev_s *priv, enum spi_mode_e mode) { - uint32 modebits; - uint32 regval; + uint32_t modebits; + uint32_t regval; ssidbg("mode: %d\n", mode); if (priv && mode != priv->mode) @@ -1130,7 +1139,7 @@ static void ssi_setmodeinternal(struct lm3s_ssidev_s *priv, enum spi_mode_e mode static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) { struct lm3s_ssidev_s *priv = (struct lm3s_ssidev_s *)dev; - uint32 enable; + uint32_t enable; /* NOTE that the SSI must be disabled when setting any configuration registers. */ @@ -1158,7 +1167,7 @@ static void ssi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode) static void ssi_setbitsinternal(struct lm3s_ssidev_s *priv, int nbits) { - uint32 regval; + uint32_t regval; ssidbg("nbits: %d\n", nbits); if (priv && nbits != priv->nbits && nbits >=4 && nbits <= 16) @@ -1176,7 +1185,7 @@ static void ssi_setbitsinternal(struct lm3s_ssidev_s *priv, int nbits) static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits) { struct lm3s_ssidev_s *priv = (struct lm3s_ssidev_s *)dev; - uint32 enable; + uint32_t enable; /* NOTE that the SSI must be disabled when setting any configuration registers. */ @@ -1203,10 +1212,10 @@ static void ssi_setbits(FAR struct spi_dev_s *dev, int nbits) * ****************************************************************************/ -static uint16 ssi_send(FAR struct spi_dev_s *dev, uint16 wd) +static uint16_t ssi_send(FAR struct spi_dev_s *dev, uint16_t wd) { struct lm3s_ssidev_s *priv = (struct lm3s_ssidev_s*)dev; - uint16 response = 0; + uint16_t response = 0; (void)ssi_transfer(priv, &wd, &response, 1); return response; @@ -1225,7 +1234,7 @@ static uint16 ssi_send(FAR struct spi_dev_s *dev, uint16 wd) * nwords - the length of data that to be exchanged in units of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -1253,7 +1262,7 @@ static void ssi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer, * nwords - the length of data to send from the buffer in number of words. * The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -1280,7 +1289,7 @@ static void ssi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer, size * nwords - the length of data that can be received in the buffer in number * of words. The wordsize is determined by the number of bits-per-word * selected for the SPI interface. If nbits <= 8, the data is - * packed into ubytes; if nbits >8, the data is packed into uint16's + * packed into uint8_t's; if nbits >8, the data is packed into uint16_t's * * Returned Value: * None @@ -1325,7 +1334,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port) { struct lm3s_ssidev_s *priv; irqstate_t flags; - ubyte regval; + uint8_t regval; ssidbg("port: %d\n", port); diff --git a/nuttx/arch/arm/src/lm3s/lm3s_start.c b/nuttx/arch/arm/src/lm3s/lm3s_start.c index 272cb8210..272ebec17 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_start.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_start.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <stdint.h> #include <assert.h> #include <debug.h> @@ -51,7 +51,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ /**************************************************************************** @@ -96,8 +96,8 @@ extern void lm3s_vectors(void); void __start(void) { - const uint32 *src; - uint32 *dest; + const uint32_t *src; + uint32_t *dest; /* Configure the uart so that we can get debug output as soon as possible */ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c b/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c index 464cabd1c..f7a9528c1 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c @@ -39,8 +39,8 @@ ****************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> +#include <stdint.h> #include <assert.h> #include <debug.h> @@ -52,7 +52,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Private Definitions + * Pre-processor Definitions ****************************************************************************/ #define RCC_OSCMASK (SYSCON_RCC_IOSCDIS|SYSCON_RCC_MOSCDIS) @@ -86,7 +86,7 @@ * ****************************************************************************/ -static inline void lm3s_delay(uint32 delay) +static inline void lm3s_delay(uint32_t delay) { __asm__ __volatile__("1:\n" "\tsubs %0, #1\n" @@ -104,19 +104,19 @@ static inline void lm3s_delay(uint32 delay) * ****************************************************************************/ -static inline void lm3s_oscdelay(uint32 rcc, uint32 rcc2) +static inline void lm3s_oscdelay(uint32_t rcc, uint32_t rcc2) { /* Wait for the oscillator to stabilize. A smaller delay is used if the * current clock rate is very slow. */ - uint32 delay = FAST_OSCDELAY; + uint32_t delay = FAST_OSCDELAY; /* Are we currently using RCC2? */ if ((rcc2 & SYSCON_RCC2_USERCC2) != 0) { - uint32 rcc2src = rcc2 & SYSCON_RCC2_OSCSRC2_MASK; + uint32_t rcc2src = rcc2 & SYSCON_RCC2_OSCSRC2_MASK; if ((rcc2src == SYSCON_RCC2_OSCSRC2_30KHZ) || (rcc2src == SYSCON_RCC2_OSCSRC2_32KHZ)) { @@ -128,7 +128,7 @@ static inline void lm3s_oscdelay(uint32 rcc, uint32 rcc2) else { - uint32 rccsrc = rcc & SYSCON_RCC_OSCSRC_MASK; + uint32_t rccsrc = rcc & SYSCON_RCC_OSCSRC_MASK; if (rccsrc == SYSCON_RCC_OSCSRC_30KHZ) { delay = SLOW_OSCDELAY; @@ -150,7 +150,7 @@ static inline void lm3s_oscdelay(uint32 rcc, uint32 rcc2) static inline void lm3s_plllock(void) { - uint32 delay; + uint32_t delay; /* Loop until the lock is achieved or until a timeout occurs */ @@ -183,10 +183,10 @@ static inline void lm3s_plllock(void) * ****************************************************************************/ -void lm3s_clockconfig(uint32 newrcc, uint32 newrcc2) +void lm3s_clockconfig(uint32_t newrcc, uint32_t newrcc2) { - uint32 rcc; - uint32 rcc2; + uint32_t rcc; + uint32_t rcc2; /* Get the current values of the RCC and RCC2 registers */ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.h b/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.h index 885698dd3..13a2819ab 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.h +++ b/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* System Control Register Offsets **************************************************/ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_timerisr.c b/nuttx/arch/arm/src/lm3s/lm3s_timerisr.c index 714d68c7d..ad5aa279d 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_timerisr.c +++ b/nuttx/arch/arm/src/lm3s/lm3s_timerisr.c @@ -38,7 +38,8 @@ ****************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> + +#include <stdint.h> #include <time.h> #include <debug.h> #include <nuttx/arch.h> @@ -53,7 +54,7 @@ #include "lm3s_internal.h" /**************************************************************************** - * Definitions + * Pre-processor Definitions ****************************************************************************/ /* The desired timer interrupt frequency is provided by the definition @@ -96,7 +97,7 @@ * ****************************************************************************/ -int up_timerisr(int irq, uint32 *regs) +int up_timerisr(int irq, uint32_t *regs) { /* Process timer interrupt */ @@ -115,7 +116,7 @@ int up_timerisr(int irq, uint32 *regs) void up_timerinit(void) { - uint32 regval; + uint32_t regval; /* Set the SysTick interrupt to the default priority */ diff --git a/nuttx/arch/arm/src/lm3s/lm3s_uart.h b/nuttx/arch/arm/src/lm3s/lm3s_uart.h index d027e17dc..f807f0a2a 100644 --- a/nuttx/arch/arm/src/lm3s/lm3s_uart.h +++ b/nuttx/arch/arm/src/lm3s/lm3s_uart.h @@ -41,10 +41,9 @@ ************************************************************************************/ #include <nuttx/config.h> -#include <sys/types.h> /************************************************************************************ - * Definitions + * Pre-processor Definitions ************************************************************************************/ /* UART register offsets ************************************************************/ |