diff options
Diffstat (limited to 'nuttx/arch/arm/src/samv7/chip/sam_usbhs.h')
| -rw-r--r-- | nuttx/arch/arm/src/samv7/chip/sam_usbhs.h | 29 |
1 files changed, 2 insertions, 27 deletions
diff --git a/nuttx/arch/arm/src/samv7/chip/sam_usbhs.h b/nuttx/arch/arm/src/samv7/chip/sam_usbhs.h index 407cc507c..73edf6f7a 100644 --- a/nuttx/arch/arm/src/samv7/chip/sam_usbhs.h +++ b/nuttx/arch/arm/src/samv7/chip/sam_usbhs.h @@ -1,7 +1,7 @@ /************************************************************************************************************ * arch/arm/src/samv7/chip/sam_usbhs.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2015 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> * * References: @@ -126,10 +126,6 @@ #define SAM_USBHS_SCR_OFFSET 0x0808 /* General Status Clear Register */ #define SAM_USBHS_SFR_OFFSET 0x080c /* General Status Set Register */ /* 0x0810-0x082c: Reserved */ -/* UTMI Registers */ - -#define SAM_UTMI_OHCIICR_OFFSET 0x0010 /* OHCI Interrupt Configuration Register */ -#define SAM_UTMI_CKTRIM_OFFSET 0x0030 /* UTMI Clock Trimming Register */ /* Register addresses ***************************************************************************************/ @@ -195,11 +191,6 @@ #define SAM_USBHS_SCR (SAM_USBHS_BASE+SAM_USBHS_SCR_OFFSET) #define SAM_USBHS_SFR (SAM_USBHS_BASE+SAM_USBHS_SFR_OFFSET) -/* UTMI Registers */ - -#define SAM_UTMI_OHCIICR (SAM_UTMI_BASE+SAM_UTMI_OHCIICR_OFFSET) -#define SAM_UTMI_CKTRIM (SAM_UTMI_BASE+SAM_UTMI_CKTRIM_OFFSET) - /* Register bit-field definitions ***************************************************************************/ /* USBHS Device Controller Register Bit Field Definitions */ @@ -304,7 +295,7 @@ /* Device Endpoint Configuration Register */ -#define USBHS_DEVEPTCFG_ALLOC (1 << 0) /* Bit 0: Endpoint Memory Allocate */ +#define USBHS_DEVEPTCFG_ALLOC (1 << 1) /* Bit 1: Endpoint Memory Allocate */ #define USBHS_DEVEPTCFG_EPBK_SHIFT (2) /* Bits 2-3: Endpoint Banks */ #define USBHS_DEVEPTCFG_EPBK_MASK (3 << USBHS_DEVEPTCFG_EPBK_SHIFT) # define USBHS_DEVEPTCFG_EPBK(n) ((uint32_t)((n)-1) << USBHS_DEVEPTCFG_EPBK_SHIFT) @@ -779,22 +770,6 @@ #define USBHS_SFR_RDERRIS (1 << 4) /* Bit 4: Remote Device Connection Error Interrupt Set */ -/* UTMI Registers */ - -/* OHCI Interrupt Configuration Register */ - -#define UTMI_OHCIICR_RES0 (1 << 0) /* Bit 0: USB PORT0 Reset */ -#define UTMI_OHCIICR_ARIE (1 << 4) /* Bit 4: OHCI Asynchronous Resume Interrupt Enable */ -#define UTMI_OHCIICR_APPSTART (0 << 5) /* Bit 5: Reserved, must be zero */ -#define UTMI_OHCIICR_UDPPUDIS (1 << 23) /* Bit 23: USB Device Pull-up Disable */ - -/* UTMI Clock Trimming Register */ - -#define UTMI_CKTRIM_FREQ_SHIFT (0) /* Bits 0-1: UTMI Reference Clock Frequency */ -#define UTMI_CKTRIM_FREQ_MASK (3 << UTMI_CKTRIM_FREQ_SHIFT) -# define UTMI_CKTRIM_FREQ_XTAL12 (0 << UTMI_CKTRIM_FREQ_SHIFT) /* 12 MHz reference clock */ -# define UTMI_CKTRIM_FREQ_XTAL16 (1 << UTMI_CKTRIM_FREQ_SHIFT) /* 16 MHz reference clock */ - /************************************************************************************************************ * Public Types ************************************************************************************************************/ |