summaryrefslogtreecommitdiff
path: root/nuttx/arch/arm/src/stm32/stm32_pwm.c
diff options
context:
space:
mode:
Diffstat (limited to 'nuttx/arch/arm/src/stm32/stm32_pwm.c')
-rw-r--r--nuttx/arch/arm/src/stm32/stm32_pwm.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/nuttx/arch/arm/src/stm32/stm32_pwm.c b/nuttx/arch/arm/src/stm32/stm32_pwm.c
index c55ab23c5..7be44642d 100644
--- a/nuttx/arch/arm/src/stm32/stm32_pwm.c
+++ b/nuttx/arch/arm/src/stm32/stm32_pwm.c
@@ -169,7 +169,7 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv);
#if defined(CONFIG_STM32_TIM1_PWM)
static int pwm_tim1interrupt(int irq, void *context);
#endif
-#if defined(CONFIG_STM32_TIM1_PWM)
+#if defined(CONFIG_STM32_TIM8_PWM)
static int pwm_tim8interrupt(int irq, void *context);
#endif
#endif
@@ -906,12 +906,12 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv)
{
/* Verify that this is an update interrupt. Nothing else is expected. */
- pwmllvdbg("Update interrupt: %04x\n", pwm_getreg(STM32_GTIM_SR_OFFSET));
- DEBUGASSERT((pwm_getreg(STM32_GTIM_SR_OFFSET) & ATIM_SR_UIF) != 0);
+ pwmllvdbg("Update interrupt: %04x\n", pwm_getreg(priv, STM32_GTIM_SR_OFFSET));
+ DEBUGASSERT((pwm_getreg(priv, STM32_GTIM_SR_OFFSET) & ATIM_SR_UIF) != 0);
/* Disable further interrupts and stop the timer */
- (void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv)
+ (void)pwm_stop((FAR struct pwm_lowerhalf_s *)priv);
/* Then perform the callback into the upper half driver */