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-rw-r--r--nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h16
-rwxr-xr-xnuttx/arch/arm/src/stm32/stm32_otgfsdev.c12
2 files changed, 16 insertions, 12 deletions
diff --git a/nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h b/nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h
index 57799b6b6..d3bf7eb54 100644
--- a/nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h
+++ b/nuttx/arch/arm/src/stm32/chip/stm32_otgfs.h
@@ -198,17 +198,17 @@
#define STM32_OTGFS_DFIFO_DEP_OFFSET(n) (0x1000 + ((n) << 12))
#define STM32_OTGFS_DFIFO_HCH_OFFSET(n) (0x1000 + ((n) << 12))
-#define STM32_OTGFS_DFIFO_DEP0_OFFSET 0x1000 /* 0x1000–0x1ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */
-#define STM32_OTGFS_DFIFO_HCH0_OFFSET 0x1000 /* 0x1000–0x1ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */
+#define STM32_OTGFS_DFIFO_DEP0_OFFSET 0x1000 /* 0x1000-0x1ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */
+#define STM32_OTGFS_DFIFO_HCH0_OFFSET 0x1000 /* 0x1000-0x1ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */
-#define STM32_OTGFS_DFIFO_DEP1_OFFSET 0x2000 /* 0x2000–0x2ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */
-#define STM32_OTGFS_DFIFO_HCH1_OFFSET 0x2000 /* 0x2000–0x2ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */
+#define STM32_OTGFS_DFIFO_DEP1_OFFSET 0x2000 /* 0x2000-0x2ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */
+#define STM32_OTGFS_DFIFO_HCH1_OFFSET 0x2000 /* 0x2000-0x2ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */
-#define STM32_OTGFS_DFIFO_DEP2_OFFSET 0x3000 /* 0x3000–0x3ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */
-#define STM32_OTGFS_DFIFO_HCH2_OFFSET 0x3000 /* 0x3000–0x3ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */
+#define STM32_OTGFS_DFIFO_DEP2_OFFSET 0x3000 /* 0x3000-0x3ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */
+#define STM32_OTGFS_DFIFO_HCH2_OFFSET 0x3000 /* 0x3000-0x3ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */
-#define STM32_OTGFS_DFIFO_DEP3_OFFSET 0x4000 /* 0x4000–0x4ffc Device IN/OUT Endpoint 0 DFIFO Write/Read Access */
-#define STM32_OTGFS_DFIFO_HCH3_OFFSET 0x4000 /* 0x4000–0x4ffc Host OUT/IN Channel 0 DFIFO Read/Write Access */
+#define STM32_OTGFS_DFIFO_DEP3_OFFSET 0x4000 /* 0x4000-0x4ffc Device IN/OUT Endpoint 1 DFIFO Write/Read Access */
+#define STM32_OTGFS_DFIFO_HCH3_OFFSET 0x4000 /* 0x4000-0x4ffc Host OUT/IN Channel 1 DFIFO Read/Write Access */
/* Power and clock gating registers */
diff --git a/nuttx/arch/arm/src/stm32/stm32_otgfsdev.c b/nuttx/arch/arm/src/stm32/stm32_otgfsdev.c
index e36f4e33b..d07d06c79 100755
--- a/nuttx/arch/arm/src/stm32/stm32_otgfsdev.c
+++ b/nuttx/arch/arm/src/stm32/stm32_otgfsdev.c
@@ -1263,9 +1263,11 @@ static void stm32_rxfifo_read(FAR struct stm32_ep_s *privep,
uint32_t regaddr;
int i;
- /* Get the address of the endpoint FIFO. Note: there is only one RxFIFO. */
+ /* Get the address of the RxFIFO. Note: there is only one RxFIFO so
+ * we might as well use the addess associated with EP0.
+ */
- regaddr = STM32_OTGFS_DFIFO_DEP(privep->epphy);
+ regaddr = STM32_OTGFS_DFIFO_DEP(EP0);
/* Read 32-bits and write 4 x 8-bits at time (to avoid unaligned accesses) */
@@ -1305,9 +1307,11 @@ static void stm32_rxfifo_discard(FAR struct stm32_ep_s *privep, int len)
uint32_t regaddr;
int i;
- /* Get the address of the endpoint FIFO */
+ /* Get the address of the RxFIFO Note: there is only one RxFIFO so
+ * we might as well use the addess associated with EP0.
+ */
- regaddr = STM32_OTGFS_DFIFO_DEP(privep->epphy);
+ regaddr = STM32_OTGFS_DFIFO_DEP(EP0);
/* Read 32-bits at time */