diff options
Diffstat (limited to 'nuttx/arch/hc/src/m9s12/m9s12_dumpgpio.c')
| -rwxr-xr-x | nuttx/arch/hc/src/m9s12/m9s12_dumpgpio.c | 207 |
1 files changed, 205 insertions, 2 deletions
diff --git a/nuttx/arch/hc/src/m9s12/m9s12_dumpgpio.c b/nuttx/arch/hc/src/m9s12/m9s12_dumpgpio.c index a10983a4d..13a84dacf 100755 --- a/nuttx/arch/hc/src/m9s12/m9s12_dumpgpio.c +++ b/nuttx/arch/hc/src/m9s12/m9s12_dumpgpio.c @@ -41,8 +41,13 @@ #include <nuttx/config.h> #include <stdint.h> +#include <debug.h> +#include <arch/irq.h> +#include "up_arch.h" #include "m9s12_internal.h" +#include "m9s12_pim.h" +#include "m9s12_mebi.h" #ifdef CONFIG_DEBUG_GPIO @@ -50,10 +55,95 @@ * Definitions ****************************************************************************/ +/* PIM ports (T,S,G,H,J,L) */ + +#define HCS12_PIM_NPORTS 6 + +/* MEBI ports (A,B,E,K) */ + +#define HCS12_MEBI_NPORTS 4 + +/* Decoding helper macros */ + +#define HCS12_PIN(cfg) (((cfg) & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT) +#define HCS12_PORTNDX(cfg) (((cfg) >> GPIO_PORT_SHIFT) & 7) +#define HCS12_PIMPORT(cfg) (((cfg) & GPIO_PORT_PIM) != 0) +#define HCS12_MEBIPORT(cfg) (((cfg) & GPIO_PORT_PIM) == 0) + +#define HCS12_PULL(cfg) (((cfg) & GPIO_PULLUP_MASK) >> GPIO_PULLUP_SHIFT) +# define HCS12_PULL_NONE 0 +# define HCS12_PULL_POLARITY 1 +# define HCS12_PULL_ENABLE 2 +# define HCS12_PULL_UP 2 +# define HCS12_PULL_DOWN 3 + +#define HCS12_INTERRUPT(cfg) (((cfg) & GPIO_INT_MASK) >> GPIO_INT_SHIFT) +# define HCS12_INT_NONE 0 +# define HCS12_INT_POLARITY 1 +# define HCS12_INT_ENABLE 2 +# define HCS12_INT_FALLING 2 +# define HCS12_INT_RISING 3 + +/* PIM ports have the following forms: + * + * FORM 1: IO INPUT DDR RDR PER PS Port T + * FORM 2: IO INPUT DDR RDR PER PS WOM Port S,L + * FORM 3: IO INPUT DDR RDR PER PS IE IF Port G,H,J + */ + +#define PIMPORT_FORM1 0 +#define PIMPORT_FORM2 1 +#define PIMPORT_FORM3 2 + +/* MEBI ports are pretty strange. Most look the same, but E and K can have + * some special attributes. + */ + +#define MEBIPORT_AB 0 +#define MEBIPORT_E 1 +#define MEBIPORT_K 2 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +struct gpio_piminfo_s +{ + uint16_t base; /* PIM GPIO block base address */ + char name; /* Port name */ + uint8_t form; /* Form of the PIM GPIO block registers */ +}; + +struct gpio_mebiinfo_s +{ + uint16_t data; /* MEBI data register address */ + uint16_t ddr; /* MEBI ddr register address */ + char name; /* Port name */ + uint8_t form; /* Form of the MEBI port */ +}; + /**************************************************************************** * Public Data ****************************************************************************/ +static const struct gpio_piminfo_s piminfo[HCS12_PIM_NPORTS] = +{ + {HCS12_PIM_PORTT_BASE, 'T', PIMPORT_FORM1}, /* Port T */ + {HCS12_PIM_PORTS_BASE, 'S', PIMPORT_FORM2}, /* Port S */ + {HCS12_PIM_PORTG_BASE, 'G', PIMPORT_FORM3}, /* Port G */ + {HCS12_PIM_PORTH_BASE, 'H', PIMPORT_FORM3}, /* Port H */ + {HCS12_PIM_PORTJ_BASE, 'J', PIMPORT_FORM3}, /* Port J */ + {HCS12_PIM_PORTL_BASE, 'L', PIMPORT_FORM2} /* Port L */ +}; + +static const struct gpio_mebiinfo_s mebiinfo[HCS12_MEBI_NPORTS] = +{ + {HCS12_MEBI_PORTA, HCS12_MEBI_DDRA, 'A', MEBIPORT_AB}, /* Port A */ + {HCS12_MEBI_PORTB, HCS12_MEBI_DDRB, 'B', MEBIPORT_AB}, /* Port B */ + {HCS12_MEBI_PORTE, HCS12_MEBI_DDRE, 'E', MEBIPORT_E}, /* Port E */ + {HCS12_MEBI_PORTK, HCS12_MEBI_DDRK, 'K', MEBIPORT_K} /* Port K */ +}; + /**************************************************************************** * Private Data ****************************************************************************/ @@ -63,6 +153,105 @@ ****************************************************************************/ /**************************************************************************** + * Name: hcs12_pimdump + * + * Description: + * PIM GPIO register block dump + * + ****************************************************************************/ + +static inline void hcs12_pimdump(uint8_t portndx) +{ + const struct gpio_piminfo_s *ptr; + + if (portndx >= HCS12_PIM_NPORTS) + { + lldbg(" Illegal PIM port index: %d\n", portndx); + return; + } + + ptr = &piminfo[portndx]; + lldbg(" PIM Port%c:\n", ptr->name); + lldbg(" IO:%02x INP:%02x DDR:%02x RDR:%02x\n", + getreg8(ptr->base+HCS12_PIM_IO_OFFSET), + getreg8(ptr->base+HCS12_PIM_INPUT_OFFSET), + getreg8(ptr->base+HCS12_PIM_DDR_OFFSET), + getreg8(ptr->base+HCS12_PIM_RDR_OFFSET)); + + switch (ptr->form) + { + case PIMPORT_FORM1: + lldbg(" PER:%02x PS:%02x\n", + getreg8(ptr->base+HCS12_PIM_PER_OFFSET), + getreg8(ptr->base+HCS12_PIM_PS_OFFSET)); + break; + + case PIMPORT_FORM2: + lldbg(" PER:%02x PS:%02x WOM:%02x\n", + getreg8(ptr->base+HCS12_PIM_PER_OFFSET), + getreg8(ptr->base+HCS12_PIM_PS_OFFSET), + getreg8(ptr->base+HCS12_PIM_WOM_OFFSET)); + break; + + case PIMPORT_FORM3: + lldbg(" PER:%02x PS:%02x IE:%02x IF:%02x\n", + getreg8(ptr->base+HCS12_PIM_PER_OFFSET), + getreg8(ptr->base+HCS12_PIM_PS_OFFSET), + getreg8(ptr->base+HCS12_PIM_IE_OFFSET), + getreg8(ptr->base+HCS12_PIM_IF_OFFSET)); + break; + + default: + break; + } +} + +/**************************************************************************** + * Name: hcs12_mebidump + * + * Description: + * PIM GPIO register block dump + * + ****************************************************************************/ + +static inline void hcs12_mebidump(uint8_t portndx) +{ + const struct gpio_mebiinfo_s *ptr; + + if (portndx >= HCS12_MEBI_NPORTS) + { + lldbg(" Illegal MEBI port index: %d\n", portndx); + return; + } + + ptr = &mebiinfo[portndx]; + lldbg(" MEBI Port%c:\n", ptr->name); + + switch (ptr->form) + { + case MEBIPORT_AB: + lldbg(" DATA:%02x DDR:%02x\n", + getreg8(ptr->data), getreg8(ptr->ddr)); + break; + + case MEBIPORT_E: + lldbg(" DATA:%02x DDR:%02x MODE:%02x PEAR:%02x\n", + getreg8(ptr->data), getreg8(ptr->ddr), + getreg8(HCS12_MEBI_MODE), getreg8(HCS12_MEBI_PEAR)); + break; + + case MEBIPORT_K: + lldbg(" DATA:%02x DDR:%02x MODE:%02x\n", + getreg8(ptr->data), getreg8(ptr->ddr), + getreg8(HCS12_MEBI_MODE)); + break; + + default: + break; + } +} + +/**************************************************************************** * Public Functions ****************************************************************************/ @@ -76,8 +265,22 @@ int hcs12_dumpgpio(uint16_t pinset, const char *msg) { -#warning "Not implemented" - return -ENOSYS; + uint8_t portndx = HCS12_PORTNDX(pinset); + irqstate_t flags = irqsave(); + + lldbg("pinset: %08x -- %s\n", pinset, msg); + + if (HCS12_PIMPORT(pinset)) + { + hcs12_pimdump(portndx); + } + else + { + hcs12_mebidump(portndx); + } + + irqrestore(flags); + return OK; } #endif /* CONFIG_DEBUG_GPIO */ |