diff options
Diffstat (limited to 'nuttx/arch/z80/src')
75 files changed, 3130 insertions, 3130 deletions
diff --git a/nuttx/arch/z80/src/common/up_allocateheap.c b/nuttx/arch/z80/src/common/up_allocateheap.c index 368785cf2..94b06e375 100644 --- a/nuttx/arch/z80/src/common/up_allocateheap.c +++ b/nuttx/arch/z80/src/common/up_allocateheap.c @@ -2,7 +2,7 @@ * common/up_allocateheap.c * * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_arch.h b/nuttx/arch/z80/src/common/up_arch.h index 0cb523ea1..99087bb08 100644 --- a/nuttx/arch/z80/src/common/up_arch.h +++ b/nuttx/arch/z80/src/common/up_arch.h @@ -2,7 +2,7 @@ * common/up_arch.h * * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_assert.c b/nuttx/arch/z80/src/common/up_assert.c index 9fe66ecda..b35e8dd33 100644 --- a/nuttx/arch/z80/src/common/up_assert.c +++ b/nuttx/arch/z80/src/common/up_assert.c @@ -2,7 +2,7 @@ * common/up_assert.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_blocktask.c b/nuttx/arch/z80/src/common/up_blocktask.c index 7feb02169..bbc2be5e6 100644 --- a/nuttx/arch/z80/src/common/up_blocktask.c +++ b/nuttx/arch/z80/src/common/up_blocktask.c @@ -2,7 +2,7 @@ * arch/z80/src/common/up_blocktask.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_createstack.c b/nuttx/arch/z80/src/common/up_createstack.c index 6ffaa272b..28246aec3 100644 --- a/nuttx/arch/z80/src/common/up_createstack.c +++ b/nuttx/arch/z80/src/common/up_createstack.c @@ -2,7 +2,7 @@ * arch/z80/src/common/up_createstack.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_doirq.c b/nuttx/arch/z80/src/common/up_doirq.c index 828806a49..fd871e246 100644 --- a/nuttx/arch/z80/src/common/up_doirq.c +++ b/nuttx/arch/z80/src/common/up_doirq.c @@ -2,7 +2,7 @@ * arch/z80/src/common/up_doirq.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_exit.c b/nuttx/arch/z80/src/common/up_exit.c index f57fd442c..85ddd841e 100644 --- a/nuttx/arch/z80/src/common/up_exit.c +++ b/nuttx/arch/z80/src/common/up_exit.c @@ -2,7 +2,7 @@ * common/up_exit.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_idle.c b/nuttx/arch/z80/src/common/up_idle.c index 550bc124d..938a150a0 100644 --- a/nuttx/arch/z80/src/common/up_idle.c +++ b/nuttx/arch/z80/src/common/up_idle.c @@ -2,7 +2,7 @@ * common/up_idle.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_internal.h b/nuttx/arch/z80/src/common/up_internal.h index 919a74353..960061a80 100644 --- a/nuttx/arch/z80/src/common/up_internal.h +++ b/nuttx/arch/z80/src/common/up_internal.h @@ -2,7 +2,7 @@ * arch/z80/src/common/up_internal.h * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_interruptcontext.c b/nuttx/arch/z80/src/common/up_interruptcontext.c index e8887abef..31a636418 100644 --- a/nuttx/arch/z80/src/common/up_interruptcontext.c +++ b/nuttx/arch/z80/src/common/up_interruptcontext.c @@ -2,7 +2,7 @@ * arch/z80/src/common/up_interruptcontext.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_mdelay.c b/nuttx/arch/z80/src/common/up_mdelay.c index 33a813063..dd09043fc 100644 --- a/nuttx/arch/z80/src/common/up_mdelay.c +++ b/nuttx/arch/z80/src/common/up_mdelay.c @@ -2,7 +2,7 @@ * common/up_mdelay.c * * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_puts.c b/nuttx/arch/z80/src/common/up_puts.c index 06c38573d..a91d05c0c 100644 --- a/nuttx/arch/z80/src/common/up_puts.c +++ b/nuttx/arch/z80/src/common/up_puts.c @@ -2,7 +2,7 @@ * arch/z80/src/common/up_puts.c * * Copyright (C) 2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_releasepending.c b/nuttx/arch/z80/src/common/up_releasepending.c index 8090cb763..bb5187465 100644 --- a/nuttx/arch/z80/src/common/up_releasepending.c +++ b/nuttx/arch/z80/src/common/up_releasepending.c @@ -2,7 +2,7 @@ * arch/z80/src/common/up_releasepending.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_releasestack.c b/nuttx/arch/z80/src/common/up_releasestack.c index 549879725..d41cc9918 100644 --- a/nuttx/arch/z80/src/common/up_releasestack.c +++ b/nuttx/arch/z80/src/common/up_releasestack.c @@ -2,7 +2,7 @@ * common/up_releasestack.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_reprioritizertr.c b/nuttx/arch/z80/src/common/up_reprioritizertr.c index f52050033..84cd3e1e1 100644 --- a/nuttx/arch/z80/src/common/up_reprioritizertr.c +++ b/nuttx/arch/z80/src/common/up_reprioritizertr.c @@ -2,7 +2,7 @@ * arch/z80/src/common/up_reprioritizertr.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_stackdump.c b/nuttx/arch/z80/src/common/up_stackdump.c index be6c67dd4..817c2d315 100644 --- a/nuttx/arch/z80/src/common/up_stackdump.c +++ b/nuttx/arch/z80/src/common/up_stackdump.c @@ -2,7 +2,7 @@ * common/up_stackdump.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_udelay.c b/nuttx/arch/z80/src/common/up_udelay.c index 06faa9a80..f03357418 100644 --- a/nuttx/arch/z80/src/common/up_udelay.c +++ b/nuttx/arch/z80/src/common/up_udelay.c @@ -2,7 +2,7 @@ * common/up_udelay.c * * Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_unblocktask.c b/nuttx/arch/z80/src/common/up_unblocktask.c index 33d98e864..d99d6d87d 100644 --- a/nuttx/arch/z80/src/common/up_unblocktask.c +++ b/nuttx/arch/z80/src/common/up_unblocktask.c @@ -2,7 +2,7 @@ * arch/z80/src/common/up_unblocktask.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/common/up_usestack.c b/nuttx/arch/z80/src/common/up_usestack.c index 7f22e9ce6..7d348a9c6 100644 --- a/nuttx/arch/z80/src/common/up_usestack.c +++ b/nuttx/arch/z80/src/common/up_usestack.c @@ -2,7 +2,7 @@ * arch/z80/src/common/up_usestack.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/Make.defs b/nuttx/arch/z80/src/ez80/Make.defs index 8999b6a66..fb2b3d48f 100644 --- a/nuttx/arch/z80/src/ez80/Make.defs +++ b/nuttx/arch/z80/src/ez80/Make.defs @@ -2,7 +2,7 @@ # arch/z80/src/ez80/Make.defs # # Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt <spudmonkey@racsa.co.cr> +# Author: Gregory Nutt <gnutt@nuttx.org> # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/chip.h b/nuttx/arch/z80/src/ez80/chip.h index 3402943ae..8bc6d0eef 100644 --- a/nuttx/arch/z80/src/ez80/chip.h +++ b/nuttx/arch/z80/src/ez80/chip.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/chip.h * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_clock.c b/nuttx/arch/z80/src/ez80/ez80_clock.c index 8446e8124..3cbe1f8f4 100644 --- a/nuttx/arch/z80/src/ez80/ez80_clock.c +++ b/nuttx/arch/z80/src/ez80/ez80_clock.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_clock.c * * Copyright (C) 2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_copystate.c b/nuttx/arch/z80/src/ez80/ez80_copystate.c index 976817c6e..c85d2b716 100644 --- a/nuttx/arch/z80/src/ez80/ez80_copystate.c +++ b/nuttx/arch/z80/src/ez80/ez80_copystate.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_copystate.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_i2c.c b/nuttx/arch/z80/src/ez80/ez80_i2c.c index 609ab22bd..dbc817442 100644 --- a/nuttx/arch/z80/src/ez80/ez80_i2c.c +++ b/nuttx/arch/z80/src/ez80/ez80_i2c.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_i2c.c * * Copyright(C) 2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_initialstate.c b/nuttx/arch/z80/src/ez80/ez80_initialstate.c index 5b6e5fb4b..9ff56e7c1 100644 --- a/nuttx/arch/z80/src/ez80/ez80_initialstate.c +++ b/nuttx/arch/z80/src/ez80/ez80_initialstate.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_initialstate.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_io.asm b/nuttx/arch/z80/src/ez80/ez80_io.asm index 9c5d28e7e..32cd5296c 100644 --- a/nuttx/arch/z80/src/ez80/ez80_io.asm +++ b/nuttx/arch/z80/src/ez80/ez80_io.asm @@ -2,7 +2,7 @@ ; arch/z80/src/ze80/ez80_io.c ; ; Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. -; Author: Gregory Nutt <spudmonkey@racsa.co.cr> +; Author: Gregory Nutt <gnutt@nuttx.org> ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_irq.c b/nuttx/arch/z80/src/ez80/ez80_irq.c index d89bff859..604e5c5b3 100644 --- a/nuttx/arch/z80/src/ez80/ez80_irq.c +++ b/nuttx/arch/z80/src/ez80/ez80_irq.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_irq.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_irqsave.asm b/nuttx/arch/z80/src/ez80/ez80_irqsave.asm index c19ef0bdd..0efae6a47 100644 --- a/nuttx/arch/z80/src/ez80/ez80_irqsave.asm +++ b/nuttx/arch/z80/src/ez80/ez80_irqsave.asm @@ -1,88 +1,88 @@ -;**************************************************************************
-; arch/z80/src/ez80/ez80_irqsave.asm
-;
-; Copyright (C) 2008 Gregory Nutt. All rights reserved.
-; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions
-; are met:
-;
-; 1. Redistributions of source code must retain the above copyright
-; notice, this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright
-; notice, this list of conditions and the following disclaimer in
-; the documentation and/or other materials provided with the
-; distribution.
-; 3. Neither the name NuttX nor the names of its contributors may be
-; used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-; POSSIBILITY OF SUCH DAMAGE.
-;
-;**************************************************************************
-
-;**************************************************************************
-; Global Symbols Imported
-;**************************************************************************
-
-;**************************************************************************
-; Global Symbols Expported
-;**************************************************************************
-
- xdef _irqsave
- xdef _irqrestore
-
-;**************************************************************************
-; Code
-;**************************************************************************
-
- segment CODE
- .assume ADL=1
-
-;**************************************************************************
-;* Name: irqstate_t irqsave(void)
-;*
-;* Description:
-;* Disable all interrupts; return previous interrupt state
-;*
-;**************************************************************************
-
-_irqsave:
- ld a, i ; AF = interrupt state
- di ; Interrupts are disabled (does not affect F)
- push af ; Transfer to HL via the stack
- pop hl ;
- ret ; And return
-
-;**************************************************************************
-;* Name: void irqrestore(irqstate_t flags)
-;*
-;* Description:
-;* Restore previous interrupt state
-;*
-;**************************************************************************
-
-_irqrestore:
- di ; Assume disabled
- pop hl ; HL = return address
- pop af ; AF Parity bit holds interrupt state
- jp po, _disabled ; Skip over re-enable if Parity odd
- ei ; Re-enable interrupts
-_disabled:
- push af ; Restore stack
- push hl ;
- ret ; and return
-
- end
+;************************************************************************** +; arch/z80/src/ez80/ez80_irqsave.asm +; +; Copyright (C) 2008 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt <gnutt@nuttx.org> +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + +;************************************************************************** +; Global Symbols Imported +;************************************************************************** + +;************************************************************************** +; Global Symbols Expported +;************************************************************************** + + xdef _irqsave + xdef _irqrestore + +;************************************************************************** +; Code +;************************************************************************** + + segment CODE + .assume ADL=1 + +;************************************************************************** +;* Name: irqstate_t irqsave(void) +;* +;* Description: +;* Disable all interrupts; return previous interrupt state +;* +;************************************************************************** + +_irqsave: + ld a, i ; AF = interrupt state + di ; Interrupts are disabled (does not affect F) + push af ; Transfer to HL via the stack + pop hl ; + ret ; And return + +;************************************************************************** +;* Name: void irqrestore(irqstate_t flags) +;* +;* Description: +;* Restore previous interrupt state +;* +;************************************************************************** + +_irqrestore: + di ; Assume disabled + pop hl ; HL = return address + pop af ; AF Parity bit holds interrupt state + jp po, _disabled ; Skip over re-enable if Parity odd + ei ; Re-enable interrupts +_disabled: + push af ; Restore stack + push hl ; + ret ; and return + + end diff --git a/nuttx/arch/z80/src/ez80/ez80_registerdump.c b/nuttx/arch/z80/src/ez80/ez80_registerdump.c index d1aa3726b..a43bd6459 100644 --- a/nuttx/arch/z80/src/ez80/ez80_registerdump.c +++ b/nuttx/arch/z80/src/ez80/ez80_registerdump.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_registerdump.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_restorecontext.asm b/nuttx/arch/z80/src/ez80/ez80_restorecontext.asm index da1d050f0..c90ce808f 100644 --- a/nuttx/arch/z80/src/ez80/ez80_restorecontext.asm +++ b/nuttx/arch/z80/src/ez80/ez80_restorecontext.asm @@ -1,110 +1,110 @@ -;**************************************************************************
-; arch/z80/src/ez80/ez80_restorcontext.asm
-;
-; Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
-; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions
-; are met:
-;
-; 1. Redistributions of source code must retain the above copyright
-; notice, this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright
-; notice, this list of conditions and the following disclaimer in
-; the documentation and/or other materials provided with the
-; distribution.
-; 3. Neither the name NuttX nor the names of its contributors may be
-; used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-; POSSIBILITY OF SUCH DAMAGE.
-;
-;**************************************************************************
-
-;**************************************************************************
-; Global Symbols Imported
-;**************************************************************************
-
-;**************************************************************************
-; Global Symbols Expported
-;**************************************************************************
-
- xdef _ez80_restorecontext
-
-;**************************************************************************
-; Code
-;**************************************************************************
-
- segment CODE
- .assume ADL=1
-
-;**************************************************************************
-; ez80_restorecontext
-;**************************************************************************
-
-_ez80_restorecontext:
- ; On entry, stack contains return address (not used), then address
- ; of the register save structure
-
- ; Discard the return address, we won't be returning
-
- pop hl
-
- ; Get the address of the beginning of the state save area. Each
- ; pop will increment to the next element of the structure
-
- pop hl ; BC = Address of save structure
- ld sp, hl ; SP points to top of storage area
-
- ; Disable interrupts while we muck with the alternative registers. The
- ; Correct interrupt state will be restore below
-
- di
-
- ; Restore registers. HL points to the beginning of the reg structure to restore
-
- ex af, af' ; Select alternate AF
- pop af ; Offset 0: AF' = I with interrupt state in parity
- ex af, af' ; Restore original AF
- pop bc ; Offset 1: BC
- pop de ; Offset 2: DE
- pop ix ; Offset 3: IX
- pop iy ; Offset 4: IY
- exx ; Use alternate BC/DE/HL
- pop hl ; Offset 5: HL' = Stack pointer after return
- exx ; Restore original BC/DE/HL
- pop hl ; Offset 6: HL
- pop af ; Offset 7: AF
-
- ; Restore the stack pointer
-
- exx ; Use alternate BC/DE/HL
- pop de ; DE' = return address
- ld sp, hl ; Set SP = saved stack pointer value before return
- push de ; Save return address for ret instruction
- exx ; Restore original BC/DE/HL
-
- ; Restore interrupt state
-
- ex af, af' ; Recover interrupt state
- jp po, noinrestore ; Odd parity, IFF2=0, means disabled
- ex af, af' ; Restore AF (before enabling interrupts)
- ei ; yes.. Enable interrupts
- ret ; and return
-noinrestore:
- ex af, af' ; Restore AF
- ret ; Return with interrupts disabled
- end
-
+;************************************************************************** +; arch/z80/src/ez80/ez80_restorcontext.asm +; +; Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt <gnutt@nuttx.org> +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + +;************************************************************************** +; Global Symbols Imported +;************************************************************************** + +;************************************************************************** +; Global Symbols Expported +;************************************************************************** + + xdef _ez80_restorecontext + +;************************************************************************** +; Code +;************************************************************************** + + segment CODE + .assume ADL=1 + +;************************************************************************** +; ez80_restorecontext +;************************************************************************** + +_ez80_restorecontext: + ; On entry, stack contains return address (not used), then address + ; of the register save structure + + ; Discard the return address, we won't be returning + + pop hl + + ; Get the address of the beginning of the state save area. Each + ; pop will increment to the next element of the structure + + pop hl ; BC = Address of save structure + ld sp, hl ; SP points to top of storage area + + ; Disable interrupts while we muck with the alternative registers. The + ; Correct interrupt state will be restore below + + di + + ; Restore registers. HL points to the beginning of the reg structure to restore + + ex af, af' ; Select alternate AF + pop af ; Offset 0: AF' = I with interrupt state in parity + ex af, af' ; Restore original AF + pop bc ; Offset 1: BC + pop de ; Offset 2: DE + pop ix ; Offset 3: IX + pop iy ; Offset 4: IY + exx ; Use alternate BC/DE/HL + pop hl ; Offset 5: HL' = Stack pointer after return + exx ; Restore original BC/DE/HL + pop hl ; Offset 6: HL + pop af ; Offset 7: AF + + ; Restore the stack pointer + + exx ; Use alternate BC/DE/HL + pop de ; DE' = return address + ld sp, hl ; Set SP = saved stack pointer value before return + push de ; Save return address for ret instruction + exx ; Restore original BC/DE/HL + + ; Restore interrupt state + + ex af, af' ; Recover interrupt state + jp po, noinrestore ; Odd parity, IFF2=0, means disabled + ex af, af' ; Restore AF (before enabling interrupts) + ei ; yes.. Enable interrupts + ret ; and return +noinrestore: + ex af, af' ; Restore AF + ret ; Return with interrupts disabled + end + diff --git a/nuttx/arch/z80/src/ez80/ez80_saveusercontext.asm b/nuttx/arch/z80/src/ez80/ez80_saveusercontext.asm index ecd7db114..429dc3dd5 100644 --- a/nuttx/arch/z80/src/ez80/ez80_saveusercontext.asm +++ b/nuttx/arch/z80/src/ez80/ez80_saveusercontext.asm @@ -2,7 +2,7 @@ ; arch/z80/src/ez80/ez80_saveusercontext.asm ; ; Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. -; Author: Gregory Nutt <spudmonkey@racsa.co.cr> +; Author: Gregory Nutt <gnutt@nuttx.org> ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_schedulesigaction.c b/nuttx/arch/z80/src/ez80/ez80_schedulesigaction.c index ce48fe987..04643304d 100644 --- a/nuttx/arch/z80/src/ez80/ez80_schedulesigaction.c +++ b/nuttx/arch/z80/src/ez80/ez80_schedulesigaction.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_schedulesigaction.c * * Copyright (C) 2008-2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c b/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c index 86aaad2d5..2d946aa32 100644 --- a/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c +++ b/nuttx/arch/z80/src/ez80/ez80_sigdeliver.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_sigdeliver.c * * Copyright (C) 2008-2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_spi.c b/nuttx/arch/z80/src/ez80/ez80_spi.c index 0c238f663..14f8e05f3 100755 --- a/nuttx/arch/z80/src/ez80/ez80_spi.c +++ b/nuttx/arch/z80/src/ez80/ez80_spi.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_spi.c * * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_startup.asm b/nuttx/arch/z80/src/ez80/ez80_startup.asm index 2173f80a4..d52795d63 100644 --- a/nuttx/arch/z80/src/ez80/ez80_startup.asm +++ b/nuttx/arch/z80/src/ez80/ez80_startup.asm @@ -1,155 +1,155 @@ -;**************************************************************************
-; arch/z80/src/ez80/ez80_startup.asm
-;
-; Copyright (C) 2008 Gregory Nutt. All rights reserved.
-; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions
-; are met:
-;
-; 1. Redistributions of source code must retain the above copyright
-; notice, this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright
-; notice, this list of conditions and the following disclaimer in
-; the documentation and/or other materials provided with the
-; distribution.
-; 3. Neither the name NuttX nor the names of its contributors may be
-; used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-; POSSIBILITY OF SUCH DAMAGE.
-;
-;**************************************************************************
-
-;**************************************************************************
-; Included Files
-;**************************************************************************
-
-;**************************************************************************
-; Constants
-;**************************************************************************
-
-;**************************************************************************
-; Global symbols used
-;**************************************************************************
-
- xref __stack
- xref _ez80_init
- xref _ez80_initvectors
- xref _ez80_initsysclk
- xref _ez80_lowinit
- xref __low_bss ; Low address of bss segment
- xref __len_bss ; Length of bss segment
-
- xref __low_data ; Address of initialized data section
- xref __low_romdata ; Addr of initialized data section in ROM
- xref __len_data ; Length of initialized data section
-
- xref __copy_code_to_ram
- xref __len_code
- xref __low_code
- xref __low_romcode
- xref _os_start
- xdef _ez80_startup
- xdef _ez80_halt
-
-;**************************************************************************
-; Code
-;**************************************************************************
-
- segment CODE
- .assume ADL=1
-
-;**************************************************************************
-; System reset start logic
-;**************************************************************************
-
-_ez80_startup:
- ; Set up the stack pointer at the location determined the lincmd
- ; file
-
- ld sp, __stack
-
- ; Peform chip-specific initialization
-
- call _ez80_init
-
- ; initialize the interrupt vector table
-
- call _ez80_initvectors
-
- ; Initialize the system clock
-
- call _ez80_initsysclk
-
- ; Perform C initializations
- ; Clear the uninitialized data section
-
- ld bc, __len_bss ; Check for non-zero length
- ld a, __len_bss >> 16
- or a, c
- or a, b
- jr z, _ez80_bssdone ; BSS is zero-length ...
- xor a, a
- ld (__low_bss), a
- sbc hl, hl ; hl = 0
- dec bc ; 1st byte's taken care of
- sbc hl, bc
- jr z, _ez80_bssdone ; Just 1 byte ...
- ld hl, __low_bss ; reset hl
- ld de, __low_bss + 1 ; [de] = bss + 1
- ldir
-_ez80_bssdone:
-
- ; Copy the initialized data section
- ld bc, __len_data ; [bc] = data length
- ld a, __len_data >> 16 ; Check for non-zero length
- or a, c
- or a, b
- jr z, _ez80_datadone ; __len_data is zero-length ...
- ld hl, __low_romdata ; [hl] = data_copy
- ld de, __low_data ; [de] = data
- ldir ; Copy the data section
-_ez80_datadone:
-
- ; Copy CODE (which may be in FLASH) to RAM if the
- ; copy_code_to_ram symbol is set in the link control file
- ld a, __copy_code_to_ram
- or a, a
- jr z, _ez80_codedone
- ld bc, __len_code ; [bc] = code length
- ld a, __len_code >> 16 ; Check for non-zero length
- or a, c
- or a, b
- jr z, _ez80_codedone ; __len_code is zero-length
- ld hl, __low_romcode ; [hl] = code_copy
- ld de, __low_code ; [de] = code
- ldir ; Copy the code section
-_ez80_codedone:
-
- ; Perform board-specific intialization
-
- call _ez80_lowinit
-
- ; Then start NuttX
-
- call _os_start ; jump to the OS entry point
-
- ; NuttX will never return, but just in case...
-
-_ez80_halt:
- halt ; We should never get here
- jp _ez80_halt
-
+;************************************************************************** +; arch/z80/src/ez80/ez80_startup.asm +; +; Copyright (C) 2008 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt <gnutt@nuttx.org> +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + +;************************************************************************** +; Included Files +;************************************************************************** + +;************************************************************************** +; Constants +;************************************************************************** + +;************************************************************************** +; Global symbols used +;************************************************************************** + + xref __stack + xref _ez80_init + xref _ez80_initvectors + xref _ez80_initsysclk + xref _ez80_lowinit + xref __low_bss ; Low address of bss segment + xref __len_bss ; Length of bss segment + + xref __low_data ; Address of initialized data section + xref __low_romdata ; Addr of initialized data section in ROM + xref __len_data ; Length of initialized data section + + xref __copy_code_to_ram + xref __len_code + xref __low_code + xref __low_romcode + xref _os_start + xdef _ez80_startup + xdef _ez80_halt + +;************************************************************************** +; Code +;************************************************************************** + + segment CODE + .assume ADL=1 + +;************************************************************************** +; System reset start logic +;************************************************************************** + +_ez80_startup: + ; Set up the stack pointer at the location determined the lincmd + ; file + + ld sp, __stack + + ; Peform chip-specific initialization + + call _ez80_init + + ; initialize the interrupt vector table + + call _ez80_initvectors + + ; Initialize the system clock + + call _ez80_initsysclk + + ; Perform C initializations + ; Clear the uninitialized data section + + ld bc, __len_bss ; Check for non-zero length + ld a, __len_bss >> 16 + or a, c + or a, b + jr z, _ez80_bssdone ; BSS is zero-length ... + xor a, a + ld (__low_bss), a + sbc hl, hl ; hl = 0 + dec bc ; 1st byte's taken care of + sbc hl, bc + jr z, _ez80_bssdone ; Just 1 byte ... + ld hl, __low_bss ; reset hl + ld de, __low_bss + 1 ; [de] = bss + 1 + ldir +_ez80_bssdone: + + ; Copy the initialized data section + ld bc, __len_data ; [bc] = data length + ld a, __len_data >> 16 ; Check for non-zero length + or a, c + or a, b + jr z, _ez80_datadone ; __len_data is zero-length ... + ld hl, __low_romdata ; [hl] = data_copy + ld de, __low_data ; [de] = data + ldir ; Copy the data section +_ez80_datadone: + + ; Copy CODE (which may be in FLASH) to RAM if the + ; copy_code_to_ram symbol is set in the link control file + ld a, __copy_code_to_ram + or a, a + jr z, _ez80_codedone + ld bc, __len_code ; [bc] = code length + ld a, __len_code >> 16 ; Check for non-zero length + or a, c + or a, b + jr z, _ez80_codedone ; __len_code is zero-length + ld hl, __low_romcode ; [hl] = code_copy + ld de, __low_code ; [de] = code + ldir ; Copy the code section +_ez80_codedone: + + ; Perform board-specific intialization + + call _ez80_lowinit + + ; Then start NuttX + + call _os_start ; jump to the OS entry point + + ; NuttX will never return, but just in case... + +_ez80_halt: + halt ; We should never get here + jp _ez80_halt + diff --git a/nuttx/arch/z80/src/ez80/ez80_timerisr.c b/nuttx/arch/z80/src/ez80/ez80_timerisr.c index a251b57e7..d29237e54 100644 --- a/nuttx/arch/z80/src/ez80/ez80_timerisr.c +++ b/nuttx/arch/z80/src/ez80/ez80_timerisr.c @@ -2,7 +2,7 @@ * arch/z80/src/ez80/ez80_timerisr.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80_vectors.asm b/nuttx/arch/z80/src/ez80/ez80_vectors.asm index 3e3d44ced..eaec4b36f 100644 --- a/nuttx/arch/z80/src/ez80/ez80_vectors.asm +++ b/nuttx/arch/z80/src/ez80/ez80_vectors.asm @@ -1,340 +1,340 @@ -;**************************************************************************
-; arch/z80/src/ez80/ez80_vectors.asm
-;
-; Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
-; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions
-; are met:
-;
-; 1. Redistributions of source code must retain the above copyright
-; notice, this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright
-; notice, this list of conditions and the following disclaimer in
-; the documentation and/or other materials provided with the
-; distribution.
-; 3. Neither the name NuttX nor the names of its contributors may be
-; used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-; POSSIBILITY OF SUCH DAMAGE.
-;
-;**************************************************************************
-
-;**************************************************************************
-; Constants
-;**************************************************************************
-
-NVECTORS EQU 64 ; max possible interrupt vectors
-
-;* Bits in the Z80 FLAGS register *****************************************
-
-EZ80_C_FLAG EQU 01h ; Bit 0: Carry flag
-EZ80_N_FLAG EQU 02h ; Bit 1: Add/Subtract flag
-EZ80_PV_FLAG EQU 04h ; Bit 2: Parity/Overflow flag
-EZ80_H_FLAG EQU 10h ; Bit 4: Half carry flag
-EZ80_Z_FLAG EQU 40h ; Bit 5: Zero flag
-EZ80_S_FLAG EQU 80h ; Bit 7: Sign flag
-
-;* The IRQ number to use for unused vectors
-
-EZ80_UNUSED EQU 40h
-
-;**************************************************************************
-; Global Symbols Imported
-;**************************************************************************
-
- xref _ez80_startup
- xref _up_doirq
-
-;**************************************************************************
-; Global Symbols Exported
-;**************************************************************************
-
- xdef _ez80_reset
- xdef _ez80_initvectors
- xdef _ez80_handlers
- xdef _ez80_rstcommon
- xdef _ez80_initvectors
- xdef _ez80_vectable
-
-;**************************************************************************
-; Macros
-;**************************************************************************
-
-; Define one reset handler
-; 1. Disable interrupts
-; 2. Dlear mixed memory mode (MADL) flag
-; 3. jump to initialization procedure with jp.lil to set ADL
-rstvector: macro
- di
- rsmix
- jp.lil _ez80_startup
- endmac rstvector
-
-; Define one interrupt handler
-irqhandler: macro vectno
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #vectno ; A = vector number
- jp _ez80_rstcommon ; Remaining RST handling is common
- endmac irqhandler
-
-;**************************************************************************
-; Reset entry points
-;**************************************************************************
-
- define .RESET, space = ROM
- segment .RESET
-
-_ez80_reset:
-_rst0:
- rstvector
-_rst8:
- rstvector
-_rst10:
- rstvector
-_rst18:
- rstvector
-_rst20:
- rstvector
-_rst28:
- rstvector
-_rst30:
- rstvector
-_rst38:
- rstvector
- ds %26
-_nmi:
- retn
-
-;**************************************************************************
-; Startup logic
-;**************************************************************************
-
- define .STARTUP, space = ROM
- segment .STARTUP
- .assume ADL=1
-
-;**************************************************************************
-; Interrupt Vector Handling
-;**************************************************************************
-
- ; Symbol Val VecNo Addr
- ;----------------- --- ----- -----
-_ez80_handlers:
- irqhandler 0 ; EZ80_EMACRX_IRQ 0 0 0x040
- handlersize equ $-_ez80handlers
- irqhandler 1 ; EZ80_EMACTX_IRQ 1 1 0x044
- irqhandler 2 ; EZ80_EMACSYS_IRQ 2 2 0x048
- irqhandler 3 ; EZ80_PLL_IRQ 3 3 0x04c
- irqhandler 4 ; EZ80_FLASH_IRQ 4 4 0x050
- irqhandler 5 ; EZ80_TIMER0_IRQ 5 5 0x054
- irqhandler 6 ; EZ80_TIMER1_IRQ 6 6 0x058
- irqhandler 7 ; EZ80_TIMER2_IRQ 7 7 0x05c
- irqhandler 8 ; EZ80_TIMER3_IRQ 8 8 0x060
- irqhandler EZ80_UNUSED ; 9 0x064
- irqhandler EZ80_UNUSED+1 ; 10 0x068
- irqhandler 9 ; EZ80_RTC_IRQ 9 11 0x06C
- irqhandler 10 ; EZ80_UART0_IRQ 10 12 0x070
- irqhandler 11 ; EZ80_UART1_IRQ 11 13 0x074
- irqhandler 12 ; EZ80_I2C_IRQ 12 14 0x078
- irqhandler 13 ; EZ80_SPI_IRQ 13 15 0x07c
- irqhandler 14 ; EZ80_PORTA0_IRQ 14 16 0x080
- irqhandler 15 ; EZ80_PORTA1_IRQ 15 17 0x084
- irqhandler 16 ; EZ80_PORTA2_IRQ 16 18 0x088
- irqhandler 17 ; EZ80_PORTA3_IRQ 17 19 0x08c
- irqhandler 18 ; EZ80_PORTA4_IRQ 18 20 0x090
- irqhandler 19 ; EZ80_PORTA5_IRQ 19 21 0x094
- irqhandler 20 ; EZ80_PORTA6_IRQ 20 22 0x098
- irqhandler 21 ; EZ80_PORTA7_IRQ 21 23 0x09c
- irqhandler 22 ; EZ80_PORTB0_IRQ 22 24 0x0a0
- irqhandler 23 ; EZ80_PORTB1_IRQ 23 25 0x0a4
- irqhandler 24 ; EZ80_PORTB2_IRQ 24 26 0x0a8
- irqhandler 25 ; EZ80_PORTB3_IRQ 25 27 0x0ac
- irqhandler 26 ; EZ80_PORTB4_IRQ 26 28 0x0b0
- irqhandler 27 ; EZ80_PORTB5_IRQ 27 29 0x0b4
- irqhandler 28 ; EZ80_PORTB6_IRQ 28 20 0x0b8
- irqhandler 29 ; EZ80_PORTB7_IRQ 29 21 0x0bc
- irqhandler 30 ; EZ80_PORTC0_IRQ 30 22 0x0c0
- irqhandler 31 ; EZ80_PORTC1_IRQ 31 23 0x0c4
- irqhandler 32 ; EZ80_PORTC2_IRQ 32 24 0x0c8
- irqhandler 33 ; EZ80_PORTC3_IRQ 33 25 0x0cc
- irqhandler 34 ; EZ80_PORTC4_IRQ 34 26 0x0d0
- irqhandler 35 ; EZ80_PORTC5_IRQ 35 27 0x0d4
- irqhandler 36 ; EZ80_PORTC6_IRQ 36 28 0x0d8
- irqhandler 37 ; EZ80_PORTC7_IRQ 37 29 0x0dc
- irqhandler 38 ; EZ80_PORTD0_IRQ 38 40 0x0e0
- irqhandler 39 ; EZ80_PORTD1_IRQ 39 41 0x0e4
- irqhandler 40 ; EZ80_PORTD2_IRQ 40 42 0x0e8
- irqhandler 41 ; EZ80_PORTD3_IRQ 41 43 0x0ec
- irqhandler 42 ; EZ80_PORTD4_IRQ 42 44 0x0f0
- irqhandler 43 ; EZ80_PORTD5_IRQ 43 45 0x0f4
- irqhandler 44 ; EZ80_PORTD6_IRQ 44 46 0x0f8
- irqhandler 45 ; EZ80_PORTD7_IRQ 45 47 0x0fc
- irqhandler EZ80_UNUSED+1 ; 48 0x100
- irqhandler EZ80_UNUSED+2 ; 49 0x104
- irqhandler EZ80_UNUSED+3 ; 50 0x108
- irqhandler EZ80_UNUSED+4 ; 51 0x10c
- irqhandler EZ80_UNUSED+5 ; 52 0x110
- irqhandler EZ80_UNUSED+6 ; 53 0x114
- irqhandler EZ80_UNUSED+7 ; 54 0x118
- irqhandler EZ80_UNUSED+8 ; 55 0x11c
- irqhandler EZ80_UNUSED+9 ; 56 0x120
- irqhandler EZ80_UNUSED+10 ; 57 0x124
- irqhandler EZ80_UNUSED+11 ; 58 0x128
- irqhandler EZ80_UNUSED+12 ; 59 0x12c
- irqhandler EZ80_UNUSED+13 ; 60 0x130
- irqhandler EZ80_UNUSED+14 ; 61 0x134
- irqhandler EZ80_UNUSED+15 ; 62 0x138
- irqhandler EZ80_UNUSED+16 ; 63 0x13c
-
-;**************************************************************************
-; Common Interrupt handler
-;**************************************************************************
-
-_ez80_rstcommon:
- ; Create a register frame. SP points to top of frame + 4, pushes
- ; decrement the stack pointer. Already have
- ;
- ; Offset 8: Return PC is already on the stack
- ; Offset 7: AF (retaining flags)
- ;
- ; IRQ number is in A
-
- push hl ; Offset 6: HL
- ld hl, #(3*3) ; HL is the value of the stack pointer before
- add hl, sp ; the interrupt occurred (3 for PC, AF, HL)
- push hl ; Offset 5: Stack pointer
- push iy ; Offset 4: IY
- push ix ; Offset 3: IX
- push de ; Offset 2: DE
- push bc ; Offset 1: BC
-
- ; At this point, we know that interrupts were enabled (or we wouldn't be here
- ; so we can save a fake indicationn that will cause interrupts to restored when
- ; this context is restored
-
- ld bc, #EZ80_PV_FLAG ; Parity bit. 1=parity odd, IEF2=1
- push bc ; Offset 0: I with interrupt state in parity
- di ; (not necessary)
-
- ; Call the interrupt decode logic. SP points to the beggining of the reg structure
-
- ld hl, #0 ; Argument #2 is the beginning of the reg structure
- add hl, sp ;
- push hl ; Place argument #2 at the top of stack
- ld bc, #0 ; BC = reset number
- ld c, a ; Save the reset number in C
- push bc ; Argument #1 is the Reset number
- call _up_doirq ; Decode the IRQ
-
- ; On return, HL points to the beginning of the reg structure to restore
- ; Note that (1) the arguments pushed on the stack are not popped, and (2) the
- ; original stack pointer is lost. In the normal case (no context switch),
- ; HL will contain the value of the SP before the arguments were pushed.
-
- ld sp, hl ; Use the new stack pointer
-
- ; Restore registers. HL points to the beginning of the reg structure to restore
-
- ex af, af' ; Select alternate AF
- pop af ; Offset 0: AF' = I with interrupt state in parity
- ex af, af' ; Restore original AF
- pop bc ; Offset 1: BC
- pop de ; Offset 2: DE
- pop ix ; Offset 3: IX
- pop iy ; Offset 4: IY
- exx ; Use alternate BC/DE/HL
- pop hl ; Offset 5: HL' = Stack pointer after return
- exx ; Restore original BC/DE/HL
- pop hl ; Offset 6: HL
- pop af ; Offset 7: AF
-
- ; Restore the stack pointer
-
- exx ; Use alternate BC/DE/HL
- pop de ; Offset 8: Return address
- ld sp, hl ; Set SP = saved stack pointer value before return
- push de ; Set up for reti
- exx ; Restore original BC/DE/HL
-
- ; Restore interrupt state
-
- ex af, af' ; Recover interrupt state
- jp po, nointenable ; Odd parity, IFF2=0, means disabled
- ex af, af' ; Restore AF (before enabling interrupts)
- ei ; yes
- reti
-nointenable:
- ex af, af' ; Restore AF
- reti
-
-;**************************************************************************
-; Vector Setup Logic
-;**************************************************************************
-
-_ez80_initvectors:
- ; Initialize the vector table
-
- ld iy, _ez80_vectable
- ld ix, 4
- ld bc, 4
- ld b, NVECTORS
- xor a, a ; Clear carry
- ld hl, handlersize
- ld de, _ez80_handlers
- sbc hl, de ; Length of irq handler in hl
- ld d, h
- ld e, l
- ld hl, _ez80_handlers ; Start of handlers in hl
-
- ld a, 0
-$1:
- ld (iy), hl ; Store IRQ handler
- ld (iy+3), a ; Pad to 4 bytes
- add hl, de ; Point to next handler
- push de
- ld de, 4
- add iy, de ; Point to next entry in vector table
- pop de
- djnz $1 ; Loop until all vectors have been written
-
- ; Select interrupt mode 2
-
- im 2 ; Interrupt mode 2
-
- ; Write the address of the vector table into the interrupt vector base
-
- ld hl, _ez80_vectable >> 8
- ld i, hl
- ret
-
-;**************************************************************************
-; Vector Table
-;**************************************************************************
-; This segment must be aligned on a 512 byte boundary anywhere in RAM
-; Each entry will be a 3-byte address in a 4-byte space
-
- define .IVECTS, space = RAM, align = 200h
- segment .IVECTS
-
- ; The first 64 bytes are not used... the vectors actually start at +0x40
-_ez80_vecreserve:
- ds 64
-_ez80_vectable:
- ds NVECTORS * 4
+;************************************************************************** +; arch/z80/src/ez80/ez80_vectors.asm +; +; Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt <gnutt@nuttx.org> +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + +;************************************************************************** +; Constants +;************************************************************************** + +NVECTORS EQU 64 ; max possible interrupt vectors + +;* Bits in the Z80 FLAGS register ***************************************** + +EZ80_C_FLAG EQU 01h ; Bit 0: Carry flag +EZ80_N_FLAG EQU 02h ; Bit 1: Add/Subtract flag +EZ80_PV_FLAG EQU 04h ; Bit 2: Parity/Overflow flag +EZ80_H_FLAG EQU 10h ; Bit 4: Half carry flag +EZ80_Z_FLAG EQU 40h ; Bit 5: Zero flag +EZ80_S_FLAG EQU 80h ; Bit 7: Sign flag + +;* The IRQ number to use for unused vectors + +EZ80_UNUSED EQU 40h + +;************************************************************************** +; Global Symbols Imported +;************************************************************************** + + xref _ez80_startup + xref _up_doirq + +;************************************************************************** +; Global Symbols Exported +;************************************************************************** + + xdef _ez80_reset + xdef _ez80_initvectors + xdef _ez80_handlers + xdef _ez80_rstcommon + xdef _ez80_initvectors + xdef _ez80_vectable + +;************************************************************************** +; Macros +;************************************************************************** + +; Define one reset handler +; 1. Disable interrupts +; 2. Dlear mixed memory mode (MADL) flag +; 3. jump to initialization procedure with jp.lil to set ADL +rstvector: macro + di + rsmix + jp.lil _ez80_startup + endmac rstvector + +; Define one interrupt handler +irqhandler: macro vectno + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #vectno ; A = vector number + jp _ez80_rstcommon ; Remaining RST handling is common + endmac irqhandler + +;************************************************************************** +; Reset entry points +;************************************************************************** + + define .RESET, space = ROM + segment .RESET + +_ez80_reset: +_rst0: + rstvector +_rst8: + rstvector +_rst10: + rstvector +_rst18: + rstvector +_rst20: + rstvector +_rst28: + rstvector +_rst30: + rstvector +_rst38: + rstvector + ds %26 +_nmi: + retn + +;************************************************************************** +; Startup logic +;************************************************************************** + + define .STARTUP, space = ROM + segment .STARTUP + .assume ADL=1 + +;************************************************************************** +; Interrupt Vector Handling +;************************************************************************** + + ; Symbol Val VecNo Addr + ;----------------- --- ----- ----- +_ez80_handlers: + irqhandler 0 ; EZ80_EMACRX_IRQ 0 0 0x040 + handlersize equ $-_ez80handlers + irqhandler 1 ; EZ80_EMACTX_IRQ 1 1 0x044 + irqhandler 2 ; EZ80_EMACSYS_IRQ 2 2 0x048 + irqhandler 3 ; EZ80_PLL_IRQ 3 3 0x04c + irqhandler 4 ; EZ80_FLASH_IRQ 4 4 0x050 + irqhandler 5 ; EZ80_TIMER0_IRQ 5 5 0x054 + irqhandler 6 ; EZ80_TIMER1_IRQ 6 6 0x058 + irqhandler 7 ; EZ80_TIMER2_IRQ 7 7 0x05c + irqhandler 8 ; EZ80_TIMER3_IRQ 8 8 0x060 + irqhandler EZ80_UNUSED ; 9 0x064 + irqhandler EZ80_UNUSED+1 ; 10 0x068 + irqhandler 9 ; EZ80_RTC_IRQ 9 11 0x06C + irqhandler 10 ; EZ80_UART0_IRQ 10 12 0x070 + irqhandler 11 ; EZ80_UART1_IRQ 11 13 0x074 + irqhandler 12 ; EZ80_I2C_IRQ 12 14 0x078 + irqhandler 13 ; EZ80_SPI_IRQ 13 15 0x07c + irqhandler 14 ; EZ80_PORTA0_IRQ 14 16 0x080 + irqhandler 15 ; EZ80_PORTA1_IRQ 15 17 0x084 + irqhandler 16 ; EZ80_PORTA2_IRQ 16 18 0x088 + irqhandler 17 ; EZ80_PORTA3_IRQ 17 19 0x08c + irqhandler 18 ; EZ80_PORTA4_IRQ 18 20 0x090 + irqhandler 19 ; EZ80_PORTA5_IRQ 19 21 0x094 + irqhandler 20 ; EZ80_PORTA6_IRQ 20 22 0x098 + irqhandler 21 ; EZ80_PORTA7_IRQ 21 23 0x09c + irqhandler 22 ; EZ80_PORTB0_IRQ 22 24 0x0a0 + irqhandler 23 ; EZ80_PORTB1_IRQ 23 25 0x0a4 + irqhandler 24 ; EZ80_PORTB2_IRQ 24 26 0x0a8 + irqhandler 25 ; EZ80_PORTB3_IRQ 25 27 0x0ac + irqhandler 26 ; EZ80_PORTB4_IRQ 26 28 0x0b0 + irqhandler 27 ; EZ80_PORTB5_IRQ 27 29 0x0b4 + irqhandler 28 ; EZ80_PORTB6_IRQ 28 20 0x0b8 + irqhandler 29 ; EZ80_PORTB7_IRQ 29 21 0x0bc + irqhandler 30 ; EZ80_PORTC0_IRQ 30 22 0x0c0 + irqhandler 31 ; EZ80_PORTC1_IRQ 31 23 0x0c4 + irqhandler 32 ; EZ80_PORTC2_IRQ 32 24 0x0c8 + irqhandler 33 ; EZ80_PORTC3_IRQ 33 25 0x0cc + irqhandler 34 ; EZ80_PORTC4_IRQ 34 26 0x0d0 + irqhandler 35 ; EZ80_PORTC5_IRQ 35 27 0x0d4 + irqhandler 36 ; EZ80_PORTC6_IRQ 36 28 0x0d8 + irqhandler 37 ; EZ80_PORTC7_IRQ 37 29 0x0dc + irqhandler 38 ; EZ80_PORTD0_IRQ 38 40 0x0e0 + irqhandler 39 ; EZ80_PORTD1_IRQ 39 41 0x0e4 + irqhandler 40 ; EZ80_PORTD2_IRQ 40 42 0x0e8 + irqhandler 41 ; EZ80_PORTD3_IRQ 41 43 0x0ec + irqhandler 42 ; EZ80_PORTD4_IRQ 42 44 0x0f0 + irqhandler 43 ; EZ80_PORTD5_IRQ 43 45 0x0f4 + irqhandler 44 ; EZ80_PORTD6_IRQ 44 46 0x0f8 + irqhandler 45 ; EZ80_PORTD7_IRQ 45 47 0x0fc + irqhandler EZ80_UNUSED+1 ; 48 0x100 + irqhandler EZ80_UNUSED+2 ; 49 0x104 + irqhandler EZ80_UNUSED+3 ; 50 0x108 + irqhandler EZ80_UNUSED+4 ; 51 0x10c + irqhandler EZ80_UNUSED+5 ; 52 0x110 + irqhandler EZ80_UNUSED+6 ; 53 0x114 + irqhandler EZ80_UNUSED+7 ; 54 0x118 + irqhandler EZ80_UNUSED+8 ; 55 0x11c + irqhandler EZ80_UNUSED+9 ; 56 0x120 + irqhandler EZ80_UNUSED+10 ; 57 0x124 + irqhandler EZ80_UNUSED+11 ; 58 0x128 + irqhandler EZ80_UNUSED+12 ; 59 0x12c + irqhandler EZ80_UNUSED+13 ; 60 0x130 + irqhandler EZ80_UNUSED+14 ; 61 0x134 + irqhandler EZ80_UNUSED+15 ; 62 0x138 + irqhandler EZ80_UNUSED+16 ; 63 0x13c + +;************************************************************************** +; Common Interrupt handler +;************************************************************************** + +_ez80_rstcommon: + ; Create a register frame. SP points to top of frame + 4, pushes + ; decrement the stack pointer. Already have + ; + ; Offset 8: Return PC is already on the stack + ; Offset 7: AF (retaining flags) + ; + ; IRQ number is in A + + push hl ; Offset 6: HL + ld hl, #(3*3) ; HL is the value of the stack pointer before + add hl, sp ; the interrupt occurred (3 for PC, AF, HL) + push hl ; Offset 5: Stack pointer + push iy ; Offset 4: IY + push ix ; Offset 3: IX + push de ; Offset 2: DE + push bc ; Offset 1: BC + + ; At this point, we know that interrupts were enabled (or we wouldn't be here + ; so we can save a fake indicationn that will cause interrupts to restored when + ; this context is restored + + ld bc, #EZ80_PV_FLAG ; Parity bit. 1=parity odd, IEF2=1 + push bc ; Offset 0: I with interrupt state in parity + di ; (not necessary) + + ; Call the interrupt decode logic. SP points to the beggining of the reg structure + + ld hl, #0 ; Argument #2 is the beginning of the reg structure + add hl, sp ; + push hl ; Place argument #2 at the top of stack + ld bc, #0 ; BC = reset number + ld c, a ; Save the reset number in C + push bc ; Argument #1 is the Reset number + call _up_doirq ; Decode the IRQ + + ; On return, HL points to the beginning of the reg structure to restore + ; Note that (1) the arguments pushed on the stack are not popped, and (2) the + ; original stack pointer is lost. In the normal case (no context switch), + ; HL will contain the value of the SP before the arguments were pushed. + + ld sp, hl ; Use the new stack pointer + + ; Restore registers. HL points to the beginning of the reg structure to restore + + ex af, af' ; Select alternate AF + pop af ; Offset 0: AF' = I with interrupt state in parity + ex af, af' ; Restore original AF + pop bc ; Offset 1: BC + pop de ; Offset 2: DE + pop ix ; Offset 3: IX + pop iy ; Offset 4: IY + exx ; Use alternate BC/DE/HL + pop hl ; Offset 5: HL' = Stack pointer after return + exx ; Restore original BC/DE/HL + pop hl ; Offset 6: HL + pop af ; Offset 7: AF + + ; Restore the stack pointer + + exx ; Use alternate BC/DE/HL + pop de ; Offset 8: Return address + ld sp, hl ; Set SP = saved stack pointer value before return + push de ; Set up for reti + exx ; Restore original BC/DE/HL + + ; Restore interrupt state + + ex af, af' ; Recover interrupt state + jp po, nointenable ; Odd parity, IFF2=0, means disabled + ex af, af' ; Restore AF (before enabling interrupts) + ei ; yes + reti +nointenable: + ex af, af' ; Restore AF + reti + +;************************************************************************** +; Vector Setup Logic +;************************************************************************** + +_ez80_initvectors: + ; Initialize the vector table + + ld iy, _ez80_vectable + ld ix, 4 + ld bc, 4 + ld b, NVECTORS + xor a, a ; Clear carry + ld hl, handlersize + ld de, _ez80_handlers + sbc hl, de ; Length of irq handler in hl + ld d, h + ld e, l + ld hl, _ez80_handlers ; Start of handlers in hl + + ld a, 0 +$1: + ld (iy), hl ; Store IRQ handler + ld (iy+3), a ; Pad to 4 bytes + add hl, de ; Point to next handler + push de + ld de, 4 + add iy, de ; Point to next entry in vector table + pop de + djnz $1 ; Loop until all vectors have been written + + ; Select interrupt mode 2 + + im 2 ; Interrupt mode 2 + + ; Write the address of the vector table into the interrupt vector base + + ld hl, _ez80_vectable >> 8 + ld i, hl + ret + +;************************************************************************** +; Vector Table +;************************************************************************** +; This segment must be aligned on a 512 byte boundary anywhere in RAM +; Each entry will be a 3-byte address in a 4-byte space + + define .IVECTS, space = RAM, align = 200h + segment .IVECTS + + ; The first 64 bytes are not used... the vectors actually start at +0x40 +_ez80_vecreserve: + ds 64 +_ez80_vectable: + ds NVECTORS * 4 diff --git a/nuttx/arch/z80/src/ez80/ez80f91.h b/nuttx/arch/z80/src/ez80/ez80f91.h index ec15d8f25..490c7f923 100644 --- a/nuttx/arch/z80/src/ez80/ez80f91.h +++ b/nuttx/arch/z80/src/ez80/ez80f91.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/ez80f91.h * * Copyright (C) 2008, 2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80f91_emac.h b/nuttx/arch/z80/src/ez80/ez80f91_emac.h index 61f2e7f5a..ddd8299a0 100644 --- a/nuttx/arch/z80/src/ez80/ez80f91_emac.h +++ b/nuttx/arch/z80/src/ez80/ez80f91_emac.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/ez80f91_emac.h * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80f91_i2c.h b/nuttx/arch/z80/src/ez80/ez80f91_i2c.h index 20ffb513a..f0d6cda4d 100644 --- a/nuttx/arch/z80/src/ez80/ez80f91_i2c.h +++ b/nuttx/arch/z80/src/ez80/ez80f91_i2c.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/ez80f91_i2c.h * * Copyright (C) 2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/ez80f91_init.asm b/nuttx/arch/z80/src/ez80/ez80f91_init.asm index 422c14f2d..17ef5f295 100644 --- a/nuttx/arch/z80/src/ez80/ez80f91_init.asm +++ b/nuttx/arch/z80/src/ez80/ez80f91_init.asm @@ -1,257 +1,257 @@ -;**************************************************************************
-; arch/z80/src/ez80/ez80f91_init.asm
-;
-; Copyright (C) 2008 Gregory Nutt. All rights reserved.
-; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions
-; are met:
-;
-; 1. Redistributions of source code must retain the above copyright
-; notice, this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright
-; notice, this list of conditions and the following disclaimer in
-; the documentation and/or other materials provided with the
-; distribution.
-; 3. Neither the name NuttX nor the names of its contributors may be
-; used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-; POSSIBILITY OF SUCH DAMAGE.
-;
-;**************************************************************************
-
-;**************************************************************************
-; Included Files
-;**************************************************************************
-
- include "ez80f91.inc"
-
-;**************************************************************************
-; Constants
-;**************************************************************************
-
-;PLL_DIV_L EQU %5C
-;PLL_DIV_H EQU %5D
-;PLL_CTL0 EQU %5E
-;PLL_CTL1 EQU %5F
-
-OSC EQU 0
-PLL EQU 1
-RTC EQU 2
-
-CLK_MUX_OSC EQU %00
-CLK_MUX_PLL EQU %01
-CLK_MUX_RTC EQU %02
-
-CHRP_CTL_0 EQU %00
-CHRP_CTL_1 EQU %40
-CHRP_CTL_2 EQU %80
-CHRP_CTL_3 EQU %C0
-
-LDS_CTL_0 EQU %00
-LDS_CTL_1 EQU %04
-LDS_CTL_2 EQU %08
-LDS_CTL_3 EQU %0C
-
-LCK_STATUS EQU %20
-INT_LOCK EQU %10
-INT_UNLOCK EQU %08
-INT_LOCK_EN EQU %04
-INT_UNLOCK_EN EQU %02
-PLL_ENABLE EQU %01
-
-;**************************************************************************
-; Global symbols used
-;**************************************************************************
-
-; Exported symbols
- xdef _ez80_init
- xdef _ez80_initsysclk
-
-; Imported symbols
- xref __CS0_LBR_INIT_PARAM
- xref __CS0_UBR_INIT_PARAM
- xref __CS0_CTL_INIT_PARAM
- xref __CS1_LBR_INIT_PARAM
- xref __CS1_UBR_INIT_PARAM
- xref __CS1_CTL_INIT_PARAM
- xref __CS2_LBR_INIT_PARAM
- xref __CS2_UBR_INIT_PARAM
- xref __CS2_CTL_INIT_PARAM
- xref __CS3_LBR_INIT_PARAM
- xref __CS3_UBR_INIT_PARAM
- xref __CS3_CTL_INIT_PARAM
- xref __CS0_BMC_INIT_PARAM
- xref __CS1_BMC_INIT_PARAM
- xref __CS2_BMC_INIT_PARAM
- xref __CS3_BMC_INIT_PARAM
- xref __FLASH_CTL_INIT_PARAM
- xref __FLASH_ADDR_U_INIT_PARAM
- xref __RAM_CTL_INIT_PARAM
- xref __RAM_ADDR_U_INIT_PARAM
- xref _SYS_CLK_SRC
- xref _SYS_CLK_FREQ
- xref _OSC_FREQ
- xref _OSC_FREQ_MULT
- xref __PLL_CTL0_INIT_PARAM
-
-;**************************************************************************
-; Chip-specific initialization logic
-;**************************************************************************
-; Minimum default initialization for eZ80F91
-
- define .STARTUP, space = ROM
- segment .STARTUP
- .assume ADL = 1
-
-_ez80_init:
- ; Disable internal peripheral interrupt sources
-
- ld a, %ff
- out0 (PA_DDR), a ; GPIO
- out0 (PB_DDR), a
- out0 (PC_DDR), a
- out0 (PD_DDR), a
- ld a, %00
- out0 (PA_ALT1), a
- out0 (PB_ALT1), a
- out0 (PC_ALT1), a
- out0 (PD_ALT1), a
- out0 (PA_ALT2), a
- out0 (PB_ALT2), a
- out0 (PC_ALT2), a
- out0 (PD_ALT2), a
- out0 (PLL_CTL1), a ; PLL
- out0 (TMR0_IER), a ; timers
- out0 (TMR1_IER), a
- out0 (TMR2_IER), a
- out0 (TMR3_IER), a
- out0 (UART0_IER), a ; UARTs
- out0 (UART1_IER), a
- out0 (I2C_CTL), a ; I2C
- out0 (EMAC_IEN), a ; EMAC
- out0 (FLASH_IRQ), a ; Flash
- ld a, %04
- out0 (SPI_CTL), a ; SPI
- in0 a, (RTC_CTRL) ; RTC,
- and a, %be
- out0 (RTC_CTRL), a
-
- ; Configure external memory/io
-
- ld a, __CS0_LBR_INIT_PARAM
- out0 (CS0_LBR), a
- ld a, __CS0_UBR_INIT_PARAM
- out0 (CS0_UBR), a
- ld a, __CS0_BMC_INIT_PARAM
- out0 (CS0_BMC), a
- ld a, __CS0_CTL_INIT_PARAM
- out0 (CS0_CTL), a
-
- ld a, __CS1_LBR_INIT_PARAM
- out0 (CS1_LBR), a
- ld a, __CS1_UBR_INIT_PARAM
- out0 (CS1_UBR), a
- ld a, __CS1_BMC_INIT_PARAM
- out0 (CS1_BMC), a
- ld a, __CS1_CTL_INIT_PARAM
- out0 (CS1_CTL), a
-
- ld a, __CS2_LBR_INIT_PARAM
- out0 (CS2_LBR), a
- ld a, __CS2_UBR_INIT_PARAM
- out0 (CS2_UBR), a
- ld a, __CS2_BMC_INIT_PARAM
- out0 (CS2_BMC), a
- ld a, __CS2_CTL_INIT_PARAM
- out0 (CS2_CTL), a
-
- ld a, __CS3_LBR_INIT_PARAM
- out0 (CS3_LBR), a
- ld a, __CS3_UBR_INIT_PARAM
- out0 (CS3_UBR), a
- ld a, __CS3_BMC_INIT_PARAM
- out0 (CS3_BMC), a
- ld a, __CS3_CTL_INIT_PARAM
- out0 (CS3_CTL), a
-
- ; Enable internal memory
-
- ld a, __FLASH_ADDR_U_INIT_PARAM
- out0 (FLASH_ADDR_U), a
- ld a, __FLASH_CTL_INIT_PARAM
- out0 (FLASH_CTRL), a
-
- ld a, __RAM_ADDR_U_INIT_PARAM
- out0 (RAM_ADDR_U), a
- ld a, __RAM_CTL_INIT_PARAM
- out0 (RAM_CTL), a
- ret
-
-;*****************************************************************************
-; eZ80F91 System Clock Initialization
-;*****************************************************************************
-
-_ez80_initsysclk:
- ; check if the PLL should be used
- ld a, (_ez80_sysclksrc)
- cp a, PLL
- jr nz, _ez80_initsysclkdone
-
- ; Load PLL divider
-
- ld a, (_ez80_oscfreqmult) ;CR 6202
- out0 (PLL_DIV_L), a
- ld a, (_ez80_oscfreqmult+1)
- out0 (PLL_DIV_H), a
-
- ; Set charge pump and lock criteria
-
- ld a, __PLL_CTL0_INIT_PARAM
- and a, %CC ; mask off reserved and clock source bits
- out0 (PLL_CTL0), a
-
- ; Enable PLL
-
- in0 a, (PLL_CTL1)
- set 0, a
- out0 (PLL_CTL1), a
-
- ; Wait for PLL to lock
-_ez80_initsysclkwait:
- in0 a, (PLL_CTL1)
- and a, LCK_STATUS
- cp a, LCK_STATUS
- jr nz, _ez80_initsysclkwait
-
- ; Select PLL as system clock source
-
- ld a, __PLL_CTL0_INIT_PARAM
- set 0, a
- out0 (PLL_CTL0), a
-
-_ez80_initsysclkdone:
- ret
-
-;_ez80_oscfreq:
-; dl _OSC_FREQ
-_ez80_oscfreqmult:
- dw _OSC_FREQ_MULT
-;_ez80_sysclkfreq:
-; dl _SYS_CLK_FREQ
-_ez80_sysclksrc:
- db _SYS_CLK_SRC
+;************************************************************************** +; arch/z80/src/ez80/ez80f91_init.asm +; +; Copyright (C) 2008 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt <gnutt@nuttx.org> +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + +;************************************************************************** +; Included Files +;************************************************************************** + + include "ez80f91.inc" + +;************************************************************************** +; Constants +;************************************************************************** + +;PLL_DIV_L EQU %5C +;PLL_DIV_H EQU %5D +;PLL_CTL0 EQU %5E +;PLL_CTL1 EQU %5F + +OSC EQU 0 +PLL EQU 1 +RTC EQU 2 + +CLK_MUX_OSC EQU %00 +CLK_MUX_PLL EQU %01 +CLK_MUX_RTC EQU %02 + +CHRP_CTL_0 EQU %00 +CHRP_CTL_1 EQU %40 +CHRP_CTL_2 EQU %80 +CHRP_CTL_3 EQU %C0 + +LDS_CTL_0 EQU %00 +LDS_CTL_1 EQU %04 +LDS_CTL_2 EQU %08 +LDS_CTL_3 EQU %0C + +LCK_STATUS EQU %20 +INT_LOCK EQU %10 +INT_UNLOCK EQU %08 +INT_LOCK_EN EQU %04 +INT_UNLOCK_EN EQU %02 +PLL_ENABLE EQU %01 + +;************************************************************************** +; Global symbols used +;************************************************************************** + +; Exported symbols + xdef _ez80_init + xdef _ez80_initsysclk + +; Imported symbols + xref __CS0_LBR_INIT_PARAM + xref __CS0_UBR_INIT_PARAM + xref __CS0_CTL_INIT_PARAM + xref __CS1_LBR_INIT_PARAM + xref __CS1_UBR_INIT_PARAM + xref __CS1_CTL_INIT_PARAM + xref __CS2_LBR_INIT_PARAM + xref __CS2_UBR_INIT_PARAM + xref __CS2_CTL_INIT_PARAM + xref __CS3_LBR_INIT_PARAM + xref __CS3_UBR_INIT_PARAM + xref __CS3_CTL_INIT_PARAM + xref __CS0_BMC_INIT_PARAM + xref __CS1_BMC_INIT_PARAM + xref __CS2_BMC_INIT_PARAM + xref __CS3_BMC_INIT_PARAM + xref __FLASH_CTL_INIT_PARAM + xref __FLASH_ADDR_U_INIT_PARAM + xref __RAM_CTL_INIT_PARAM + xref __RAM_ADDR_U_INIT_PARAM + xref _SYS_CLK_SRC + xref _SYS_CLK_FREQ + xref _OSC_FREQ + xref _OSC_FREQ_MULT + xref __PLL_CTL0_INIT_PARAM + +;************************************************************************** +; Chip-specific initialization logic +;************************************************************************** +; Minimum default initialization for eZ80F91 + + define .STARTUP, space = ROM + segment .STARTUP + .assume ADL = 1 + +_ez80_init: + ; Disable internal peripheral interrupt sources + + ld a, %ff + out0 (PA_DDR), a ; GPIO + out0 (PB_DDR), a + out0 (PC_DDR), a + out0 (PD_DDR), a + ld a, %00 + out0 (PA_ALT1), a + out0 (PB_ALT1), a + out0 (PC_ALT1), a + out0 (PD_ALT1), a + out0 (PA_ALT2), a + out0 (PB_ALT2), a + out0 (PC_ALT2), a + out0 (PD_ALT2), a + out0 (PLL_CTL1), a ; PLL + out0 (TMR0_IER), a ; timers + out0 (TMR1_IER), a + out0 (TMR2_IER), a + out0 (TMR3_IER), a + out0 (UART0_IER), a ; UARTs + out0 (UART1_IER), a + out0 (I2C_CTL), a ; I2C + out0 (EMAC_IEN), a ; EMAC + out0 (FLASH_IRQ), a ; Flash + ld a, %04 + out0 (SPI_CTL), a ; SPI + in0 a, (RTC_CTRL) ; RTC, + and a, %be + out0 (RTC_CTRL), a + + ; Configure external memory/io + + ld a, __CS0_LBR_INIT_PARAM + out0 (CS0_LBR), a + ld a, __CS0_UBR_INIT_PARAM + out0 (CS0_UBR), a + ld a, __CS0_BMC_INIT_PARAM + out0 (CS0_BMC), a + ld a, __CS0_CTL_INIT_PARAM + out0 (CS0_CTL), a + + ld a, __CS1_LBR_INIT_PARAM + out0 (CS1_LBR), a + ld a, __CS1_UBR_INIT_PARAM + out0 (CS1_UBR), a + ld a, __CS1_BMC_INIT_PARAM + out0 (CS1_BMC), a + ld a, __CS1_CTL_INIT_PARAM + out0 (CS1_CTL), a + + ld a, __CS2_LBR_INIT_PARAM + out0 (CS2_LBR), a + ld a, __CS2_UBR_INIT_PARAM + out0 (CS2_UBR), a + ld a, __CS2_BMC_INIT_PARAM + out0 (CS2_BMC), a + ld a, __CS2_CTL_INIT_PARAM + out0 (CS2_CTL), a + + ld a, __CS3_LBR_INIT_PARAM + out0 (CS3_LBR), a + ld a, __CS3_UBR_INIT_PARAM + out0 (CS3_UBR), a + ld a, __CS3_BMC_INIT_PARAM + out0 (CS3_BMC), a + ld a, __CS3_CTL_INIT_PARAM + out0 (CS3_CTL), a + + ; Enable internal memory + + ld a, __FLASH_ADDR_U_INIT_PARAM + out0 (FLASH_ADDR_U), a + ld a, __FLASH_CTL_INIT_PARAM + out0 (FLASH_CTRL), a + + ld a, __RAM_ADDR_U_INIT_PARAM + out0 (RAM_ADDR_U), a + ld a, __RAM_CTL_INIT_PARAM + out0 (RAM_CTL), a + ret + +;***************************************************************************** +; eZ80F91 System Clock Initialization +;***************************************************************************** + +_ez80_initsysclk: + ; check if the PLL should be used + ld a, (_ez80_sysclksrc) + cp a, PLL + jr nz, _ez80_initsysclkdone + + ; Load PLL divider + + ld a, (_ez80_oscfreqmult) ;CR 6202 + out0 (PLL_DIV_L), a + ld a, (_ez80_oscfreqmult+1) + out0 (PLL_DIV_H), a + + ; Set charge pump and lock criteria + + ld a, __PLL_CTL0_INIT_PARAM + and a, %CC ; mask off reserved and clock source bits + out0 (PLL_CTL0), a + + ; Enable PLL + + in0 a, (PLL_CTL1) + set 0, a + out0 (PLL_CTL1), a + + ; Wait for PLL to lock +_ez80_initsysclkwait: + in0 a, (PLL_CTL1) + and a, LCK_STATUS + cp a, LCK_STATUS + jr nz, _ez80_initsysclkwait + + ; Select PLL as system clock source + + ld a, __PLL_CTL0_INIT_PARAM + set 0, a + out0 (PLL_CTL0), a + +_ez80_initsysclkdone: + ret + +;_ez80_oscfreq: +; dl _OSC_FREQ +_ez80_oscfreqmult: + dw _OSC_FREQ_MULT +;_ez80_sysclkfreq: +; dl _SYS_CLK_FREQ +_ez80_sysclksrc: + db _SYS_CLK_SRC end
\ No newline at end of file diff --git a/nuttx/arch/z80/src/ez80/ez80f91_spi.h b/nuttx/arch/z80/src/ez80/ez80f91_spi.h index e27df2693..9fa42917b 100644 --- a/nuttx/arch/z80/src/ez80/ez80f91_spi.h +++ b/nuttx/arch/z80/src/ez80/ez80f91_spi.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/ez80f91_spi.h * * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/switch.h b/nuttx/arch/z80/src/ez80/switch.h index 3b7f1bd95..de6506490 100644 --- a/nuttx/arch/z80/src/ez80/switch.h +++ b/nuttx/arch/z80/src/ez80/switch.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/switch.h * * Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/ez80/up_mem.h b/nuttx/arch/z80/src/ez80/up_mem.h index 724facbd3..624247022 100644 --- a/nuttx/arch/z80/src/ez80/up_mem.h +++ b/nuttx/arch/z80/src/ez80/up_mem.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/up_mem.h * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/mkhpbase.sh b/nuttx/arch/z80/src/mkhpbase.sh index 48647e822..1d7acb7d5 100755 --- a/nuttx/arch/z80/src/mkhpbase.sh +++ b/nuttx/arch/z80/src/mkhpbase.sh @@ -3,7 +3,7 @@ # arch/z80/src/mkhpbase.sh # # Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt <spudmonkey@racsa.co.cr> +# Author: Gregory Nutt <gnutt@nuttx.org> # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/Make.defs b/nuttx/arch/z80/src/z8/Make.defs index ae4f2a48c..5d7a338be 100644 --- a/nuttx/arch/z80/src/z8/Make.defs +++ b/nuttx/arch/z80/src/z8/Make.defs @@ -2,7 +2,7 @@ # arch/z80/src/z8/Make.defs # # Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt <spudmonkey@racsa.co.cr> +# Author: Gregory Nutt <gnutt@nuttx.org> # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/chip.h b/nuttx/arch/z80/src/z8/chip.h index 7635c0407..4951a27fa 100644 --- a/nuttx/arch/z80/src/z8/chip.h +++ b/nuttx/arch/z80/src/z8/chip.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/chip.h * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/switch.h b/nuttx/arch/z80/src/z8/switch.h index c37d7bcd0..7738f2436 100644 --- a/nuttx/arch/z80/src/z8/switch.h +++ b/nuttx/arch/z80/src/z8/switch.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/switch.h * * Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/up_mem.h b/nuttx/arch/z80/src/z8/up_mem.h index 42ad293a8..681805e66 100644 --- a/nuttx/arch/z80/src/z8/up_mem.h +++ b/nuttx/arch/z80/src/z8/up_mem.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/up_mem.h * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/z8_head.S b/nuttx/arch/z80/src/z8/z8_head.S index 550409632..7fcd90504 100755 --- a/nuttx/arch/z80/src/z8/z8_head.S +++ b/nuttx/arch/z80/src/z8/z8_head.S @@ -1,253 +1,253 @@ -/**************************************************************************
- * arch/z80/src/z8/z8_head.S
- * ez8 Reset Entry Point
- *
- * Copyright (C) 2008 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS or IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER or CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, or CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS or SERVICES; LOSS
- * OF USE, DATA, or PROFITS; or BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, or TORT (INCLUDING NEGLIGENCE or OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- **************************************************************************/
-
-/**************************************************************************
- * Included Files
- **************************************************************************/
-
-#include <nuttx/config.h>
-#include <ez8.inc>
-#include <configl.inc>
-#include <vect.inc>
-
-/**************************************************************************
- * Definitions
- **************************************************************************/
-
-/* Assume the large model */
-
-#if !defined(CONFIG_Z8_MODEL_LARGE) && !defined(CONFIG_Z8_MODEL_SMALL)
-# define CONFIG_Z8_MODEL_LARGE 1
-# undef CONFIG_Z8_MODEL_SMALL
-#endif
-
-#ifdef __Z8F1680
-# define CONFIG_Z8_COPYPRAM
-#else
-# undef CONFIG_Z8_COPYPRAM
-#endif
-
-
-/**************************************************************************
- * External References / External Definitions
- **************************************************************************/
-
- xref _z16f_clkinit:ROM
- xref _z16f_lowinit:ROM
-#ifdef CONFIG_ARCH_LEDS
- xref _up_ledinit:ROM
-#endif
- xref _os_start:ROM
- xref _up_doirq:ROM
- xref _low_nearbss
- xref _len_nearbss
- xref _low_farbss
- xref _len_farbss
- xref _low_neardata
- xref _len_neardata
- xref _low_near_romdata
- xref _low_fardata
- xref _len_fardata
- xref _low_far_romdata
-#ifdef CONFIG_Z8_COPYPRAM
- xref _low_pramseg
- xref _len_pramseg
- xref _low_pram_romdata
-#endif
- xref _far_stacktop
- xdef _z8_reset
- xdef __intrp
-
-/**************************************************************************
- * Code
- **************************************************************************/
-
- segment CODE
-
-/**************************************************************************
- * Interrupt Vectors
- **************************************************************************/
-
- /* Reset vector */
-
- vector RESET = _z8_reset
-
-/**************************************************************************
- * Name: _z16f_reset
- *
- * Description:
- * Reset entry point
- *
- **************************************************************************/
-
- define startup, space=rom
- segment startup
-_z8_reset:
- /* Set the register pointer for working registers e0-ef */
-
- srp #%e0
-
- /* Initialize the stack pointer */
-
- ldx spl, #low(_far_stacktop+1)
- ldx sph, #high(_far_stacktop+1)
-
- /* Clear internal register ram area (c_nearbss) */
-
- ld r0, #_low_nearbss
- ld r2, #_len_nearbss
- cp r2, #0
- jr z, _z8_reset2
-
-_z8_reset1:
- clr @r0
- inc r0
- djnz r2, _z8_reset1
-
- /* Clear extended ram area (c_farbss) */
-
-_z8_reset2:
- ld r2, #high(_low_farbss)
- ld r3, #low(_low_farbss)
- ld r0, #high(_len_farbss)
- ld r1, #low(_len_farbss)
-
- ld r4, r0
- or r4, r1
- jr z, _z8_reset4
- clr r4
-
-_z8_reset3:
- ldx @rr2,r4
- incw rr2
- decw rr0
- jr nz, _z8_reset3
-
- /* Copy ROM data into internal RAM */
-
-_z8_reset4:
-#ifdef CONFIG_Z8_COPYNEARDATA
- ld r0, #high(_low_near_romdata)
- ld r1, #low(_low_near_romdata)
- ld r3, #_len_neardata
- ld r4, #_low_neardata
- cp r3, #0
- jr z, _z8_reset6
-
-_z8_reset5:
- ldci @r4, @rr0
- djnz r3, _z8_reset5
-
-_z8_reset6:
-#endif
- /* Copy ROM data into extended RAM */
-
- ld r0, #high(_low_fardata)
- ld r1, #low(_low_fardata)
- ld r2, #high(_low_far_romdata)
- ld r3, #low(_low_far_romdata)
- ld r4, #high(_len_fardata)
- ld r5, #low(_len_fardata)
-
- ld r6, r4
- or r6, r5
- jr z, _z8_reset8
-
-_z8_reset7:
- ldc r6, @rr2
- ldx @rr0, r6
- incw rr0
- incw rr2
- decw rr4
- jr nz, _z8_reset7
-
- /* Copy ROM copy of code into Program RAM */
-
-_z8_reset8:
-#ifdef CONFIG_Z8_COPYPRAM
- ld r0, #high(_low_pramseg)
- ld r1, #low(_low_pramseg)
- ld r2, #high(_low_pram_romdata)
- ld r3, #low(_low_pram_romdata)
- ld r4, #high(_len_pramseg)
- ld r5, #low(_len_pramseg)
-
- ld r6, r4
- or r6, r5
- jr z, _z8_reset10
-
-_z8_reset9:
- ldc r6, @rr2
- ldc @rr0, r6
- incw rr0
- incw rr2
- decw rr4
- jr nz, _z8_reset9
-
-_z8_reset10:
-#endif
-
- /* Start NuttX */
-
- ldx __intrp,#0
- xor r15, r15
- xor r14, r14
- call _os_start
-
- /* We should never get here */
-
-_z8_reset_halt:
- jr _z8_reset_halt
-
-/**************************************************************************
- * Data
- **************************************************************************/
-
-#ifdef CONFIG_Z8_MODEL_LARGE
- segment FAR_BSS
-__intrp ds 1
-#else
- segment NEAR_BSS
-__intrp ds 1
-#endif
-
- /* Set aside area for working registers */
-
- define workingreg, space=rdata, org=%e0
- segment workingreg
- ds %10
-
- end _z8_reset
+/************************************************************************** + * arch/z80/src/z8/z8_head.S + * ez8 Reset Entry Point + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS or IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER or CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, or CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS or SERVICES; LOSS + * OF USE, DATA, or PROFITS; or BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, or TORT (INCLUDING NEGLIGENCE or OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************/ + +/************************************************************************** + * Included Files + **************************************************************************/ + +#include <nuttx/config.h> +#include <ez8.inc> +#include <configl.inc> +#include <vect.inc> + +/************************************************************************** + * Definitions + **************************************************************************/ + +/* Assume the large model */ + +#if !defined(CONFIG_Z8_MODEL_LARGE) && !defined(CONFIG_Z8_MODEL_SMALL) +# define CONFIG_Z8_MODEL_LARGE 1 +# undef CONFIG_Z8_MODEL_SMALL +#endif + +#ifdef __Z8F1680 +# define CONFIG_Z8_COPYPRAM +#else +# undef CONFIG_Z8_COPYPRAM +#endif + + +/************************************************************************** + * External References / External Definitions + **************************************************************************/ + + xref _z16f_clkinit:ROM + xref _z16f_lowinit:ROM +#ifdef CONFIG_ARCH_LEDS + xref _up_ledinit:ROM +#endif + xref _os_start:ROM + xref _up_doirq:ROM + xref _low_nearbss + xref _len_nearbss + xref _low_farbss + xref _len_farbss + xref _low_neardata + xref _len_neardata + xref _low_near_romdata + xref _low_fardata + xref _len_fardata + xref _low_far_romdata +#ifdef CONFIG_Z8_COPYPRAM + xref _low_pramseg + xref _len_pramseg + xref _low_pram_romdata +#endif + xref _far_stacktop + xdef _z8_reset + xdef __intrp + +/************************************************************************** + * Code + **************************************************************************/ + + segment CODE + +/************************************************************************** + * Interrupt Vectors + **************************************************************************/ + + /* Reset vector */ + + vector RESET = _z8_reset + +/************************************************************************** + * Name: _z16f_reset + * + * Description: + * Reset entry point + * + **************************************************************************/ + + define startup, space=rom + segment startup +_z8_reset: + /* Set the register pointer for working registers e0-ef */ + + srp #%e0 + + /* Initialize the stack pointer */ + + ldx spl, #low(_far_stacktop+1) + ldx sph, #high(_far_stacktop+1) + + /* Clear internal register ram area (c_nearbss) */ + + ld r0, #_low_nearbss + ld r2, #_len_nearbss + cp r2, #0 + jr z, _z8_reset2 + +_z8_reset1: + clr @r0 + inc r0 + djnz r2, _z8_reset1 + + /* Clear extended ram area (c_farbss) */ + +_z8_reset2: + ld r2, #high(_low_farbss) + ld r3, #low(_low_farbss) + ld r0, #high(_len_farbss) + ld r1, #low(_len_farbss) + + ld r4, r0 + or r4, r1 + jr z, _z8_reset4 + clr r4 + +_z8_reset3: + ldx @rr2,r4 + incw rr2 + decw rr0 + jr nz, _z8_reset3 + + /* Copy ROM data into internal RAM */ + +_z8_reset4: +#ifdef CONFIG_Z8_COPYNEARDATA + ld r0, #high(_low_near_romdata) + ld r1, #low(_low_near_romdata) + ld r3, #_len_neardata + ld r4, #_low_neardata + cp r3, #0 + jr z, _z8_reset6 + +_z8_reset5: + ldci @r4, @rr0 + djnz r3, _z8_reset5 + +_z8_reset6: +#endif + /* Copy ROM data into extended RAM */ + + ld r0, #high(_low_fardata) + ld r1, #low(_low_fardata) + ld r2, #high(_low_far_romdata) + ld r3, #low(_low_far_romdata) + ld r4, #high(_len_fardata) + ld r5, #low(_len_fardata) + + ld r6, r4 + or r6, r5 + jr z, _z8_reset8 + +_z8_reset7: + ldc r6, @rr2 + ldx @rr0, r6 + incw rr0 + incw rr2 + decw rr4 + jr nz, _z8_reset7 + + /* Copy ROM copy of code into Program RAM */ + +_z8_reset8: +#ifdef CONFIG_Z8_COPYPRAM + ld r0, #high(_low_pramseg) + ld r1, #low(_low_pramseg) + ld r2, #high(_low_pram_romdata) + ld r3, #low(_low_pram_romdata) + ld r4, #high(_len_pramseg) + ld r5, #low(_len_pramseg) + + ld r6, r4 + or r6, r5 + jr z, _z8_reset10 + +_z8_reset9: + ldc r6, @rr2 + ldc @rr0, r6 + incw rr0 + incw rr2 + decw rr4 + jr nz, _z8_reset9 + +_z8_reset10: +#endif + + /* Start NuttX */ + + ldx __intrp,#0 + xor r15, r15 + xor r14, r14 + call _os_start + + /* We should never get here */ + +_z8_reset_halt: + jr _z8_reset_halt + +/************************************************************************** + * Data + **************************************************************************/ + +#ifdef CONFIG_Z8_MODEL_LARGE + segment FAR_BSS +__intrp ds 1 +#else + segment NEAR_BSS +__intrp ds 1 +#endif + + /* Set aside area for working registers */ + + define workingreg, space=rdata, org=%e0 + segment workingreg + ds %10 + + end _z8_reset diff --git a/nuttx/arch/z80/src/z8/z8_i2c.c b/nuttx/arch/z80/src/z8/z8_i2c.c index be4a94eb0..e90bd4036 100755 --- a/nuttx/arch/z80/src/z8/z8_i2c.c +++ b/nuttx/arch/z80/src/z8/z8_i2c.c @@ -2,7 +2,7 @@ * arch/z80/src/z8/z8_i2c.c * * Copyright(C) 2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/z8_initialstate.c b/nuttx/arch/z80/src/z8/z8_initialstate.c index 794446aac..706347da9 100644 --- a/nuttx/arch/z80/src/z8/z8_initialstate.c +++ b/nuttx/arch/z80/src/z8/z8_initialstate.c @@ -2,7 +2,7 @@ * arch/z80/src/z8/z8_initialstate.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/z8_irq.c b/nuttx/arch/z80/src/z8/z8_irq.c index be732fe83..82ab4d60c 100644 --- a/nuttx/arch/z80/src/z8/z8_irq.c +++ b/nuttx/arch/z80/src/z8/z8_irq.c @@ -2,7 +2,7 @@ * arch/z80/src/z8/z8_irq.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/z8_registerdump.c b/nuttx/arch/z80/src/z8/z8_registerdump.c index d9ccdf48f..36b6cdd37 100644 --- a/nuttx/arch/z80/src/z8/z8_registerdump.c +++ b/nuttx/arch/z80/src/z8/z8_registerdump.c @@ -2,7 +2,7 @@ * arch/z80/src/z8/z8_registerdump.c * * Copyright (C) 2008-2009,2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/z8_restorecontext.S b/nuttx/arch/z80/src/z8/z8_restorecontext.S index 4cdd0d3d0..88e29781c 100755 --- a/nuttx/arch/z80/src/z8/z8_restorecontext.S +++ b/nuttx/arch/z80/src/z8/z8_restorecontext.S @@ -1,164 +1,164 @@ -/**************************************************************************
- * arch/z80/src/z8/z8_saveusercontext.S
- * Save the state of the current user thread
- *
- * Copyright (C) 2008 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS or IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER or CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, or CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS or SERVICES; LOSS
- * OF USE, DATA, or PROFITS; or BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, or TORT (INCLUDING NEGLIGENCE or OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- **************************************************************************/
-
-/**************************************************************************
- * Included Files
- **************************************************************************/
-
-#include <nuttx/config.h>
-#include <arch/irq.h>
-#include <ez8.inc>
-
-/**************************************************************************
- * Definitions
- **************************************************************************/
-
- xdef _z8_restorecontext
-
-/**************************************************************************
- * Code
- **************************************************************************/
-
- segment CODE
-
-/****************************************************************************
- * Name: _z8_restorecontext
- *
- * Description:
- * Restore the task context that was previously saved via
- * _z8_saveusercontext() or by interrupt handling. Unlike the
- * _z8_saveusercontext() counterpart, we do not know the context of the
- * restored task and, hence, we must handle the worst case -- restore
- * everythihng.
- *
- * Parameters:
- * On entry, the following stack organization is assumed:
- *
- * Pointer to the context save structure
- * TOS -> Return address (2)
- *
- * Assumptions:
- * Large model, dynamic frames
- *
- **************************************************************************/
-
-_z8_restorecontext:
- /* Disable all interrupts because we are going to be using
- * the IRQ register set.
- */
-
- di
-
- /* Switch to IRQ register set */
-
- srp #%f0
-
- /* Get the rr0 = the current value of the stack pointer */
-
- ldx r0, sph /* rr0 = stack pointer */
- ldx r1, spl
-
- /* Get rr6 = the pointer to the context save structure */
-
- ldx r6, 2(rr0) /* rr6 = pointer to context structure */
- ldx r7, 3(rr0)
-
- /* Copy all registers into the user register area. NOTE: we
- * use the saved RP value to determine the destination adress.
- */
-
- clr r0 /* rr0 = destination address */
- ldx r1, XCPT_RP_OFFS(rr6)
- ld r2, r6 /* rr2 = source address */
- ld r3, r7
- ld r4, #16 /* r4 = number of bytes to copy */
-
-_z8_restore:
- ldx r5, @rr2
- ldx @rr0, r5
- incw rr0
- incw rr2
- djnz r4, _z8_restore
-
- /* Set the new stack pointer */
-
- ldx r0, XCPT_SPH_OFFS(rr6)
- ldx r1, XCPT_SPL_OFFS(rr6)
- ldx sph, r0
- ldx spl, r1
-
- /* Push the return address onto the stack */
-
- ldx r0, XCPT_PCH_OFFS(rr6)
- ldx r1, XCPT_PCL_OFFS(rr6)
- push r1
- push r0
-
- /* Recover the flags and RP settings.. but don't restore them yet */
-
- ldx r1, XCPT_FLAGS_OFFS(rr6)
- ldx r2, XCPT_RP_OFFS(rr6)
-
- /* Determine whether interrupts must be enabled on return. This
- * would be nicer to do below, but later we will need to preserve
- * the condition codes in the flags.
- */
-
- ldx r0, XCPT_IRQCTL_OFFS(rr6)
- tm r0, #%80
- jr nz, _z8_returnenabled
-
- /* Restore the flag settings */
-
- ldx flags, r1
-
- /* Restore the user register page and return with interrupts disabled */
-
- ldx rp, r2 /* Does not effect flags */
- ret /* Does not effect flags */
-
-_z8_returnenabled:
- /* Restore the flag settings */
-
- ldx flags, r1
-
- /* Restore the user register page, re-enable interrupts and return */
-
- ldx rp, r2 /* Does not effect flags */
- ei /* Does not effect flags */
- ret /* Does not effect flags */
-
- end
+/************************************************************************** + * arch/z80/src/z8/z8_saveusercontext.S + * Save the state of the current user thread + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS or IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER or CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, or CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS or SERVICES; LOSS + * OF USE, DATA, or PROFITS; or BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, or TORT (INCLUDING NEGLIGENCE or OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************/ + +/************************************************************************** + * Included Files + **************************************************************************/ + +#include <nuttx/config.h> +#include <arch/irq.h> +#include <ez8.inc> + +/************************************************************************** + * Definitions + **************************************************************************/ + + xdef _z8_restorecontext + +/************************************************************************** + * Code + **************************************************************************/ + + segment CODE + +/**************************************************************************** + * Name: _z8_restorecontext + * + * Description: + * Restore the task context that was previously saved via + * _z8_saveusercontext() or by interrupt handling. Unlike the + * _z8_saveusercontext() counterpart, we do not know the context of the + * restored task and, hence, we must handle the worst case -- restore + * everythihng. + * + * Parameters: + * On entry, the following stack organization is assumed: + * + * Pointer to the context save structure + * TOS -> Return address (2) + * + * Assumptions: + * Large model, dynamic frames + * + **************************************************************************/ + +_z8_restorecontext: + /* Disable all interrupts because we are going to be using + * the IRQ register set. + */ + + di + + /* Switch to IRQ register set */ + + srp #%f0 + + /* Get the rr0 = the current value of the stack pointer */ + + ldx r0, sph /* rr0 = stack pointer */ + ldx r1, spl + + /* Get rr6 = the pointer to the context save structure */ + + ldx r6, 2(rr0) /* rr6 = pointer to context structure */ + ldx r7, 3(rr0) + + /* Copy all registers into the user register area. NOTE: we + * use the saved RP value to determine the destination adress. + */ + + clr r0 /* rr0 = destination address */ + ldx r1, XCPT_RP_OFFS(rr6) + ld r2, r6 /* rr2 = source address */ + ld r3, r7 + ld r4, #16 /* r4 = number of bytes to copy */ + +_z8_restore: + ldx r5, @rr2 + ldx @rr0, r5 + incw rr0 + incw rr2 + djnz r4, _z8_restore + + /* Set the new stack pointer */ + + ldx r0, XCPT_SPH_OFFS(rr6) + ldx r1, XCPT_SPL_OFFS(rr6) + ldx sph, r0 + ldx spl, r1 + + /* Push the return address onto the stack */ + + ldx r0, XCPT_PCH_OFFS(rr6) + ldx r1, XCPT_PCL_OFFS(rr6) + push r1 + push r0 + + /* Recover the flags and RP settings.. but don't restore them yet */ + + ldx r1, XCPT_FLAGS_OFFS(rr6) + ldx r2, XCPT_RP_OFFS(rr6) + + /* Determine whether interrupts must be enabled on return. This + * would be nicer to do below, but later we will need to preserve + * the condition codes in the flags. + */ + + ldx r0, XCPT_IRQCTL_OFFS(rr6) + tm r0, #%80 + jr nz, _z8_returnenabled + + /* Restore the flag settings */ + + ldx flags, r1 + + /* Restore the user register page and return with interrupts disabled */ + + ldx rp, r2 /* Does not effect flags */ + ret /* Does not effect flags */ + +_z8_returnenabled: + /* Restore the flag settings */ + + ldx flags, r1 + + /* Restore the user register page, re-enable interrupts and return */ + + ldx rp, r2 /* Does not effect flags */ + ei /* Does not effect flags */ + ret /* Does not effect flags */ + + end diff --git a/nuttx/arch/z80/src/z8/z8_saveirqcontext.c b/nuttx/arch/z80/src/z8/z8_saveirqcontext.c index 2d3fb7aa2..ea206c9dd 100644 --- a/nuttx/arch/z80/src/z8/z8_saveirqcontext.c +++ b/nuttx/arch/z80/src/z8/z8_saveirqcontext.c @@ -2,7 +2,7 @@ * arch/z80/src/z8/z8_saveirqcontext.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/z8_saveusercontext.S b/nuttx/arch/z80/src/z8/z8_saveusercontext.S index 314cf3e77..e55351550 100755 --- a/nuttx/arch/z80/src/z8/z8_saveusercontext.S +++ b/nuttx/arch/z80/src/z8/z8_saveusercontext.S @@ -1,165 +1,165 @@ -/**************************************************************************
- * arch/z80/src/z8/z8_saveusercontext.S
- * Save the state of the current user thread
- *
- * Copyright (C) 2008 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS or IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER or CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, or CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS or SERVICES; LOSS
- * OF USE, DATA, or PROFITS; or BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, or TORT (INCLUDING NEGLIGENCE or OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- **************************************************************************/
-
-/**************************************************************************
- * Included Files
- **************************************************************************/
-
-#include <nuttx/config.h>
-#include <arch/irq.h>
-#include <ez8.inc>
-
-/**************************************************************************
- * Definitions
- **************************************************************************/
-
- xdef _z8_saveusercontext
-
-/**************************************************************************
- * Code
- **************************************************************************/
-
- segment CODE
-
-/****************************************************************************
- * Name: _z8_saveusercontext
- *
- * Description:
- * Save the current state of the user thread. Since this function is
- * called from user code, it is only necessary to save the parts of the
- * context that must be preserved between function calls. This includes
- *
- * - Frame pointer (r14, r15)
- * - Register pointer (RP)
- * - Interrupt state (flags)
- * - Stack pointer (sph, spl)
- * - Return address
- *
- * Parameters:
- * On entry, the following stack organization is assumed:
- *
- * Pointer to the context save structure
- * TOS -> Return address (2)
- *
- * Assumptions:
- * Large model, dynamic frames
- *
- **************************************************************************/
-
-_z8_saveusercontext:
- /* Get the rr6 = the current value of the stack pointer */
-
- ldx r6, sph /* rr6 = stack pointer */
- ldx r7, spl
-
- /* Get rr2 = the pointer to the context save structure */
-
- ldx r2, 2(rr6) /* rr2 = pointer to context structure */
- ldx r3, 3(rr6)
-
- /* Get the value currently in the interrupt control register.
- * Bit 7 (IRQE) determines whether or not interrupts are
- * currently enabled (0:disabled, 1:enabled)
- */
-
- ldx r4, IRQCTL /* r4 = IRQCTL value */
-
- /* Disable all interrupts so that there can be no concurrent
- * modification of the TCB state save area.
- */
-
- di
-
- /* Fetch and save the return address from the stack */
-
- ldx r0, @rr6 /* rr0 = return address */
- ldx r1, 1(rr6)
- ldx XCPT_PCH_OFFS(rr2), r0
- ldx XCPT_PCL_OFFS(rr2), r1
-
- /* Fetch and save the register pointer */
-
- ldx r0, rp /* r0 = register pointer */
- ldx XCPT_RP_OFFS(rr2), r0
-
- /* Calculate the value of the stack pointer on return
- * from this function
- */
-
- ld r1, #3 /* rr0 = 3 */
- clr r0
- add r1, r7 /* rr0 = SP + 3 */
- adc r0, r6
- ldx XCPT_SPH_OFFS(rr2), r0
- ldx XCPT_SPL_OFFS(rr2), r1
-
- /* Save the IRQCTL register value */
-
- clr r0
- ldx XCPT_UNUSED_OFFS(rr2), r0
- ldx XCPT_IRQCTL_OFFS(rr2), r4
-
- /* Save the frame pointer (rr14) in the context structure */
-
- ldx XCPT_R14_OFFS(rr2), r14
- ldx XCPT_R15_OFFS(rr2), r15
-
- /* Set the return value of 1 in the context structure. When the
- * state is restored (via z8_restorecontext() or an interrupt
- * return), the return value of 1 distinguishes the no-context-
- * switch case.
- */
-
- /* clr r0 */
- ld r1, #1
- ldx XCPT_R0_OFFS(rr2), r0
- ldx XCPT_R1_OFFS(rr2), r1
-
- /* Setup to return zero for the no-context-switch case */
-
- /* clr r0 */
- clr r1
-
- /* Now decide if we need to re-enable interrupts or not */
-
- tm r4, #%80
- jr z, _z8_noenable
- ei
-_z8_noenable:
- ret
-
- end
-
+/************************************************************************** + * arch/z80/src/z8/z8_saveusercontext.S + * Save the state of the current user thread + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS or IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER or CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, or CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS or SERVICES; LOSS + * OF USE, DATA, or PROFITS; or BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, or TORT (INCLUDING NEGLIGENCE or OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************/ + +/************************************************************************** + * Included Files + **************************************************************************/ + +#include <nuttx/config.h> +#include <arch/irq.h> +#include <ez8.inc> + +/************************************************************************** + * Definitions + **************************************************************************/ + + xdef _z8_saveusercontext + +/************************************************************************** + * Code + **************************************************************************/ + + segment CODE + +/**************************************************************************** + * Name: _z8_saveusercontext + * + * Description: + * Save the current state of the user thread. Since this function is + * called from user code, it is only necessary to save the parts of the + * context that must be preserved between function calls. This includes + * + * - Frame pointer (r14, r15) + * - Register pointer (RP) + * - Interrupt state (flags) + * - Stack pointer (sph, spl) + * - Return address + * + * Parameters: + * On entry, the following stack organization is assumed: + * + * Pointer to the context save structure + * TOS -> Return address (2) + * + * Assumptions: + * Large model, dynamic frames + * + **************************************************************************/ + +_z8_saveusercontext: + /* Get the rr6 = the current value of the stack pointer */ + + ldx r6, sph /* rr6 = stack pointer */ + ldx r7, spl + + /* Get rr2 = the pointer to the context save structure */ + + ldx r2, 2(rr6) /* rr2 = pointer to context structure */ + ldx r3, 3(rr6) + + /* Get the value currently in the interrupt control register. + * Bit 7 (IRQE) determines whether or not interrupts are + * currently enabled (0:disabled, 1:enabled) + */ + + ldx r4, IRQCTL /* r4 = IRQCTL value */ + + /* Disable all interrupts so that there can be no concurrent + * modification of the TCB state save area. + */ + + di + + /* Fetch and save the return address from the stack */ + + ldx r0, @rr6 /* rr0 = return address */ + ldx r1, 1(rr6) + ldx XCPT_PCH_OFFS(rr2), r0 + ldx XCPT_PCL_OFFS(rr2), r1 + + /* Fetch and save the register pointer */ + + ldx r0, rp /* r0 = register pointer */ + ldx XCPT_RP_OFFS(rr2), r0 + + /* Calculate the value of the stack pointer on return + * from this function + */ + + ld r1, #3 /* rr0 = 3 */ + clr r0 + add r1, r7 /* rr0 = SP + 3 */ + adc r0, r6 + ldx XCPT_SPH_OFFS(rr2), r0 + ldx XCPT_SPL_OFFS(rr2), r1 + + /* Save the IRQCTL register value */ + + clr r0 + ldx XCPT_UNUSED_OFFS(rr2), r0 + ldx XCPT_IRQCTL_OFFS(rr2), r4 + + /* Save the frame pointer (rr14) in the context structure */ + + ldx XCPT_R14_OFFS(rr2), r14 + ldx XCPT_R15_OFFS(rr2), r15 + + /* Set the return value of 1 in the context structure. When the + * state is restored (via z8_restorecontext() or an interrupt + * return), the return value of 1 distinguishes the no-context- + * switch case. + */ + + /* clr r0 */ + ld r1, #1 + ldx XCPT_R0_OFFS(rr2), r0 + ldx XCPT_R1_OFFS(rr2), r1 + + /* Setup to return zero for the no-context-switch case */ + + /* clr r0 */ + clr r1 + + /* Now decide if we need to re-enable interrupts or not */ + + tm r4, #%80 + jr z, _z8_noenable + ei +_z8_noenable: + ret + + end + diff --git a/nuttx/arch/z80/src/z8/z8_schedulesigaction.c b/nuttx/arch/z80/src/z8/z8_schedulesigaction.c index 1f1a35471..7a5f66615 100644 --- a/nuttx/arch/z80/src/z8/z8_schedulesigaction.c +++ b/nuttx/arch/z80/src/z8/z8_schedulesigaction.c @@ -2,7 +2,7 @@ * arch/z80/src/z8/z8_schedulesigaction.c * * Copyright (C) 2008-2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/z8_sigdeliver.c b/nuttx/arch/z80/src/z8/z8_sigdeliver.c index c5cf30aa6..d1153a497 100644 --- a/nuttx/arch/z80/src/z8/z8_sigdeliver.c +++ b/nuttx/arch/z80/src/z8/z8_sigdeliver.c @@ -2,7 +2,7 @@ * arch/z80/src/z8/z8_sigdeliver.c * * Copyright (C) 2008-2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/z8_timerisr.c b/nuttx/arch/z80/src/z8/z8_timerisr.c index a317cf3b9..0ed61e283 100644 --- a/nuttx/arch/z80/src/z8/z8_timerisr.c +++ b/nuttx/arch/z80/src/z8/z8_timerisr.c @@ -2,7 +2,7 @@ * arch/z80/src/z8/z8_timerisr.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z8/z8_vector.S b/nuttx/arch/z80/src/z8/z8_vector.S index 2d1381dff..180241521 100755 --- a/nuttx/arch/z80/src/z8/z8_vector.S +++ b/nuttx/arch/z80/src/z8/z8_vector.S @@ -1,873 +1,873 @@ -/**************************************************************************
- * arch/z80/src/z8/z8_xdef.S
- * Interrupt Handling
- *
- * Copyright (C) 2008 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS or IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER or CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, or CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS or SERVICES; LOSS
- * OF USE, DATA, or PROFITS; or BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, or TORT (INCLUDING NEGLIGENCE or OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- **************************************************************************/
-
-/**************************************************************************
- * Included Files
- **************************************************************************/
-
-#include <nuttx/config.h>
-#include <arch/irq.h>
-
-#include <ez8.inc>
-#include <vect.inc>
-
-/**************************************************************************
- * Definitions
- **************************************************************************/
-
-/**************************************************************************
- * External References / External Definitions
- **************************************************************************/
-
- xref _up_doirq:ROM
-
-#if defined(ENCORE_VECTORS)
- xdef _z8_wdt_handler
- xdef _z8_trap_handler
-if EZ8_TIMER3=1
- xdef _z8_timer2_handler
-endif
- xdef _z8_timer1_handler
- xdef _z8_timer0_handler
-if EZ8_UART0=1
- xdef _z8_uart0rx_handler
- xdef _z8_uart0tx_handler
-endif
-if EZ8_I2C=1
- xdef _z8_i2c_handler
-endif
-if EZ8_SPI=1
- xdef _z8_spi_handler
-endif
-if EZ8_ADC=1
- xdef _z8_adc_handler
-endif
- xdef _z8_p7ad_handler
- xdef _z8_p6ad_handler
- xdef _z8_p5ad_handler
- xdef _z8_p4ad_handler
- xdef _z8_p3ad_handler
- xdef _z8_p2ad_handler
- xdef _z8_p1ad_handler
- xdef _z8_p0ad_handler
-if EZ8_TIMER4=1
- xdef _z8_timer3_handler
-endif
-if EZ8_UART1=1
- xdef _z8_uart1rx_handler
- xdef _z8_uart1tx_handler
-endif
-if EZ8_DMA=1
- xdef _z8_dma_handler
-endif
-if EZ8_PORT1=0
- xdef _z8_c3_handler
- xdef _z8_c2_handler
- xdef _z8_c1_handler
- xdef _z8_c0_handler
-endif
-
-/**************************************************************************/
-
-#elif defined(ENCORE_XP_VECTORS)
-
- xdef _z8_wdt_handler
- xdef _z8_trap_handler
-if EZ8_TIMER3=1
- xdef _z8_timer2_handler
-endif
- xdef _z8_timer1_handler
- xdef _z8_timer0_handler
-if EZ8_UART0=1
- xdef _z8_uart0rx_handler
- xdef _z8_uart0tx_handler
-endif
-if EZ8_I2C=1
- xdef _z8_i2c_handler
-endif
-if EZ8_SPI=1
- xdef _z8_spi_handler
-endif
-if (EZ8_ADC=1) || (EZ8_ADC_NEW=1)
- xdef _z8_adc_handler
-endif
- xdef _z8_p7ad_handler
- xdef _z8_p6ad_handler
- xdef _z8_p5ad_handler
- xdef _z8_p4ad_handler
- xdef _z8_p3ad_handler
- xdef _z8_p2ad_handler
- xdef _z8_p1ad_handler
- xdef _z8_p0ad_handler
-if EZ8_TIMER4=1
- xdef _z8_timer3_handler
-endif
-if EZ8_UART1=1
- xdef _z8_uart1rx_handler
- xdef _z8_uart1tx_handler
-endif
-if EZ8_DMA=1
- xdef _z8_dma_handler
-endif
-if (EZ8_PORT1=0)
- xdef _z8_c3_handler
- xdef _z8_c2_handler
- xdef _z8_c1_handler
- xdef _z8_c0_handler
-endif
- xdef _z8_potrap_handler
- xdef _z8_wotrap_handler
-
-/**************************************************************************/
-
-#elif defined(ENCORE_XP16K_VECTORS)
-
- xdef _z8_wdt_handler
- xdef _z8_trap_handler
-if EZ8_TIMER3=1
- xdef _z8_timer2_handler
-endif
- xdef _z8_timer1_handler
- xdef _z8_timer0_handler
-if EZ8_UART0=1
- xdef _z8_uart0rx_handler
- xdef _z8_uart0tx_handler
-endif
-if EZ8_I2C=1
- xdef _z8_i2c_handler
-endif
-if EZ8_ESPI=1
- xdef _z8_spi_handler
-endif
-if EZ8_ADC_NEW=1
- xdef _z8_adc_handler
-endif
- xdef _z8_p7ad_handler
- xdef _z8_p6ad_handler
- xdef _z8_p5ad_handler
- xdef _z8_p4ad_handler
- xdef _z8_p3ad_handler
- xdef _z8_p2ad_handler
- xdef _z8_p1ad_handler
- xdef _z8_p0ad_handler
-if EZ8_MCT=1
- xdef _z8_mct_handler
-endif
-if EZ8_UART1=1
- xdef _z8_uart1rx_handler
- xdef _z8_uart1tx_handler
-endif
- xdef _z8_c3_handler
- xdef _z8_c2_handler
- xdef _z8_c1_handler
- xdef _z8_c0_handler
- xdef _z8_potrap_handler
- xdef _z8_wotrap_handler
-
-/**************************************************************************/
-
-#elif defined(ENCORE_MC_VECTORS)
-
- xdef _z8_wdt_handler
- xdef _z8_trap_handler
- xdef _z8_pwmtimer_handler
- xdef _z8_pwmfault_handler
-if EZ8_ADC_NEW=1
- xdef _z8_adc_handler
-endif
- xdef _z8_cmp_handler
- xdef _z8_timer0_handler
-if EZ8_UART0
- xdef _z8_uart0rx_handler
- xdef _z8_uart0tx_handler
-endif
-if EZ8_SPI=1
- xdef _z8_spi_handler
-endif
-if EZ8_I2C=1
- xdef _z8_i2c_handler
-endif
- xdef _z8_c0_handler
- xdef _z8_pb_handler
- xdef _z8_p7ap3a_handler
- xdef _z8_p6ap2a_handler
- xdef _z8_p5ap1a_handler
- xdef _z8_p4ap0a_handler
- xdef _z8_potrap_handler
- xdef _z8_wotrap_handler
-#endif
-
-/**************************************************************************
- * Macros
- **************************************************************************/
-
-ENTER : MACRO val
- pushx rp /* Save the current RP value in the stack */
- srp #%f0 /* Load the interrupt register pointer */
- ld r0, #val /* Pass the new value in r0 */
- jr _z8_common_handler /* The rest of the handling is common */
- ENDMAC ENTER
-
-LEAVE : MACRO
- popx rp /* Restore the user register pointer */
- iret /* And return from interrupt */
- ENDMAC LEAVE
-
-/**************************************************************************
- * Code
- **************************************************************************/
-
- segment CODE
-
-/**************************************************************************
- * Interrupt Vectors
- **************************************************************************/
-
-#if defined(ENCORE_VECTORS)
- vector WDT = _z8_wdt_handler
- vector TRAP = _z8_trap_handler
-if EZ8_TIMER3=1
- vector TIMER2 = _z8_timer2_handler
-endif
- vector TIMER1 = _z8_timer1_handler
- vector TIMER0 = _z8_timer0_handler
-if EZ8_UART0=1
- vector UART0_RX = _z8_uart0rx_handler
- vector UART0_TX = _z8_uart0tx_handler
-endif
-if EZ8_I2C=1
- vector I2C = _z8_i2c_handler
-endif
-if EZ8_SPI=1
- vector SPI = _z8_spi_handler
-endif
-if EZ8_ADC=1
- vector ADC = _z8_adc_handler
-endif
- vector P7AD = _z8_p7ad_handler
- vector P6AD = _z8_p6ad_handler
- vector P5AD = _z8_p5ad_handler
- vector P4AD = _z8_p4ad_handler
- vector P3AD = _z8_p3ad_handler
- vector P2AD = _z8_p2ad_handler
- vector P1AD = _z8_p1ad_handler
- vector P0AD = _z8_p0ad_handler
-if EZ8_TIMER4=1
- vector TIMER3 = _z8_timer3_handler
-endif
-if EZ8_UART1=1
- vector UART1_RX = _z8_uart1rx_handler
- vector UART1_TX = _z8_uart1tx_handler
-endif
-if EZ8_DMA=1
- vector DMA = _z8_dma_handler
-endif
-if EZ8_PORT1=0
- vector C3 = _z8_c3_handler
- vector C2 = _z8_c2_handler
- vector C1 = _z8_c1_handler
- vector C0 = _z8_c0_handler
-endif
-
-/**************************************************************************/
-
-#elif defined(ENCORE_XP_VECTORS)
-
- vector WDT = _z8_wdt_handler
- vector TRAP = _z8_trap_handler
-if EZ8_TIMER3=1
- vector TIMER2 = _z8_timer2_handler
-endif
- vector TIMER1 = _z8_timer1_handler
- vector TIMER0 = _z8_timer0_handler
-if EZ8_UART0=1
- vector UART0_RX = _z8_uart0rx_handler
- vector UART0_TX = _z8_uart0tx_handler
-endif
-if EZ8_I2C=1
- vector I2C = _z8_i2c_handler
-endif
-if EZ8_SPI=1
- vector SPI = _z8_spi_handler
-endif
-if (EZ8_ADC=1) || (EZ8_ADC_NEW=1)
- vector ADC = _z8_adc_handler
-endif
- vector P7AD = _z8_p7ad_handler
- vector P6AD = _z8_p6ad_handler
- vector P5AD = _z8_p5ad_handler
- vector P4AD = _z8_p4ad_handler
- vector P3AD = _z8_p3ad_handler
- vector P2AD = _z8_p2ad_handler
- vector P1AD = _z8_p1ad_handler
- vector P0AD = _z8_p0ad_handler
-if EZ8_TIMER4=1
- vector TIMER3 = _z8_timer3_handler
-endif
-if EZ8_UART1=1
- vector UART1_RX = _z8_uart1rx_handler
- vector UART1_TX = _z8_uart1tx_handler
-endif
-if EZ8_DMA=1
- vector DMA = _z8_dma_handler
-endif
-if EZ8_PORT1=0
- vector C3 = _z8_c3_handler
- vector C2 = _z8_c2_handler
- vector C1 = _z8_c1_handler
- vector C0 = _z8_c0_handler
-endif
- vector POTRAP = _z8_potrap_handler
- vector WOTRAP = _z8_wotrap_handler
-
-/**************************************************************************/
-
-#elif defined(ENCORE_XP16K_VECTORS)
-
- vector WDT = _z8_wdt_handler
- vector TRAP = _z8_trap_handler
-if EZ8_TIMER3=1
- vector TIMER2 = _z8_timer2_handler
-endif
- vector TIMER1 = _z8_timer1_handler
- vector TIMER0 = _z8_timer0_handler
-if EZ8_UART0=1
- vector UART0_RX = _z8_uart0rx_handler
- vector UART0_TX = _z8_uart0tx_handler
-endif
-if EZ8_I2C=1
- vector I2C = _z8_i2c_handler
-endif
-if EZ8_ESPI=1
- vector SPI = _z8_spi_handler
-endif
-if EZ8_ADC_NEW=1
- vector ADC = _z8_adc_handler
-endif
- vector P7AD = _z8_p7ad_handler
- vector P6AD = _z8_p6ad_handler
- vector P5AD = _z8_p5ad_handler
- vector P4AD = _z8_p4ad_handler
- vector P3AD = _z8_p3ad_handler
- vector P2AD = _z8_p2ad_handler
- vector P1AD = _z8_p1ad_handler
- vector P0AD = _z8_p0ad_handler
-if EZ8_MCT=1
- vector MCT = _z8_mct_handler
-endif
-if EZ8_UART1=1
- vector UART1_RX = _z8_uart1rx_handler
- vector UART1_TX = _z8_uart1tx_handler
-endif
- vector C3 = _z8_c3_handler
- vector C2 = _z8_c2_handler
- vector C1 = _z8_c1_handler
- vector C0 = _z8_c0_handler
- vector POTRAP = _z8_potrap_handler
- vector WOTRAP = _z8_wotrap_handler
-
-/**************************************************************************/
-
-#elif defined(ENCORE_MC_VECTORS)
-
- vector WDT = _z8_wdt_handler
- vector TRAP = _z8_trap_handler
- vector PWMTIMER = _z8_pwmtimer_handler
- vector PWMFAULT = _z8_pwmfault_handler
-if EZ8_ADC_NEW=1
- vector ADC = _z8_adc_handler
-endif
- vector CMP = _z8_cmp_handler
- vector TIMER0 = _z8_timer0_handler
-if EZ8_UART0
- vector UART0_RX = _z8_uart0rx_handler
- vector UART0_TX = _z8_uart0tx_handler
-endif
-if EZ8_SPI=1
- vector SPI = _z8_spi_handler
-endif
-if EZ8_I2C=1
- vector I2C = _z8_i2c_handler
-endif
- vector C0 = _z8_c0_handler
- vector PB = _z8_pb_handler
- vector P7A = _z8_p7ap3a_handler
- vector P6A = _z8_p6ap2a_handler
- vector P5A = _z8_p5ap1a_handler
- vector P4A = _z8_p4ap0a_handler
- vector POTRAP = _z8_potrap_handler
- vector WOTRAP = _z8_wotrap_handler
-#endif
-
-/**************************************************************************
- * Name: _z16f_*_handler
- *
- * Description:
- * Map individual interrupts into interrupt number and branch to common
- * interrupt handling logic. If higher interrupt handling performance
- * for particular interrupts is required, then those interrupts should
- * be picked off here and handled outside of the common logic.
- *
- * On entry to any of these handlers, the stack contains the following:
- *
- * TOS before interrupt
- * PC[7:0]
- * PC[15:8]
- * SP -> Flags Register
- *
- **************************************************************************/
-
-#if defined(ENCORE_VECTORS)
-_z8_wdt_handler:
- ENTER(Z8_WDT_IRQ)
-_z8_trap_handler:
- ENTER(Z8_TRAP_IRQ)
-if EZ8_TIMER3=1
-_z8_timer2_handler:
- ENTER(Z8_TIMER2_IRQ)
-endif
-_z8_timer1_handler:
- ENTER(Z8_TIMER1_IRQ)
-_z8_timer0_handler:
- ENTER(Z8_TIMER0_IRQ)
-if EZ8_UART0=1
-_z8_uart0rx_handler:
- ENTER(Z8_UART0_RX_IRQ)
-_z8_uart0tx_handler:
- ENTER(Z8_UART0_TX_IRQ)
-endif
-if EZ8_I2C=1
-_z8_i2c_handler:
- ENTER(Z8_I2C_IRQ)
-endif
-if EZ8_SPI=1
-_z8_spi_handler:
- ENTER(Z8_SPI_IRQ)
-endif
-if EZ8_ADC=1
-_z8_adc_handler:
- ENTER(Z8_ADC_IRQ)
-endif
-_z8_p7ad_handler:
- ENTER(Z8_P7AD_IRQ)
-_z8_p6ad_handler:
- ENTER(Z8_P6AD_IRQ)
-_z8_p5ad_handler:
- ENTER(Z8_P5AD_IRQ)
-_z8_p4ad_handler:
- ENTER(Z8_P4AD_IRQ)
-_z8_p3ad_handler:
- ENTER(Z8_P3AD_IRQ)
-_z8_p2ad_handler:
- ENTER(Z8_P2AD_IRQ)
-_z8_p1ad_handler:
- ENTER(Z8_P1AD_IRQ)
-_z8_p0ad_handler:
- ENTER(Z8_P0AD_IRQ)
-if EZ8_TIMER4=1
-_z8_timer3_handler:
- ENTER(Z8_TIMER3_IRQ)
-endif
-if EZ8_UART1=1
-_z8_uart1rx_handler:
- ENTER(Z8_UART1_RX_IRQ)
-_z8_uart1tx_handler:
- ENTER(Z8_UART1_TX_IRQ)
-endif
-if EZ8_DMA=1
-_z8_dma_handler:
- ENTER(Z8_DMA_IRQ)
-endif
-if EZ8_PORT1=0
-_z8_c3_handler:
- ENTER(Z8_C3_IRQ)
-_z8_c2_handler:
- ENTER(Z8_C2_IRQ)
-_z8_c1_handler:
- ENTER(Z8_C1_IRQ)
-_z8_c0_handler:
- ENTER(Z8_C0_IRQ)
-endif
-
-/**************************************************************************/
-
-#elif defined(ENCORE_XP_VECTORS)
-
-_z8_wdt_handler:
- ENTER(Z8_WDT_IRQ)
-_z8_trap_handler:
- ENTER(Z8_TRAP_IRQ)
-if EZ8_TIMER3=1
-_z8_timer2_handler:
- ENTER(Z8_TIMER2_IRQ)
-endif
-_z8_timer1_handler:
- ENTER(Z8_TIMER1_IRQ)
-_z8_timer0_handler:
- ENTER(Z8_TIMER0_IRQ)
-if EZ8_UART0=1
-_z8_uart0rx_handler:
- ENTER(Z8_UART0_RX_IRQ)
-_z8_uart0tx_handler:
- ENTER(Z8_UART0_TX_IRQ)
-endif
-if EZ8_I2C=1
-_z8_i2c_handler:
- ENTER(Z8_I2C_IRQ)
-endif
-if EZ8_SPI=1
-_z8_spi_handler:
- ENTER(Z8_SPI_IRQ)
-endif
-if (EZ8_ADC=1) || (EZ8_ADC_NEW=1)
-_z8_adc_handler:
- ENTER(Z8_ADC_IRQ)
-endif
-_z8_p7ad_handler:
- ENTER(Z8_P7AD_IRQ)
-_z8_p6ad_handler:
- ENTER(Z8_P6AD_IRQ)
-_z8_p5ad_handler:
- ENTER(Z8_P5AD_IRQ)
-_z8_p4ad_handler:
- ENTER(Z8_P4AD_IRQ)
-_z8_p3ad_handler:
- ENTER(Z8_P3AD_IRQ)
-_z8_p2ad_handler:
- ENTER(Z8_P2AD_IRQ)
-_z8_p1ad_handler:
- ENTER(Z8_P1AD_IRQ)
-_z8_p0ad_handler:
- ENTER(Z8_P0AD_IRQ)
-if EZ8_TIMER4=1
-_z8_timer3_handler:
- ENTER(Z8_TIMER3_IRQ)
-endif
-if EZ8_UART1=1
-_z8_uart1rx_handler:
- ENTER(Z8_UART1_RX_IRQ)
-_z8_uart1tx_handler:
- ENTER(Z8_UART1_TX_IRQ)
-endif
-if EZ8_DMA=1
-_z8_dma_handler:
- ENTER(Z8_DMA_IRQ)
-endif
-if EZ8_PORT1=0
-_z8_c3_handler:
- ENTER(Z8_C3_IRQ)
-_z8_c2_handler:
- ENTER(Z8_C2_IRQ)
-_z8_c1_handler:
- ENTER(Z8_C1_IRQ)
-_z8_c0_handler:
- ENTER(Z8_C0_IRQ)
-endif
-_z8_potrap_handler:
- ENTER(Z8_POTRAP_IRQ)
-_z8_wotrap_handler:
- ENTER(Z8_WOTRAP_IRQ)
-
-/**************************************************************************/
-
-#elif defined(ENCORE_XP16K_VECTORS)
-
-_z8_wdt_handler:
- ENTER(Z8_WDT_IRQ)
-_z8_trap_handler:
- ENTER(Z8_TRAP_IRQ)
-if EZ8_TIMER3=1
-_z8_timer2_handler:
- ENTER(Z8_TIMER2_IRQ)
-endif
-_z8_timer1_handler:
- ENTER(Z8_TIMER1_IRQ)
-_z8_timer0_handler:
- ENTER(Z8_TIMER0_IRQ)
-if EZ8_UART0=1
-_z8_uart0rx_handler:
- ENTER(Z8_UART0_RX_IRQ)
-_z8_uart0tx_handler:
- ENTER(Z8_UART0_TX_IRQ)
-endif
-if EZ8_I2C=1
-_z8_i2c_handler:
- ENTER(Z8_I2C_IRQ)
-endif
-if EZ8_ESPI=1
-_z8_spi_handler:
- ENTER(Z8_SPI_IRQ)
-endif
-if EZ8_ADC_NEW=1
-_z8_adc_handler:
- ENTER(Z8_ADC_IRQ)
-endif
-_z8_p7ad_handler:
- ENTER(Z8_P7AD_IRQ)
-_z8_p6ad_handler:
- ENTER(Z8_P6AD_IRQ)
-_z8_p5ad_handler:
- ENTER(Z8_P5AD_IRQ)
-_z8_p4ad_handler:
- ENTER(Z8_P4AD_IRQ)
-_z8_p3ad_handler:
- ENTER(Z8_P3AD_IRQ)
-_z8_p2ad_handler:
- ENTER(Z8_P2AD_IRQ)
-_z8_p1ad_handler:
- ENTER(Z8_P1AD_IRQ)
-_z8_p0ad_handler:
- ENTER(Z8_P0AD_IRQ)
-if EZ8_MCT=1
-_z8_mct_handler:
- ENTER(Z8_MCT_IRQ)
-endif
-if EZ8_UART1=1
-_z8_uart1rx_handler:
- ENTER(Z8_UART1_RX_IRQ)
-_z8_uart1tx_handler:
- ENTER(Z8_UART1_TX_IRQ)
-endif
-_z8_c3_handler:
- ENTER(Z8_C3_IRQ)
-_z8_c2_handler:
- ENTER(Z8_C2_IRQ)
-_z8_c1_handler:
- ENTER(Z8_C1_IRQ)
-_z8_c0_handler:
- ENTER(Z8_C0_IRQ)
-_z8_potrap_handler:
- ENTER(Z8_POTRAP_IRQ)
-_z8_wotrap_handler:
- ENTER(Z8_WOTRAP_IRQ)
-
-/**************************************************************************/
-
-#elif defined(ENCORE_MC_VECTORS)
-
-_z8_wdt_handler:
- ENTER(Z8_WDT_IRQ)
-_z8_trap_handler:
- ENTER(Z8_TRAP_IRQ)
-_z8_pwmtimer_handler:
- ENTER(Z8_PWMTIMER_IRQ)
-_z8_pwmfault_handler:
- ENTER(Z8_PWMFAULT_IRQ)
-if EZ8_ADC_NEW=1
-_z8_adc_handler:
- ENTER(Z8_ADC_IRQ)
-endif
-_z8_cmp_handler:
- ENTER(Z8_CMP_IRQ)
-_z8_timer0_handler:
- ENTER(Z8_TIMER0_IRQ)
-if EZ8_UART0
-_z8_uart0rx_handler:
- ENTER(Z8_UART0_RX_IRQ)
-_z8_uart0tx_handler:
- ENTER(Z8_UART0_TX_IRQ)
-endif
-if EZ8_SPI=1
-_z8_spi_handler:
- ENTER(Z8_SPI_IRQ)
-endif
-if EZ8_I2C=1
-_z8_i2c_handler:
- ENTER(Z8_I2C_IRQ)
-endif
-_z8_c0_handler:
- ENTER(Z8_C0_IRQ)
-_z8_pb_handler:
- ENTER(Z8_PB_IRQ)
-_z8_p7ap3a_handler:
- ENTER(Z8_P7A_IRQ)
-_z8_p6ap2a_handler:
- ENTER(Z8_P6AP2A_IRQ)
-_z8_p5ap1a_handler:
- ENTER(Z8_P5AP1A_IRQ)
-_z8_p4ap0a_handler:
- ENTER(Z8_P4AP0A_IRQ)
-_z8_potrap_handler:
- ENTER(Z8_POTRAP_IRQ)
-_z8_wotrap_handler:
- ENTER(Z8_WOTRAP_IRQ)
-#endif
-
-/**************************************************************************
- * Name: _z16f_common_handler
- *
- * Description:
- * Common IRQ handling logic
- *
- * On entry, the stack contains the following:
- *
- * TOS before interrupt
- * PC[7:0]
- * PC[15:8]
- * Flags Register
- * SP -> RP
- *
- * R0 holds the IRQ number and the RP has been reset to %f0
- *
- **************************************************************************/
-
-_z8_common_handler:
- /* Pass the address of the IRQ stack frame */
-
- ldx r2, sph /* rr2 = stack pointer */
- ldx r3, spl
- push r3 /* Pass as a parameter */
- push r2
-
- /* Pass the IRQ number */
-
- push r0
-
- /* Process the interrupt */
-
- call _up_doirq /* Call the IRQ handler */
-
- /* Release arguments from the stack */
-
- pop r4 /* Discard the IRQ argument */
- pop r2 /* Recover the stack pointer parameter */
- pop r3
-
- /* If a interrupt level context switch occurred, then the
- * return value will be the same as the input value
- */
-
- cp r0, r2 /* Same as the return value? */
- jr nz, _z8_switch
- cp r1, r3
- jr z, _z8_noswitch
-
- /* A context switch occurs. Restore the use context.
- * rr0 = pointer to context structgure.
- */
-
-_z8_switch:
-
- /* Destroy the interrupt return information on the stack */
-
- pop r4 /* Destroy saved RP */
- pop r4 /* Destroy saved flags */
- pop r4 /* Destroy saved return address */
- pop r4
-
- /* Copy all registers into the user register area. */
-
- clr r2 /* rr2 = destination address */
- ldx r3, XCPT_RP_OFFS(rr0)
- ld r4, r0 /* rr4 = source address */
- ld r5, r1
- ld r6, #16 /* r6 = number of bytes to copy */
-
-_z8_restore:
- ldx r7, @rr4
- ldx @rr2, r7
- incw rr2
- incw rr4
- djnz r6, _z8_restore
-
- /* Set the new stack pointer */
-
- ldx r2, XCPT_SPH_OFFS(rr0)
- ldx r3, XCPT_SPL_OFFS(rr0)
- ldx sph, r2
- ldx spl, r3
-
- /* Push the return address onto the stack */
-
- ldx r2, XCPT_PCH_OFFS(rr0)
- ldx r3, XCPT_PCL_OFFS(rr0)
- push r3
- push r2
-
- /* Recover the flags and RP settings.. but don't restore them yet */
-
- ldx r3, XCPT_FLAGS_OFFS(rr0)
- ldx r4, XCPT_RP_OFFS(rr0)
-
- /* Determine whether interrupts must be enabled on return. This
- * would be nicer to do below, but later we will need to preserve
- * the condition codes in the flags.
- */
-
- ldx r2, XCPT_IRQCTL_OFFS(rr0)
- tm r2, #%80
- jr nz, _z8_returnenabled
-
- /* Restore the flag settings */
-
- ldx flags, r3
-
- /* Restore the user register page and return with interrupts disabled.
- * Note that we cannot use the iret instruction because it unconditionally
- * re-enabled interrupts
- */
-
- ldx rp, r4 /* Does not effect flags */
- ret /* Does not effect flags */
-
-_z8_returnenabled:
- /* Restore the flag settings */
-
- ldx flags, r1
-
- /* Restore the user register page, re-enable interrupts and return.
- * Note that we cannot use the iret instruction because it unconditionally
- * re-enabled interrupts
- */
-
- ldx rp, r4 /* Does not effect flags */
- ei /* Does not effect flags */
- ret /* Does not effect flags */
-
-_z8_noswitch:
- LEAVE
-
-/**************************************************************************
- * Data
- **************************************************************************/
-
- /* Set aside area for interrupt registers */
-
- define interruptreg, space=rdata, org=%f0
- segment interruptreg
- ds %10
-
- end _z8_common_handler
+/************************************************************************** + * arch/z80/src/z8/z8_xdef.S + * Interrupt Handling + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS or IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER or CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, or CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS or SERVICES; LOSS + * OF USE, DATA, or PROFITS; or BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, or TORT (INCLUDING NEGLIGENCE or OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + **************************************************************************/ + +/************************************************************************** + * Included Files + **************************************************************************/ + +#include <nuttx/config.h> +#include <arch/irq.h> + +#include <ez8.inc> +#include <vect.inc> + +/************************************************************************** + * Definitions + **************************************************************************/ + +/************************************************************************** + * External References / External Definitions + **************************************************************************/ + + xref _up_doirq:ROM + +#if defined(ENCORE_VECTORS) + xdef _z8_wdt_handler + xdef _z8_trap_handler +if EZ8_TIMER3=1 + xdef _z8_timer2_handler +endif + xdef _z8_timer1_handler + xdef _z8_timer0_handler +if EZ8_UART0=1 + xdef _z8_uart0rx_handler + xdef _z8_uart0tx_handler +endif +if EZ8_I2C=1 + xdef _z8_i2c_handler +endif +if EZ8_SPI=1 + xdef _z8_spi_handler +endif +if EZ8_ADC=1 + xdef _z8_adc_handler +endif + xdef _z8_p7ad_handler + xdef _z8_p6ad_handler + xdef _z8_p5ad_handler + xdef _z8_p4ad_handler + xdef _z8_p3ad_handler + xdef _z8_p2ad_handler + xdef _z8_p1ad_handler + xdef _z8_p0ad_handler +if EZ8_TIMER4=1 + xdef _z8_timer3_handler +endif +if EZ8_UART1=1 + xdef _z8_uart1rx_handler + xdef _z8_uart1tx_handler +endif +if EZ8_DMA=1 + xdef _z8_dma_handler +endif +if EZ8_PORT1=0 + xdef _z8_c3_handler + xdef _z8_c2_handler + xdef _z8_c1_handler + xdef _z8_c0_handler +endif + +/**************************************************************************/ + +#elif defined(ENCORE_XP_VECTORS) + + xdef _z8_wdt_handler + xdef _z8_trap_handler +if EZ8_TIMER3=1 + xdef _z8_timer2_handler +endif + xdef _z8_timer1_handler + xdef _z8_timer0_handler +if EZ8_UART0=1 + xdef _z8_uart0rx_handler + xdef _z8_uart0tx_handler +endif +if EZ8_I2C=1 + xdef _z8_i2c_handler +endif +if EZ8_SPI=1 + xdef _z8_spi_handler +endif +if (EZ8_ADC=1) || (EZ8_ADC_NEW=1) + xdef _z8_adc_handler +endif + xdef _z8_p7ad_handler + xdef _z8_p6ad_handler + xdef _z8_p5ad_handler + xdef _z8_p4ad_handler + xdef _z8_p3ad_handler + xdef _z8_p2ad_handler + xdef _z8_p1ad_handler + xdef _z8_p0ad_handler +if EZ8_TIMER4=1 + xdef _z8_timer3_handler +endif +if EZ8_UART1=1 + xdef _z8_uart1rx_handler + xdef _z8_uart1tx_handler +endif +if EZ8_DMA=1 + xdef _z8_dma_handler +endif +if (EZ8_PORT1=0) + xdef _z8_c3_handler + xdef _z8_c2_handler + xdef _z8_c1_handler + xdef _z8_c0_handler +endif + xdef _z8_potrap_handler + xdef _z8_wotrap_handler + +/**************************************************************************/ + +#elif defined(ENCORE_XP16K_VECTORS) + + xdef _z8_wdt_handler + xdef _z8_trap_handler +if EZ8_TIMER3=1 + xdef _z8_timer2_handler +endif + xdef _z8_timer1_handler + xdef _z8_timer0_handler +if EZ8_UART0=1 + xdef _z8_uart0rx_handler + xdef _z8_uart0tx_handler +endif +if EZ8_I2C=1 + xdef _z8_i2c_handler +endif +if EZ8_ESPI=1 + xdef _z8_spi_handler +endif +if EZ8_ADC_NEW=1 + xdef _z8_adc_handler +endif + xdef _z8_p7ad_handler + xdef _z8_p6ad_handler + xdef _z8_p5ad_handler + xdef _z8_p4ad_handler + xdef _z8_p3ad_handler + xdef _z8_p2ad_handler + xdef _z8_p1ad_handler + xdef _z8_p0ad_handler +if EZ8_MCT=1 + xdef _z8_mct_handler +endif +if EZ8_UART1=1 + xdef _z8_uart1rx_handler + xdef _z8_uart1tx_handler +endif + xdef _z8_c3_handler + xdef _z8_c2_handler + xdef _z8_c1_handler + xdef _z8_c0_handler + xdef _z8_potrap_handler + xdef _z8_wotrap_handler + +/**************************************************************************/ + +#elif defined(ENCORE_MC_VECTORS) + + xdef _z8_wdt_handler + xdef _z8_trap_handler + xdef _z8_pwmtimer_handler + xdef _z8_pwmfault_handler +if EZ8_ADC_NEW=1 + xdef _z8_adc_handler +endif + xdef _z8_cmp_handler + xdef _z8_timer0_handler +if EZ8_UART0 + xdef _z8_uart0rx_handler + xdef _z8_uart0tx_handler +endif +if EZ8_SPI=1 + xdef _z8_spi_handler +endif +if EZ8_I2C=1 + xdef _z8_i2c_handler +endif + xdef _z8_c0_handler + xdef _z8_pb_handler + xdef _z8_p7ap3a_handler + xdef _z8_p6ap2a_handler + xdef _z8_p5ap1a_handler + xdef _z8_p4ap0a_handler + xdef _z8_potrap_handler + xdef _z8_wotrap_handler +#endif + +/************************************************************************** + * Macros + **************************************************************************/ + +ENTER : MACRO val + pushx rp /* Save the current RP value in the stack */ + srp #%f0 /* Load the interrupt register pointer */ + ld r0, #val /* Pass the new value in r0 */ + jr _z8_common_handler /* The rest of the handling is common */ + ENDMAC ENTER + +LEAVE : MACRO + popx rp /* Restore the user register pointer */ + iret /* And return from interrupt */ + ENDMAC LEAVE + +/************************************************************************** + * Code + **************************************************************************/ + + segment CODE + +/************************************************************************** + * Interrupt Vectors + **************************************************************************/ + +#if defined(ENCORE_VECTORS) + vector WDT = _z8_wdt_handler + vector TRAP = _z8_trap_handler +if EZ8_TIMER3=1 + vector TIMER2 = _z8_timer2_handler +endif + vector TIMER1 = _z8_timer1_handler + vector TIMER0 = _z8_timer0_handler +if EZ8_UART0=1 + vector UART0_RX = _z8_uart0rx_handler + vector UART0_TX = _z8_uart0tx_handler +endif +if EZ8_I2C=1 + vector I2C = _z8_i2c_handler +endif +if EZ8_SPI=1 + vector SPI = _z8_spi_handler +endif +if EZ8_ADC=1 + vector ADC = _z8_adc_handler +endif + vector P7AD = _z8_p7ad_handler + vector P6AD = _z8_p6ad_handler + vector P5AD = _z8_p5ad_handler + vector P4AD = _z8_p4ad_handler + vector P3AD = _z8_p3ad_handler + vector P2AD = _z8_p2ad_handler + vector P1AD = _z8_p1ad_handler + vector P0AD = _z8_p0ad_handler +if EZ8_TIMER4=1 + vector TIMER3 = _z8_timer3_handler +endif +if EZ8_UART1=1 + vector UART1_RX = _z8_uart1rx_handler + vector UART1_TX = _z8_uart1tx_handler +endif +if EZ8_DMA=1 + vector DMA = _z8_dma_handler +endif +if EZ8_PORT1=0 + vector C3 = _z8_c3_handler + vector C2 = _z8_c2_handler + vector C1 = _z8_c1_handler + vector C0 = _z8_c0_handler +endif + +/**************************************************************************/ + +#elif defined(ENCORE_XP_VECTORS) + + vector WDT = _z8_wdt_handler + vector TRAP = _z8_trap_handler +if EZ8_TIMER3=1 + vector TIMER2 = _z8_timer2_handler +endif + vector TIMER1 = _z8_timer1_handler + vector TIMER0 = _z8_timer0_handler +if EZ8_UART0=1 + vector UART0_RX = _z8_uart0rx_handler + vector UART0_TX = _z8_uart0tx_handler +endif +if EZ8_I2C=1 + vector I2C = _z8_i2c_handler +endif +if EZ8_SPI=1 + vector SPI = _z8_spi_handler +endif +if (EZ8_ADC=1) || (EZ8_ADC_NEW=1) + vector ADC = _z8_adc_handler +endif + vector P7AD = _z8_p7ad_handler + vector P6AD = _z8_p6ad_handler + vector P5AD = _z8_p5ad_handler + vector P4AD = _z8_p4ad_handler + vector P3AD = _z8_p3ad_handler + vector P2AD = _z8_p2ad_handler + vector P1AD = _z8_p1ad_handler + vector P0AD = _z8_p0ad_handler +if EZ8_TIMER4=1 + vector TIMER3 = _z8_timer3_handler +endif +if EZ8_UART1=1 + vector UART1_RX = _z8_uart1rx_handler + vector UART1_TX = _z8_uart1tx_handler +endif +if EZ8_DMA=1 + vector DMA = _z8_dma_handler +endif +if EZ8_PORT1=0 + vector C3 = _z8_c3_handler + vector C2 = _z8_c2_handler + vector C1 = _z8_c1_handler + vector C0 = _z8_c0_handler +endif + vector POTRAP = _z8_potrap_handler + vector WOTRAP = _z8_wotrap_handler + +/**************************************************************************/ + +#elif defined(ENCORE_XP16K_VECTORS) + + vector WDT = _z8_wdt_handler + vector TRAP = _z8_trap_handler +if EZ8_TIMER3=1 + vector TIMER2 = _z8_timer2_handler +endif + vector TIMER1 = _z8_timer1_handler + vector TIMER0 = _z8_timer0_handler +if EZ8_UART0=1 + vector UART0_RX = _z8_uart0rx_handler + vector UART0_TX = _z8_uart0tx_handler +endif +if EZ8_I2C=1 + vector I2C = _z8_i2c_handler +endif +if EZ8_ESPI=1 + vector SPI = _z8_spi_handler +endif +if EZ8_ADC_NEW=1 + vector ADC = _z8_adc_handler +endif + vector P7AD = _z8_p7ad_handler + vector P6AD = _z8_p6ad_handler + vector P5AD = _z8_p5ad_handler + vector P4AD = _z8_p4ad_handler + vector P3AD = _z8_p3ad_handler + vector P2AD = _z8_p2ad_handler + vector P1AD = _z8_p1ad_handler + vector P0AD = _z8_p0ad_handler +if EZ8_MCT=1 + vector MCT = _z8_mct_handler +endif +if EZ8_UART1=1 + vector UART1_RX = _z8_uart1rx_handler + vector UART1_TX = _z8_uart1tx_handler +endif + vector C3 = _z8_c3_handler + vector C2 = _z8_c2_handler + vector C1 = _z8_c1_handler + vector C0 = _z8_c0_handler + vector POTRAP = _z8_potrap_handler + vector WOTRAP = _z8_wotrap_handler + +/**************************************************************************/ + +#elif defined(ENCORE_MC_VECTORS) + + vector WDT = _z8_wdt_handler + vector TRAP = _z8_trap_handler + vector PWMTIMER = _z8_pwmtimer_handler + vector PWMFAULT = _z8_pwmfault_handler +if EZ8_ADC_NEW=1 + vector ADC = _z8_adc_handler +endif + vector CMP = _z8_cmp_handler + vector TIMER0 = _z8_timer0_handler +if EZ8_UART0 + vector UART0_RX = _z8_uart0rx_handler + vector UART0_TX = _z8_uart0tx_handler +endif +if EZ8_SPI=1 + vector SPI = _z8_spi_handler +endif +if EZ8_I2C=1 + vector I2C = _z8_i2c_handler +endif + vector C0 = _z8_c0_handler + vector PB = _z8_pb_handler + vector P7A = _z8_p7ap3a_handler + vector P6A = _z8_p6ap2a_handler + vector P5A = _z8_p5ap1a_handler + vector P4A = _z8_p4ap0a_handler + vector POTRAP = _z8_potrap_handler + vector WOTRAP = _z8_wotrap_handler +#endif + +/************************************************************************** + * Name: _z16f_*_handler + * + * Description: + * Map individual interrupts into interrupt number and branch to common + * interrupt handling logic. If higher interrupt handling performance + * for particular interrupts is required, then those interrupts should + * be picked off here and handled outside of the common logic. + * + * On entry to any of these handlers, the stack contains the following: + * + * TOS before interrupt + * PC[7:0] + * PC[15:8] + * SP -> Flags Register + * + **************************************************************************/ + +#if defined(ENCORE_VECTORS) +_z8_wdt_handler: + ENTER(Z8_WDT_IRQ) +_z8_trap_handler: + ENTER(Z8_TRAP_IRQ) +if EZ8_TIMER3=1 +_z8_timer2_handler: + ENTER(Z8_TIMER2_IRQ) +endif +_z8_timer1_handler: + ENTER(Z8_TIMER1_IRQ) +_z8_timer0_handler: + ENTER(Z8_TIMER0_IRQ) +if EZ8_UART0=1 +_z8_uart0rx_handler: + ENTER(Z8_UART0_RX_IRQ) +_z8_uart0tx_handler: + ENTER(Z8_UART0_TX_IRQ) +endif +if EZ8_I2C=1 +_z8_i2c_handler: + ENTER(Z8_I2C_IRQ) +endif +if EZ8_SPI=1 +_z8_spi_handler: + ENTER(Z8_SPI_IRQ) +endif +if EZ8_ADC=1 +_z8_adc_handler: + ENTER(Z8_ADC_IRQ) +endif +_z8_p7ad_handler: + ENTER(Z8_P7AD_IRQ) +_z8_p6ad_handler: + ENTER(Z8_P6AD_IRQ) +_z8_p5ad_handler: + ENTER(Z8_P5AD_IRQ) +_z8_p4ad_handler: + ENTER(Z8_P4AD_IRQ) +_z8_p3ad_handler: + ENTER(Z8_P3AD_IRQ) +_z8_p2ad_handler: + ENTER(Z8_P2AD_IRQ) +_z8_p1ad_handler: + ENTER(Z8_P1AD_IRQ) +_z8_p0ad_handler: + ENTER(Z8_P0AD_IRQ) +if EZ8_TIMER4=1 +_z8_timer3_handler: + ENTER(Z8_TIMER3_IRQ) +endif +if EZ8_UART1=1 +_z8_uart1rx_handler: + ENTER(Z8_UART1_RX_IRQ) +_z8_uart1tx_handler: + ENTER(Z8_UART1_TX_IRQ) +endif +if EZ8_DMA=1 +_z8_dma_handler: + ENTER(Z8_DMA_IRQ) +endif +if EZ8_PORT1=0 +_z8_c3_handler: + ENTER(Z8_C3_IRQ) +_z8_c2_handler: + ENTER(Z8_C2_IRQ) +_z8_c1_handler: + ENTER(Z8_C1_IRQ) +_z8_c0_handler: + ENTER(Z8_C0_IRQ) +endif + +/**************************************************************************/ + +#elif defined(ENCORE_XP_VECTORS) + +_z8_wdt_handler: + ENTER(Z8_WDT_IRQ) +_z8_trap_handler: + ENTER(Z8_TRAP_IRQ) +if EZ8_TIMER3=1 +_z8_timer2_handler: + ENTER(Z8_TIMER2_IRQ) +endif +_z8_timer1_handler: + ENTER(Z8_TIMER1_IRQ) +_z8_timer0_handler: + ENTER(Z8_TIMER0_IRQ) +if EZ8_UART0=1 +_z8_uart0rx_handler: + ENTER(Z8_UART0_RX_IRQ) +_z8_uart0tx_handler: + ENTER(Z8_UART0_TX_IRQ) +endif +if EZ8_I2C=1 +_z8_i2c_handler: + ENTER(Z8_I2C_IRQ) +endif +if EZ8_SPI=1 +_z8_spi_handler: + ENTER(Z8_SPI_IRQ) +endif +if (EZ8_ADC=1) || (EZ8_ADC_NEW=1) +_z8_adc_handler: + ENTER(Z8_ADC_IRQ) +endif +_z8_p7ad_handler: + ENTER(Z8_P7AD_IRQ) +_z8_p6ad_handler: + ENTER(Z8_P6AD_IRQ) +_z8_p5ad_handler: + ENTER(Z8_P5AD_IRQ) +_z8_p4ad_handler: + ENTER(Z8_P4AD_IRQ) +_z8_p3ad_handler: + ENTER(Z8_P3AD_IRQ) +_z8_p2ad_handler: + ENTER(Z8_P2AD_IRQ) +_z8_p1ad_handler: + ENTER(Z8_P1AD_IRQ) +_z8_p0ad_handler: + ENTER(Z8_P0AD_IRQ) +if EZ8_TIMER4=1 +_z8_timer3_handler: + ENTER(Z8_TIMER3_IRQ) +endif +if EZ8_UART1=1 +_z8_uart1rx_handler: + ENTER(Z8_UART1_RX_IRQ) +_z8_uart1tx_handler: + ENTER(Z8_UART1_TX_IRQ) +endif +if EZ8_DMA=1 +_z8_dma_handler: + ENTER(Z8_DMA_IRQ) +endif +if EZ8_PORT1=0 +_z8_c3_handler: + ENTER(Z8_C3_IRQ) +_z8_c2_handler: + ENTER(Z8_C2_IRQ) +_z8_c1_handler: + ENTER(Z8_C1_IRQ) +_z8_c0_handler: + ENTER(Z8_C0_IRQ) +endif +_z8_potrap_handler: + ENTER(Z8_POTRAP_IRQ) +_z8_wotrap_handler: + ENTER(Z8_WOTRAP_IRQ) + +/**************************************************************************/ + +#elif defined(ENCORE_XP16K_VECTORS) + +_z8_wdt_handler: + ENTER(Z8_WDT_IRQ) +_z8_trap_handler: + ENTER(Z8_TRAP_IRQ) +if EZ8_TIMER3=1 +_z8_timer2_handler: + ENTER(Z8_TIMER2_IRQ) +endif +_z8_timer1_handler: + ENTER(Z8_TIMER1_IRQ) +_z8_timer0_handler: + ENTER(Z8_TIMER0_IRQ) +if EZ8_UART0=1 +_z8_uart0rx_handler: + ENTER(Z8_UART0_RX_IRQ) +_z8_uart0tx_handler: + ENTER(Z8_UART0_TX_IRQ) +endif +if EZ8_I2C=1 +_z8_i2c_handler: + ENTER(Z8_I2C_IRQ) +endif +if EZ8_ESPI=1 +_z8_spi_handler: + ENTER(Z8_SPI_IRQ) +endif +if EZ8_ADC_NEW=1 +_z8_adc_handler: + ENTER(Z8_ADC_IRQ) +endif +_z8_p7ad_handler: + ENTER(Z8_P7AD_IRQ) +_z8_p6ad_handler: + ENTER(Z8_P6AD_IRQ) +_z8_p5ad_handler: + ENTER(Z8_P5AD_IRQ) +_z8_p4ad_handler: + ENTER(Z8_P4AD_IRQ) +_z8_p3ad_handler: + ENTER(Z8_P3AD_IRQ) +_z8_p2ad_handler: + ENTER(Z8_P2AD_IRQ) +_z8_p1ad_handler: + ENTER(Z8_P1AD_IRQ) +_z8_p0ad_handler: + ENTER(Z8_P0AD_IRQ) +if EZ8_MCT=1 +_z8_mct_handler: + ENTER(Z8_MCT_IRQ) +endif +if EZ8_UART1=1 +_z8_uart1rx_handler: + ENTER(Z8_UART1_RX_IRQ) +_z8_uart1tx_handler: + ENTER(Z8_UART1_TX_IRQ) +endif +_z8_c3_handler: + ENTER(Z8_C3_IRQ) +_z8_c2_handler: + ENTER(Z8_C2_IRQ) +_z8_c1_handler: + ENTER(Z8_C1_IRQ) +_z8_c0_handler: + ENTER(Z8_C0_IRQ) +_z8_potrap_handler: + ENTER(Z8_POTRAP_IRQ) +_z8_wotrap_handler: + ENTER(Z8_WOTRAP_IRQ) + +/**************************************************************************/ + +#elif defined(ENCORE_MC_VECTORS) + +_z8_wdt_handler: + ENTER(Z8_WDT_IRQ) +_z8_trap_handler: + ENTER(Z8_TRAP_IRQ) +_z8_pwmtimer_handler: + ENTER(Z8_PWMTIMER_IRQ) +_z8_pwmfault_handler: + ENTER(Z8_PWMFAULT_IRQ) +if EZ8_ADC_NEW=1 +_z8_adc_handler: + ENTER(Z8_ADC_IRQ) +endif +_z8_cmp_handler: + ENTER(Z8_CMP_IRQ) +_z8_timer0_handler: + ENTER(Z8_TIMER0_IRQ) +if EZ8_UART0 +_z8_uart0rx_handler: + ENTER(Z8_UART0_RX_IRQ) +_z8_uart0tx_handler: + ENTER(Z8_UART0_TX_IRQ) +endif +if EZ8_SPI=1 +_z8_spi_handler: + ENTER(Z8_SPI_IRQ) +endif +if EZ8_I2C=1 +_z8_i2c_handler: + ENTER(Z8_I2C_IRQ) +endif +_z8_c0_handler: + ENTER(Z8_C0_IRQ) +_z8_pb_handler: + ENTER(Z8_PB_IRQ) +_z8_p7ap3a_handler: + ENTER(Z8_P7A_IRQ) +_z8_p6ap2a_handler: + ENTER(Z8_P6AP2A_IRQ) +_z8_p5ap1a_handler: + ENTER(Z8_P5AP1A_IRQ) +_z8_p4ap0a_handler: + ENTER(Z8_P4AP0A_IRQ) +_z8_potrap_handler: + ENTER(Z8_POTRAP_IRQ) +_z8_wotrap_handler: + ENTER(Z8_WOTRAP_IRQ) +#endif + +/************************************************************************** + * Name: _z16f_common_handler + * + * Description: + * Common IRQ handling logic + * + * On entry, the stack contains the following: + * + * TOS before interrupt + * PC[7:0] + * PC[15:8] + * Flags Register + * SP -> RP + * + * R0 holds the IRQ number and the RP has been reset to %f0 + * + **************************************************************************/ + +_z8_common_handler: + /* Pass the address of the IRQ stack frame */ + + ldx r2, sph /* rr2 = stack pointer */ + ldx r3, spl + push r3 /* Pass as a parameter */ + push r2 + + /* Pass the IRQ number */ + + push r0 + + /* Process the interrupt */ + + call _up_doirq /* Call the IRQ handler */ + + /* Release arguments from the stack */ + + pop r4 /* Discard the IRQ argument */ + pop r2 /* Recover the stack pointer parameter */ + pop r3 + + /* If a interrupt level context switch occurred, then the + * return value will be the same as the input value + */ + + cp r0, r2 /* Same as the return value? */ + jr nz, _z8_switch + cp r1, r3 + jr z, _z8_noswitch + + /* A context switch occurs. Restore the use context. + * rr0 = pointer to context structgure. + */ + +_z8_switch: + + /* Destroy the interrupt return information on the stack */ + + pop r4 /* Destroy saved RP */ + pop r4 /* Destroy saved flags */ + pop r4 /* Destroy saved return address */ + pop r4 + + /* Copy all registers into the user register area. */ + + clr r2 /* rr2 = destination address */ + ldx r3, XCPT_RP_OFFS(rr0) + ld r4, r0 /* rr4 = source address */ + ld r5, r1 + ld r6, #16 /* r6 = number of bytes to copy */ + +_z8_restore: + ldx r7, @rr4 + ldx @rr2, r7 + incw rr2 + incw rr4 + djnz r6, _z8_restore + + /* Set the new stack pointer */ + + ldx r2, XCPT_SPH_OFFS(rr0) + ldx r3, XCPT_SPL_OFFS(rr0) + ldx sph, r2 + ldx spl, r3 + + /* Push the return address onto the stack */ + + ldx r2, XCPT_PCH_OFFS(rr0) + ldx r3, XCPT_PCL_OFFS(rr0) + push r3 + push r2 + + /* Recover the flags and RP settings.. but don't restore them yet */ + + ldx r3, XCPT_FLAGS_OFFS(rr0) + ldx r4, XCPT_RP_OFFS(rr0) + + /* Determine whether interrupts must be enabled on return. This + * would be nicer to do below, but later we will need to preserve + * the condition codes in the flags. + */ + + ldx r2, XCPT_IRQCTL_OFFS(rr0) + tm r2, #%80 + jr nz, _z8_returnenabled + + /* Restore the flag settings */ + + ldx flags, r3 + + /* Restore the user register page and return with interrupts disabled. + * Note that we cannot use the iret instruction because it unconditionally + * re-enabled interrupts + */ + + ldx rp, r4 /* Does not effect flags */ + ret /* Does not effect flags */ + +_z8_returnenabled: + /* Restore the flag settings */ + + ldx flags, r1 + + /* Restore the user register page, re-enable interrupts and return. + * Note that we cannot use the iret instruction because it unconditionally + * re-enabled interrupts + */ + + ldx rp, r4 /* Does not effect flags */ + ei /* Does not effect flags */ + ret /* Does not effect flags */ + +_z8_noswitch: + LEAVE + +/************************************************************************** + * Data + **************************************************************************/ + + /* Set aside area for interrupt registers */ + + define interruptreg, space=rdata, org=%f0 + segment interruptreg + ds %10 + + end _z8_common_handler diff --git a/nuttx/arch/z80/src/z80/Make.defs b/nuttx/arch/z80/src/z80/Make.defs index 01564f059..4f8c291c4 100644 --- a/nuttx/arch/z80/src/z80/Make.defs +++ b/nuttx/arch/z80/src/z80/Make.defs @@ -2,7 +2,7 @@ # arch/z80/src/z80/Make.defs # # Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt <spudmonkey@racsa.co.cr> +# Author: Gregory Nutt <gnutt@nuttx.org> # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/chip.h b/nuttx/arch/z80/src/z80/chip.h index 5874f733b..e80b2b231 100644 --- a/nuttx/arch/z80/src/z80/chip.h +++ b/nuttx/arch/z80/src/z80/chip.h @@ -3,7 +3,7 @@ * chip/chip.h * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/switch.h b/nuttx/arch/z80/src/z80/switch.h index 1b54ada5e..e7f705cfd 100644 --- a/nuttx/arch/z80/src/z80/switch.h +++ b/nuttx/arch/z80/src/z80/switch.h @@ -3,7 +3,7 @@ * arch/z80/src/chip/switch.h * * Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/z80_copystate.c b/nuttx/arch/z80/src/z80/z80_copystate.c index b49196f93..ca2286a2b 100644 --- a/nuttx/arch/z80/src/z80/z80_copystate.c +++ b/nuttx/arch/z80/src/z80/z80_copystate.c @@ -2,7 +2,7 @@ * arch/z80/src/z80/z80_copystate.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/z80_head.asm b/nuttx/arch/z80/src/z80/z80_head.asm index 0eb166af6..828a29d77 100644 --- a/nuttx/arch/z80/src/z80/z80_head.asm +++ b/nuttx/arch/z80/src/z80/z80_head.asm @@ -1,283 +1,283 @@ -;**************************************************************************
-; arch/z80/src/z80/z80_head.asm
-;
-; Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
-; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions
-; are met:
-;
-; 1. Redistributions of source code must retain the above copyright
-; notice, this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright
-; notice, this list of conditions and the following disclaimer in
-; the documentation and/or other materials provided with the
-; distribution.
-; 3. Neither the name NuttX nor the names of its contributors may be
-; used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-; POSSIBILITY OF SUCH DAMAGE.
-;
-;**************************************************************************
-
- .title NuttX for the Z80
- .module z80_head
-
-;**************************************************************************
-; Constants
-;**************************************************************************
-
- ; Register save area layout
-
- XCPT_I == 0 ; Offset 0: Saved I w/interrupt state in carry
- XCPT_BC == 2 ; Offset 1: Saved BC register
- XCPT_DE == 4 ; Offset 2: Saved DE register
- XCPT_IX == 6 ; Offset 3: Saved IX register
- XCPT_IY == 8 ; Offset 4: Saved IY register
- XCPT_SP == 10 ; Offset 5: Offset to SP at time of interrupt
- XCPT_HL == 12 ; Offset 6: Saved HL register
- XCPT_AF == 14 ; Offset 7: Saved AF register
- XCPT_PC == 16 ; Offset 8: Offset to PC at time of interrupt
-
- ; Default stack base (needs to be fixed)
-
- .include "asm_mem.h"
-
-;**************************************************************************
-; Global symbols used
-;**************************************************************************
-
- .globl _os_start ; OS entry point
- .globl _up_doirq ; Interrupt decoding logic
-
-;**************************************************************************
-; Reset entry point
-;**************************************************************************
-
- .area _HEADER (ABS)
- .org 0x0000
-
- di ; Disable interrupts
- im 1 ; Set interrupt mode 1
- jr _up_reset ; And boot the system
-
-;**************************************************************************
-; Other reset handlers
-;
-; Interrupt mode 1 behavior:
-;
-; 1. M1 cycle: 7 ticks
-; Acknowledge interrupt and decrements SP
-; 2. M2 cycle: 3 ticks
-; Writes the MS byte of the PC onto the stack and decrements SP
-; 3. M3 cycle: 3 ticks
-; Writes the LS byte of the PC onto the stack and sets the PC to 0x0038.
-;
-;**************************************************************************
-
- .org 0x0008 ; RST 1
-
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #1 ; 1 = Z80_RST1
- jr _up_rstcommon ; Remaining RST handling is common
-
- .org 0x0010 ; RST 2
-
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #2 ; 2 = Z80_RST2
- jr _up_rstcommon ; Remaining RST handling is common
-
- .org 0x0018 ; RST 3
-
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #3 ; 1 = Z80_RST3
- jr _up_rstcommon ; Remaining RST handling is common
-
- .org 0x0020 ; RST 4
-
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #4 ; 1 = Z80_RST4
- jr _up_rstcommon ; Remaining RST handling is common
-
- .org 0x0028 ; RST 5
-
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #5 ; 1 = Z80_RST5
- jr _up_rstcommon ; Remaining RST handling is common
-
- .org 0x0030 ; RST 6
-
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #6 ; 1 = Z80_RST6
- jr _up_rstcommon ; Remaining RST handling is common
-
- .org 0x0038 ; Int mode 1 / RST 7
-
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #7 ; 7 = Z80_RST7
- jr _up_rstcommon ; Remaining RST handling is common
-
-;**************************************************************************
-; NMI interrupt handler
-;**************************************************************************
-
- .org 0x0066
- retn
-
-;**************************************************************************
-; System start logic
-;**************************************************************************
-
-_up_reset:
- ; Set up the stack pointer at the location determined the Makefile
- ; and stored in asm_mem.h
-
- ld SP, #CONFIG_STACK_END ; Set stack pointer
-
- ; Performed initialization unique to the SDCC toolchain
-
- call gsinit ; Initialize the data section
-
- ; Then start NuttX
-
- call _os_start ; jump to the OS entry point
-
- ; NuttX will never return, but just in case...
-
-_up_halt::
- halt ; We should never get here
- jp _up_halt
-
-;**************************************************************************
-; Common Interrupt handler
-;**************************************************************************
-
-_up_rstcommon::
- ; Create a register frame. SP points to top of frame + 4, pushes
- ; decrement the stack pointer. Already have
- ;
- ; Offset 8: Return PC is already on the stack
- ; Offset 7: AF (retaining flags)
- ;
- ; IRQ number is in A
-
- push hl ; Offset 6: HL
- ld hl, #(3*2) ; HL is the value of the stack pointer before
- add hl, sp ; the interrupt occurred
- push hl ; Offset 5: Stack pointer
- push iy ; Offset 4: IY
- push ix ; Offset 3: IX
- push de ; Offset 2: DE
- push bc ; Offset 1: BC
-
- ld b, a ; Save the reset number in B
- ld a, i ; Parity bit holds interrupt state
- push af ; Offset 0: I with interrupt state in parity
- di
-
- ; Call the interrupt decode logic. SP points to the beggining of the reg structure
-
- ld hl, #0 ; Argument #2 is the beginning of the reg structure
- add hl, sp ;
- push hl ; Place argument #2 at the top of stack
- push bc ; Argument #1 is the Reset number
- inc sp ; (make byte sized)
- call _up_doirq ; Decode the IRQ
-
- ; On return, HL points to the beginning of the reg structure to restore
- ; Note that (1) the arguments pushed on the stack are not popped, and (2) the
- ; original stack pointer is lost. In the normal case (no context switch),
- ; HL will contain the value of the SP before the arguments wer pushed.
-
- ld sp, hl ; Use the new stack pointer
-
- ; Restore registers. HL points to the beginning of the reg structure to restore
-
- ex af, af' ; Select alternate AF
- pop af ; Offset 0: AF' = I with interrupt state in carry
- ex af, af' ; Restore original AF
- pop bc ; Offset 1: BC
- pop de ; Offset 2: DE
- pop ix ; Offset 3: IX
- pop iy ; Offset 4: IY
- exx ; Use alternate BC/DE/HL
- ld hl, #-2 ; Offset of SP to account for ret addr on stack
- pop de ; Offset 5: HL' = Stack pointer after return
- add hl, de ; HL = Stack pointer value before return
- exx ; Restore original BC/DE/HL
- pop hl ; Offset 6: HL
- pop af ; Offset 7: AF
-
- ; Restore the stack pointer
-
- exx ; Use alternate BC/DE/HL
- ld sp, hl ; Set SP = saved stack pointer value before return
- exx ; Restore original BC/DE/HL
-
- ; Restore interrupt state
-
- ex af, af' ; Recover interrupt state
- jp po, nointenable ; Odd parity, IFF2=0, means disabled
- ex af, af' ; Restore AF (before enabling interrupts)
- ei ; yes
- reti
-nointenable::
- ex af, af' ; Restore AF
- reti
-
-;**************************************************************************
-; Ordering of segments for the linker (SDCC only)
-;**************************************************************************
-
- .area _HOME
- .area _CODE
- .area _GSINIT
- .area _GSFINAL
-
- .area _DATA
- .area _BSS
- .area _HEAP
-
-;**************************************************************************
-; Global data initialization logic (SDCC only)
-;**************************************************************************
-
- .area _GSINIT
-gsinit::
- .area _GSFINAL
- ret
-
+;************************************************************************** +; arch/z80/src/z80/z80_head.asm +; +; Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt <gnutt@nuttx.org> +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + + .title NuttX for the Z80 + .module z80_head + +;************************************************************************** +; Constants +;************************************************************************** + + ; Register save area layout + + XCPT_I == 0 ; Offset 0: Saved I w/interrupt state in carry + XCPT_BC == 2 ; Offset 1: Saved BC register + XCPT_DE == 4 ; Offset 2: Saved DE register + XCPT_IX == 6 ; Offset 3: Saved IX register + XCPT_IY == 8 ; Offset 4: Saved IY register + XCPT_SP == 10 ; Offset 5: Offset to SP at time of interrupt + XCPT_HL == 12 ; Offset 6: Saved HL register + XCPT_AF == 14 ; Offset 7: Saved AF register + XCPT_PC == 16 ; Offset 8: Offset to PC at time of interrupt + + ; Default stack base (needs to be fixed) + + .include "asm_mem.h" + +;************************************************************************** +; Global symbols used +;************************************************************************** + + .globl _os_start ; OS entry point + .globl _up_doirq ; Interrupt decoding logic + +;************************************************************************** +; Reset entry point +;************************************************************************** + + .area _HEADER (ABS) + .org 0x0000 + + di ; Disable interrupts + im 1 ; Set interrupt mode 1 + jr _up_reset ; And boot the system + +;************************************************************************** +; Other reset handlers +; +; Interrupt mode 1 behavior: +; +; 1. M1 cycle: 7 ticks +; Acknowledge interrupt and decrements SP +; 2. M2 cycle: 3 ticks +; Writes the MS byte of the PC onto the stack and decrements SP +; 3. M3 cycle: 3 ticks +; Writes the LS byte of the PC onto the stack and sets the PC to 0x0038. +; +;************************************************************************** + + .org 0x0008 ; RST 1 + + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #1 ; 1 = Z80_RST1 + jr _up_rstcommon ; Remaining RST handling is common + + .org 0x0010 ; RST 2 + + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #2 ; 2 = Z80_RST2 + jr _up_rstcommon ; Remaining RST handling is common + + .org 0x0018 ; RST 3 + + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #3 ; 1 = Z80_RST3 + jr _up_rstcommon ; Remaining RST handling is common + + .org 0x0020 ; RST 4 + + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #4 ; 1 = Z80_RST4 + jr _up_rstcommon ; Remaining RST handling is common + + .org 0x0028 ; RST 5 + + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #5 ; 1 = Z80_RST5 + jr _up_rstcommon ; Remaining RST handling is common + + .org 0x0030 ; RST 6 + + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #6 ; 1 = Z80_RST6 + jr _up_rstcommon ; Remaining RST handling is common + + .org 0x0038 ; Int mode 1 / RST 7 + + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #7 ; 7 = Z80_RST7 + jr _up_rstcommon ; Remaining RST handling is common + +;************************************************************************** +; NMI interrupt handler +;************************************************************************** + + .org 0x0066 + retn + +;************************************************************************** +; System start logic +;************************************************************************** + +_up_reset: + ; Set up the stack pointer at the location determined the Makefile + ; and stored in asm_mem.h + + ld SP, #CONFIG_STACK_END ; Set stack pointer + + ; Performed initialization unique to the SDCC toolchain + + call gsinit ; Initialize the data section + + ; Then start NuttX + + call _os_start ; jump to the OS entry point + + ; NuttX will never return, but just in case... + +_up_halt:: + halt ; We should never get here + jp _up_halt + +;************************************************************************** +; Common Interrupt handler +;************************************************************************** + +_up_rstcommon:: + ; Create a register frame. SP points to top of frame + 4, pushes + ; decrement the stack pointer. Already have + ; + ; Offset 8: Return PC is already on the stack + ; Offset 7: AF (retaining flags) + ; + ; IRQ number is in A + + push hl ; Offset 6: HL + ld hl, #(3*2) ; HL is the value of the stack pointer before + add hl, sp ; the interrupt occurred + push hl ; Offset 5: Stack pointer + push iy ; Offset 4: IY + push ix ; Offset 3: IX + push de ; Offset 2: DE + push bc ; Offset 1: BC + + ld b, a ; Save the reset number in B + ld a, i ; Parity bit holds interrupt state + push af ; Offset 0: I with interrupt state in parity + di + + ; Call the interrupt decode logic. SP points to the beggining of the reg structure + + ld hl, #0 ; Argument #2 is the beginning of the reg structure + add hl, sp ; + push hl ; Place argument #2 at the top of stack + push bc ; Argument #1 is the Reset number + inc sp ; (make byte sized) + call _up_doirq ; Decode the IRQ + + ; On return, HL points to the beginning of the reg structure to restore + ; Note that (1) the arguments pushed on the stack are not popped, and (2) the + ; original stack pointer is lost. In the normal case (no context switch), + ; HL will contain the value of the SP before the arguments wer pushed. + + ld sp, hl ; Use the new stack pointer + + ; Restore registers. HL points to the beginning of the reg structure to restore + + ex af, af' ; Select alternate AF + pop af ; Offset 0: AF' = I with interrupt state in carry + ex af, af' ; Restore original AF + pop bc ; Offset 1: BC + pop de ; Offset 2: DE + pop ix ; Offset 3: IX + pop iy ; Offset 4: IY + exx ; Use alternate BC/DE/HL + ld hl, #-2 ; Offset of SP to account for ret addr on stack + pop de ; Offset 5: HL' = Stack pointer after return + add hl, de ; HL = Stack pointer value before return + exx ; Restore original BC/DE/HL + pop hl ; Offset 6: HL + pop af ; Offset 7: AF + + ; Restore the stack pointer + + exx ; Use alternate BC/DE/HL + ld sp, hl ; Set SP = saved stack pointer value before return + exx ; Restore original BC/DE/HL + + ; Restore interrupt state + + ex af, af' ; Recover interrupt state + jp po, nointenable ; Odd parity, IFF2=0, means disabled + ex af, af' ; Restore AF (before enabling interrupts) + ei ; yes + reti +nointenable:: + ex af, af' ; Restore AF + reti + +;************************************************************************** +; Ordering of segments for the linker (SDCC only) +;************************************************************************** + + .area _HOME + .area _CODE + .area _GSINIT + .area _GSFINAL + + .area _DATA + .area _BSS + .area _HEAP + +;************************************************************************** +; Global data initialization logic (SDCC only) +;************************************************************************** + + .area _GSINIT +gsinit:: + .area _GSFINAL + ret + diff --git a/nuttx/arch/z80/src/z80/z80_initialstate.c b/nuttx/arch/z80/src/z80/z80_initialstate.c index fc65dbca5..01cc4f00a 100644 --- a/nuttx/arch/z80/src/z80/z80_initialstate.c +++ b/nuttx/arch/z80/src/z80/z80_initialstate.c @@ -2,7 +2,7 @@ * arch/z80/src/z80/z80_initialstate.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/z80_io.c b/nuttx/arch/z80/src/z80/z80_io.c index 780d5f674..cddaa6831 100644 --- a/nuttx/arch/z80/src/z80/z80_io.c +++ b/nuttx/arch/z80/src/z80/z80_io.c @@ -2,7 +2,7 @@ * arch/z80/src/z80/z80_io.c * * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/z80_irq.c b/nuttx/arch/z80/src/z80/z80_irq.c index 5efd36b9f..08b426235 100644 --- a/nuttx/arch/z80/src/z80/z80_irq.c +++ b/nuttx/arch/z80/src/z80/z80_irq.c @@ -2,7 +2,7 @@ * arch/z80/src/z80/z80_irq.c * * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/z80_registerdump.c b/nuttx/arch/z80/src/z80/z80_registerdump.c index f215b6dc6..0d09a243a 100644 --- a/nuttx/arch/z80/src/z80/z80_registerdump.c +++ b/nuttx/arch/z80/src/z80/z80_registerdump.c @@ -2,7 +2,7 @@ * arch/z80/src/z80/z80_registerdump.c * * Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/z80_restoreusercontext.asm b/nuttx/arch/z80/src/z80/z80_restoreusercontext.asm index 79c3a6034..bab143462 100644 --- a/nuttx/arch/z80/src/z80/z80_restoreusercontext.asm +++ b/nuttx/arch/z80/src/z80/z80_restoreusercontext.asm @@ -1,104 +1,104 @@ -;**************************************************************************
-; arch/z80/src/z80/z80_restoreusercontext.asm
-;
-; Copyright (C) 2007-2009 Gregory Nutt. All rights reserved.
-; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions
-; are met:
-;
-; 1. Redistributions of source code must retain the above copyright
-; notice, this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright
-; notice, this list of conditions and the following disclaimer in
-; the documentation and/or other materials provided with the
-; distribution.
-; 3. Neither the name NuttX nor the names of its contributors may be
-; used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-; POSSIBILITY OF SUCH DAMAGE.
-;
-;**************************************************************************
-
- ; Register save area layout
-
- .globl XCPT_I ; Offset 0: Saved I w/interrupt state in carry
- .globl XCPT_BC ; Offset 1: Saved BC register
- .globl XCPT_DE ; Offset 2: Saved DE register
- .globl XCPT_IX ; Offset 3: Saved IX register
- .globl XCPT_IY ; Offset 4: Saved IY register
- .globl XCPT_SP ; Offset 5: Offset to SP at time of interrupt
- .globl XCPT_HL ; Offset 6: Saved HL register
- .globl XCPT_AF ; Offset 7: Saved AF register
- .globl XCPT_PC ; Offset 8: Offset to PC at time of interrupt
-
-;**************************************************************************
-; z80_restoreusercontext
-;**************************************************************************
-
- .area _CODE
-_z80_restoreusercontext:
- ; On entry, stack contains return address (not used), then address
- ; of the register save structure
-
- ; Discard the return address, we won't be returning
-
- pop hl
-
- ; Get the address of the beginning of the state save area. Each
- ; pop will increment to the next element of the structure
-
- pop hl ; BC = Address of save structure
- ld sp, hl ; SP points to top of storage area
-
- ; Disable interrupts while we muck with the alternative registers. The
- ; Correct interrupt state will be restore below
-
- di
-
- ; Restore registers. HL points to the beginning of the reg structure to restore
-
- ex af, af' ; Select alternate AF
- pop af ; Offset 0: AF' = I with interrupt state in parity
- ex af, af' ; Restore original AF
- pop bc ; Offset 1: BC
- pop de ; Offset 2: DE
- pop ix ; Offset 3: IX
- pop iy ; Offset 4: IY
- exx ; Use alternate BC/DE/HL
- pop hl ; Offset 5: HL' = Stack pointer after return
- exx ; Restore original BC/DE/HL
- pop hl ; Offset 6: HL
- pop af ; Offset 7: AF
-
- ; Restore the stack pointer
-
- exx ; Use alternate BC/DE/HL
- pop de ; DE' = return address
- ld sp, hl ; Set SP = saved stack pointer value before return
- push de ; Save return address for ret instruction
- exx ; Restore original BC/DE/HL
-
- ; Restore interrupt state
-
- ex af, af' ; Recover interrupt state
- jp po, noinrestore ; Odd parity, IFF2=0, means disabled
- ex af, af' ; Restore AF (before enabling interrupts)
- ei ; yes.. Enable interrupts
- ret ; and return
-noinrestore:
- ex af, af' ; Restore AF
- ret ; Return with interrupts disabled
+;************************************************************************** +; arch/z80/src/z80/z80_restoreusercontext.asm +; +; Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt <gnutt@nuttx.org> +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + + ; Register save area layout + + .globl XCPT_I ; Offset 0: Saved I w/interrupt state in carry + .globl XCPT_BC ; Offset 1: Saved BC register + .globl XCPT_DE ; Offset 2: Saved DE register + .globl XCPT_IX ; Offset 3: Saved IX register + .globl XCPT_IY ; Offset 4: Saved IY register + .globl XCPT_SP ; Offset 5: Offset to SP at time of interrupt + .globl XCPT_HL ; Offset 6: Saved HL register + .globl XCPT_AF ; Offset 7: Saved AF register + .globl XCPT_PC ; Offset 8: Offset to PC at time of interrupt + +;************************************************************************** +; z80_restoreusercontext +;************************************************************************** + + .area _CODE +_z80_restoreusercontext: + ; On entry, stack contains return address (not used), then address + ; of the register save structure + + ; Discard the return address, we won't be returning + + pop hl + + ; Get the address of the beginning of the state save area. Each + ; pop will increment to the next element of the structure + + pop hl ; BC = Address of save structure + ld sp, hl ; SP points to top of storage area + + ; Disable interrupts while we muck with the alternative registers. The + ; Correct interrupt state will be restore below + + di + + ; Restore registers. HL points to the beginning of the reg structure to restore + + ex af, af' ; Select alternate AF + pop af ; Offset 0: AF' = I with interrupt state in parity + ex af, af' ; Restore original AF + pop bc ; Offset 1: BC + pop de ; Offset 2: DE + pop ix ; Offset 3: IX + pop iy ; Offset 4: IY + exx ; Use alternate BC/DE/HL + pop hl ; Offset 5: HL' = Stack pointer after return + exx ; Restore original BC/DE/HL + pop hl ; Offset 6: HL + pop af ; Offset 7: AF + + ; Restore the stack pointer + + exx ; Use alternate BC/DE/HL + pop de ; DE' = return address + ld sp, hl ; Set SP = saved stack pointer value before return + push de ; Save return address for ret instruction + exx ; Restore original BC/DE/HL + + ; Restore interrupt state + + ex af, af' ; Recover interrupt state + jp po, noinrestore ; Odd parity, IFF2=0, means disabled + ex af, af' ; Restore AF (before enabling interrupts) + ei ; yes.. Enable interrupts + ret ; and return +noinrestore: + ex af, af' ; Restore AF + ret ; Return with interrupts disabled diff --git a/nuttx/arch/z80/src/z80/z80_rom.asm b/nuttx/arch/z80/src/z80/z80_rom.asm index b2fd76bb3..d3bc13530 100644 --- a/nuttx/arch/z80/src/z80/z80_rom.asm +++ b/nuttx/arch/z80/src/z80/z80_rom.asm @@ -1,276 +1,276 @@ -;**************************************************************************
-; arch/z80/src/z80/z80_rom.asm
-;
-; Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
-; Author: Gregory Nutt <spudmonkey@racsa.co.cr>
-;
-; Redistribution and use in source and binary forms, with or without
-; modification, are permitted provided that the following conditions
-; are met:
-;
-; 1. Redistributions of source code must retain the above copyright
-; notice, this list of conditions and the following disclaimer.
-; 2. Redistributions in binary form must reproduce the above copyright
-; notice, this list of conditions and the following disclaimer in
-; the documentation and/or other materials provided with the
-; distribution.
-; 3. Neither the name NuttX nor the names of its contributors may be
-; used to endorse or promote products derived from this software
-; without specific prior written permission.
-;
-; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-; POSSIBILITY OF SUCH DAMAGE.
-;
-;**************************************************************************
-
- .title NuttX for the Z80
- .module z80_head
-
-;**************************************************************************
-; Constants
-;**************************************************************************
-
- ; Register save area layout
-
- XCPT_I == 0 ; Offset 0: Saved I w/interrupt state in parity
- XCPT_BC == 2 ; Offset 1: Saved BC register
- XCPT_DE == 4 ; Offset 2: Saved DE register
- XCPT_IX == 6 ; Offset 3: Saved IX register
- XCPT_IY == 8 ; Offset 4: Saved IY register
- XCPT_SP == 10 ; Offset 5: Offset to SP at time of interrupt
- XCPT_HL == 12 ; Offset 6: Saved HL register
- XCPT_AF == 14 ; Offset 7: Saved AF register
- XCPT_PC == 16 ; Offset 8: Offset to PC at time of interrupt
-
- ; Default stack base (needs to be fixed)
-
- .include "asm_mem.h"
-
-;**************************************************************************
-; Global symbols used
-;**************************************************************************
-
- .globl _os_start ; OS entry point
- .globl _up_doirq ; Interrupt decoding logic
-
-;**************************************************************************
-; System start logic
-;**************************************************************************
-
-_up_reset:
- ; Set up the stack pointer at the location determined the Makefile
- ; and stored in asm_mem.h
-
- ld SP, #CONFIG_STACK_END ; Set stack pointer
-
- ; Performed initialization unique to the SDCC toolchain
-
- call gsinit ; Initialize the data section
-
- ; Copy the reset vectors
-
- ld hl, #_up_rstvectors ; code for RAM
- ld de, #0x4000 ; move it here
- ld bc, #3*7 ; 7 vectors / 3 bytes each
- ldir
-
- ; Then start NuttX
-
- call _os_start ; jump to the OS entry point
-
- ; NuttX will never return, but just in case...
-
-_up_halt::
- halt ; We should never get here
- jp _up_halt
-
- ; Data to copy to address 0x4000
-
-_up_rstvectors:
- jp _up_rst1 ; 0x4000 : RST 1
- jp _up_rst2 ; 0x4003 : RST 2
- jp _up_rst3 ; 0x4006 : RST 3
- jp _up_rst4 ; 0x4009 : RST 4
- jp _up_rst5 ; 0x400c : RST 5
- jp _up_rst6 ; 0x400f : RST 6
- jp _up_rst7 ; 0x4012 : RST 7
-
-;**************************************************************************
-; Other reset handlers
-;
-; Interrupt mode 1 behavior:
-;
-; 1. M1 cycle: 7 ticks
-; Acknowledge interrupt and decrements SP
-; 2. M2 cycle: 3 ticks
-; Writes the MS byte of the PC onto the stack and decrements SP
-; 3. M3 cycle: 3 ticks
-; Writes the LS byte of the PC onto the stack and sets the PC to 0x0038.
-;
-;**************************************************************************
-
-_up_rst1: ; RST 1
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #1 ; 1 = Z80_RST1
- jr _up_rstcommon ; Remaining RST handling is common
-
-_up_rst2: ; RST 2
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #2 ; 2 = Z80_RST2
- jr _up_rstcommon ; Remaining RST handling is common
-
-_up_rst3: ; RST 3
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #3 ; 1 = Z80_RST3
- jr _up_rstcommon ; Remaining RST handling is common
-
-_up_rst4: ; RST 4
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #4 ; 1 = Z80_RST4
- jr _up_rstcommon ; Remaining RST handling is common
-
-_up_rst5: ; RST 5
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #5 ; 1 = Z80_RST5
- jr _up_rstcommon ; Remaining RST handling is common
-
-_up_rst6: ; RST 6
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #6 ; 1 = Z80_RST6
- jr _up_rstcommon ; Remaining RST handling is common
-
-_up_rst7: ; RST 7
- ; Save AF on the stack, set the interrupt number and jump to the
- ; common reset handling logic.
- ; Offset 8: Return PC is already on the stack
- push af ; Offset 7: AF (retaining flags)
- ld a, #7 ; 7 = Z80_RST7
- jr _up_rstcommon ; Remaining RST handling is common
-
-;**************************************************************************
-; Common Interrupt handler
-;**************************************************************************
-
-_up_rstcommon:
- ; Create a register frame. SP points to top of frame + 4, pushes
- ; decrement the stack pointer. Already have
- ;
- ; Offset 8: Return PC is already on the stack
- ; Offset 7: AF (retaining flags)
- ;
- ; IRQ number is in A
-
- push hl ; Offset 6: HL
- ld hl, #(3*2) ; HL is the value of the stack pointer before
- add hl, sp ; the interrupt occurred
- push hl ; Offset 5: Stack pointer
- push iy ; Offset 4: IY
- push ix ; Offset 3: IX
- push de ; Offset 2: DE
- push bc ; Offset 1: BC
-
- ld b, a ; Save the reset number in B
- ld a, i ; Parity bit holds interrupt state
- push af ; Offset 0: I with interrupt state in parity
- di
-
- ; Call the interrupt decode logic. SP points to the beginning of the reg structure
-
- ld hl, #0 ; Argument #2 is the beginning of the reg structure
- add hl, sp ;
- push hl ; Place argument #2 at the top of stack
- push bc ; Argument #1 is the Reset number
- inc sp ; (make byte sized)
- call _up_doirq ; Decode the IRQ
-
- ; On return, HL points to the beginning of the reg structure to restore
- ; Note that (1) the arguments pushed on the stack are not popped, and (2) the
- ; original stack pointer is lost. In the normal case (no context switch),
- ; HL will contain the value of the SP before the arguments were pushed.
-
- ld sp, hl ; Use the new stack pointer
-
- ; Restore registers. HL points to the beginning of the reg structure to restore
-
- ex af, af' ; Select alternate AF
- pop af ; Offset 0: AF' = I with interrupt state in parity
- ex af, af' ; Restore original AF
- pop bc ; Offset 1: BC
- pop de ; Offset 2: DE
- pop ix ; Offset 3: IX
- pop iy ; Offset 4: IY
- exx ; Use alternate BC/DE/HL
- ld hl, #-2 ; Offset of SP to account for ret addr on stack
- pop de ; Offset 5: HL' = Stack pointer after return
- add hl, de ; HL = Stack pointer value before return
- exx ; Restore original BC/DE/HL
- pop hl ; Offset 6: HL
- pop af ; Offset 7: AF
-
- ; Restore the stack pointer
-
- exx ; Use alternate BC/DE/HL
- ld sp, hl ; Set SP = saved stack pointer value before return
- exx ; Restore original BC/DE/HL
-
- ; Restore interrupt state
-
- ex af, af' ; Recover interrupt state
- jp po, nointenable ; Odd parity, IFF2=0, means disabled
- ex af, af' ; Restore AF (before enabling interrupts)
- ei ; yes
- reti
-nointenable::
- ex af, af' ; Restore AF
- reti
-
-;**************************************************************************
-; Ordering of segments for the linker (SDCC only)
-;**************************************************************************
-
- .area _HOME
- .area _CODE
- .area _GSINIT
- .area _GSFINAL
-
- .area _DATA
- .area _BSS
- .area _HEAP
-
-;**************************************************************************
-; Global data initialization logic (SDCC only)
-;**************************************************************************
-
- .area _GSINIT
-gsinit::
- .area _GSFINAL
- ret
-
+;************************************************************************** +; arch/z80/src/z80/z80_rom.asm +; +; Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. +; Author: Gregory Nutt <gnutt@nuttx.org> +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; 1. Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; 2. Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; 3. Neither the name NuttX nor the names of its contributors may be +; used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +; FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +; COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +; OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +; ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. +; +;************************************************************************** + + .title NuttX for the Z80 + .module z80_head + +;************************************************************************** +; Constants +;************************************************************************** + + ; Register save area layout + + XCPT_I == 0 ; Offset 0: Saved I w/interrupt state in parity + XCPT_BC == 2 ; Offset 1: Saved BC register + XCPT_DE == 4 ; Offset 2: Saved DE register + XCPT_IX == 6 ; Offset 3: Saved IX register + XCPT_IY == 8 ; Offset 4: Saved IY register + XCPT_SP == 10 ; Offset 5: Offset to SP at time of interrupt + XCPT_HL == 12 ; Offset 6: Saved HL register + XCPT_AF == 14 ; Offset 7: Saved AF register + XCPT_PC == 16 ; Offset 8: Offset to PC at time of interrupt + + ; Default stack base (needs to be fixed) + + .include "asm_mem.h" + +;************************************************************************** +; Global symbols used +;************************************************************************** + + .globl _os_start ; OS entry point + .globl _up_doirq ; Interrupt decoding logic + +;************************************************************************** +; System start logic +;************************************************************************** + +_up_reset: + ; Set up the stack pointer at the location determined the Makefile + ; and stored in asm_mem.h + + ld SP, #CONFIG_STACK_END ; Set stack pointer + + ; Performed initialization unique to the SDCC toolchain + + call gsinit ; Initialize the data section + + ; Copy the reset vectors + + ld hl, #_up_rstvectors ; code for RAM + ld de, #0x4000 ; move it here + ld bc, #3*7 ; 7 vectors / 3 bytes each + ldir + + ; Then start NuttX + + call _os_start ; jump to the OS entry point + + ; NuttX will never return, but just in case... + +_up_halt:: + halt ; We should never get here + jp _up_halt + + ; Data to copy to address 0x4000 + +_up_rstvectors: + jp _up_rst1 ; 0x4000 : RST 1 + jp _up_rst2 ; 0x4003 : RST 2 + jp _up_rst3 ; 0x4006 : RST 3 + jp _up_rst4 ; 0x4009 : RST 4 + jp _up_rst5 ; 0x400c : RST 5 + jp _up_rst6 ; 0x400f : RST 6 + jp _up_rst7 ; 0x4012 : RST 7 + +;************************************************************************** +; Other reset handlers +; +; Interrupt mode 1 behavior: +; +; 1. M1 cycle: 7 ticks +; Acknowledge interrupt and decrements SP +; 2. M2 cycle: 3 ticks +; Writes the MS byte of the PC onto the stack and decrements SP +; 3. M3 cycle: 3 ticks +; Writes the LS byte of the PC onto the stack and sets the PC to 0x0038. +; +;************************************************************************** + +_up_rst1: ; RST 1 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #1 ; 1 = Z80_RST1 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst2: ; RST 2 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #2 ; 2 = Z80_RST2 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst3: ; RST 3 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #3 ; 1 = Z80_RST3 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst4: ; RST 4 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #4 ; 1 = Z80_RST4 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst5: ; RST 5 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #5 ; 1 = Z80_RST5 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst6: ; RST 6 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #6 ; 1 = Z80_RST6 + jr _up_rstcommon ; Remaining RST handling is common + +_up_rst7: ; RST 7 + ; Save AF on the stack, set the interrupt number and jump to the + ; common reset handling logic. + ; Offset 8: Return PC is already on the stack + push af ; Offset 7: AF (retaining flags) + ld a, #7 ; 7 = Z80_RST7 + jr _up_rstcommon ; Remaining RST handling is common + +;************************************************************************** +; Common Interrupt handler +;************************************************************************** + +_up_rstcommon: + ; Create a register frame. SP points to top of frame + 4, pushes + ; decrement the stack pointer. Already have + ; + ; Offset 8: Return PC is already on the stack + ; Offset 7: AF (retaining flags) + ; + ; IRQ number is in A + + push hl ; Offset 6: HL + ld hl, #(3*2) ; HL is the value of the stack pointer before + add hl, sp ; the interrupt occurred + push hl ; Offset 5: Stack pointer + push iy ; Offset 4: IY + push ix ; Offset 3: IX + push de ; Offset 2: DE + push bc ; Offset 1: BC + + ld b, a ; Save the reset number in B + ld a, i ; Parity bit holds interrupt state + push af ; Offset 0: I with interrupt state in parity + di + + ; Call the interrupt decode logic. SP points to the beginning of the reg structure + + ld hl, #0 ; Argument #2 is the beginning of the reg structure + add hl, sp ; + push hl ; Place argument #2 at the top of stack + push bc ; Argument #1 is the Reset number + inc sp ; (make byte sized) + call _up_doirq ; Decode the IRQ + + ; On return, HL points to the beginning of the reg structure to restore + ; Note that (1) the arguments pushed on the stack are not popped, and (2) the + ; original stack pointer is lost. In the normal case (no context switch), + ; HL will contain the value of the SP before the arguments were pushed. + + ld sp, hl ; Use the new stack pointer + + ; Restore registers. HL points to the beginning of the reg structure to restore + + ex af, af' ; Select alternate AF + pop af ; Offset 0: AF' = I with interrupt state in parity + ex af, af' ; Restore original AF + pop bc ; Offset 1: BC + pop de ; Offset 2: DE + pop ix ; Offset 3: IX + pop iy ; Offset 4: IY + exx ; Use alternate BC/DE/HL + ld hl, #-2 ; Offset of SP to account for ret addr on stack + pop de ; Offset 5: HL' = Stack pointer after return + add hl, de ; HL = Stack pointer value before return + exx ; Restore original BC/DE/HL + pop hl ; Offset 6: HL + pop af ; Offset 7: AF + + ; Restore the stack pointer + + exx ; Use alternate BC/DE/HL + ld sp, hl ; Set SP = saved stack pointer value before return + exx ; Restore original BC/DE/HL + + ; Restore interrupt state + + ex af, af' ; Recover interrupt state + jp po, nointenable ; Odd parity, IFF2=0, means disabled + ex af, af' ; Restore AF (before enabling interrupts) + ei ; yes + reti +nointenable:: + ex af, af' ; Restore AF + reti + +;************************************************************************** +; Ordering of segments for the linker (SDCC only) +;************************************************************************** + + .area _HOME + .area _CODE + .area _GSINIT + .area _GSFINAL + + .area _DATA + .area _BSS + .area _HEAP + +;************************************************************************** +; Global data initialization logic (SDCC only) +;************************************************************************** + + .area _GSINIT +gsinit:: + .area _GSFINAL + ret + diff --git a/nuttx/arch/z80/src/z80/z80_saveusercontext.asm b/nuttx/arch/z80/src/z80/z80_saveusercontext.asm index e23039dfc..d53c3c5df 100644 --- a/nuttx/arch/z80/src/z80/z80_saveusercontext.asm +++ b/nuttx/arch/z80/src/z80/z80_saveusercontext.asm @@ -2,7 +2,7 @@ ; arch/z80/src/z80/z80_saveusercontext.asm ; ; Copyright (C) 2007-2009 Gregory Nutt. All rights reserved. -; Author: Gregory Nutt <spudmonkey@racsa.co.cr> +; Author: Gregory Nutt <gnutt@nuttx.org> ; ; Redistribution and use in source and binary forms, with or without ; modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/z80_schedulesigaction.c b/nuttx/arch/z80/src/z80/z80_schedulesigaction.c index 24b12731c..3b227d5e3 100644 --- a/nuttx/arch/z80/src/z80/z80_schedulesigaction.c +++ b/nuttx/arch/z80/src/z80/z80_schedulesigaction.c @@ -2,7 +2,7 @@ * arch/z80/src/z80/z80_schedulesigaction.c * * Copyright (C) 2007-2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/nuttx/arch/z80/src/z80/z80_sigdeliver.c b/nuttx/arch/z80/src/z80/z80_sigdeliver.c index c6aa5ff3c..a8fc1e347 100644 --- a/nuttx/arch/z80/src/z80/z80_sigdeliver.c +++ b/nuttx/arch/z80/src/z80/z80_sigdeliver.c @@ -2,7 +2,7 @@ * arch/z80/src/z80/z80_sigdeliver.c * * Copyright (C) 2007-2010 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * Author: Gregory Nutt <gnutt@nuttx.org> * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions |