diff options
Diffstat (limited to 'nuttx/arch')
-rw-r--r-- | nuttx/arch/arm/include/arm/irq.h | 6 | ||||
-rw-r--r-- | nuttx/arch/arm/include/cortexm3/irq.h | 6 | ||||
-rw-r--r-- | nuttx/arch/arm/src/arm/up_initialstate.c | 15 | ||||
-rw-r--r-- | nuttx/arch/arm/src/cortexm3/up_initialstate.c | 15 |
4 files changed, 42 insertions, 0 deletions
diff --git a/nuttx/arch/arm/include/arm/irq.h b/nuttx/arch/arm/include/arm/irq.h index 11c2bb046..98335c23f 100644 --- a/nuttx/arch/arm/include/arm/irq.h +++ b/nuttx/arch/arm/include/arm/irq.h @@ -103,6 +103,12 @@ #define REG_LR REG_R14 #define REG_PC REG_R15 +/* The PIC register is usually R10. It can be R9 is stack checking is enabled + * or if the user changes it with -mpic-register on the GCC command line. + */ + +#define REG_PIC REG_R10 + /**************************************************************************** * Public Types ****************************************************************************/ diff --git a/nuttx/arch/arm/include/cortexm3/irq.h b/nuttx/arch/arm/include/cortexm3/irq.h index ce126748a..b439ec42f 100644 --- a/nuttx/arch/arm/include/cortexm3/irq.h +++ b/nuttx/arch/arm/include/cortexm3/irq.h @@ -109,6 +109,12 @@ #define REG_LR REG_R14 #define REG_PC REG_R15 +/* The PIC register is usually R10. It can be R9 is stack checking is enabled + * or if the user changes it with -mpic-register on the GCC command line. + */ + +#define REG_PIC REG_R10 + /**************************************************************************** * Public Types ****************************************************************************/ diff --git a/nuttx/arch/arm/src/arm/up_initialstate.c b/nuttx/arch/arm/src/arm/up_initialstate.c index 2ba683445..c3a5f8a83 100644 --- a/nuttx/arch/arm/src/arm/up_initialstate.c +++ b/nuttx/arch/arm/src/arm/up_initialstate.c @@ -93,6 +93,21 @@ void up_initial_state(_TCB *tcb) xcp->regs[REG_PC] = (uint32)tcb->start; + /* If this task is running PIC, then set the PIC base register to the + * address of the allocated D-Space region. + */ + +#ifdef CONFIG_PIC + if (tcb->dspace != NULL) + { + /* Set the PIC base register (probably R10) to the address of the + * alloacated D-Space region. + */ + + xcp->regs[REG_PIC] = (uint32)tcb->dspace->region; + } +#endif + /* Enable or disable interrupts, based on user configuration */ # ifdef CONFIG_SUPPRESS_INTERRUPTS diff --git a/nuttx/arch/arm/src/cortexm3/up_initialstate.c b/nuttx/arch/arm/src/cortexm3/up_initialstate.c index c529064d4..9bf65bf57 100644 --- a/nuttx/arch/arm/src/cortexm3/up_initialstate.c +++ b/nuttx/arch/arm/src/cortexm3/up_initialstate.c @@ -97,6 +97,21 @@ void up_initial_state(_TCB *tcb) xcp->regs[REG_XPSR] = CORTEXM3_XPSR_T; + /* If this task is running PIC, then set the PIC base register to the + * address of the allocated D-Space region. + */ + +#ifdef CONFIG_PIC + if (tcb->dspace != NULL) + { + /* Set the PIC base register (probably R10) to the address of the + * alloacated D-Space region. + */ + + xcp->regs[REG_PIC] = (uint32)tcb->dspace->region; + } +#endif + /* Enable or disable interrupts, based on user configuration */ # ifdef CONFIG_SUPPRESS_INTERRUPTS |