diff options
Diffstat (limited to 'nuttx/arch')
-rw-r--r-- | nuttx/arch/arm/src/lpc43xx/chip/lpc43_sdmmc.h | 5 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lpc43xx/lpc43_serial.c | 7 | ||||
-rw-r--r-- | nuttx/arch/arm/src/lpc43xx/lpc43_spifi.c | 8 | ||||
-rw-r--r-- | nuttx/arch/arm/src/stm32/stm32_serial.c | 7 | ||||
-rw-r--r-- | nuttx/arch/mips/src/pic32mx/pic32mx-serial.c | 7 |
5 files changed, 24 insertions, 10 deletions
diff --git a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_sdmmc.h b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_sdmmc.h index 1368312cc..1236d82f3 100644 --- a/nuttx/arch/arm/src/lpc43xx/chip/lpc43_sdmmc.h +++ b/nuttx/arch/arm/src/lpc43xx/chip/lpc43_sdmmc.h @@ -49,7 +49,7 @@ /* MCI register offsets (with respect to the MCI base) ******************************************/ #define LPC43_SDMMC_CTRL_OFFSET 0x0000 /* Control register */ -#define LPC43_SDMMC_PWREN_OFFSET 0x0004 /* Reserved */ +#define LPC43_SDMMC_PWREN_OFFSET 0x0004 /* Power Enable Register */ #define LPC43_SDMMC_CLKDIV_OFFSET 0x0008 /* Clock-divider register */ #define LPC43_SDMMC_CLKSRC_OFFSET 0x000c /* Clock-source register */ #define LPC43_SDMMC_CLKENA_OFFSET 0x0010 /* Clock-enable register */ @@ -61,7 +61,7 @@ #define LPC43_SDMMC_CMDARG_OFFSET 0x0028 /* Command-argument register */ #define LPC43_SDMMC_CMD_OFFSET 0x002c /* Command register */ #define LPC43_SDMMC_RESP0_OFFSET 0x0030 /* Response-0 register */ -#define LPC43_SDMMC_RESP1_OFFSET 0x0034 /* Response-1register */ +#define LPC43_SDMMC_RESP1_OFFSET 0x0034 /* Response-1 register */ #define LPC43_SDMMC_RESP2_OFFSET 0x0038 /* Response-2 register */ #define LPC43_SDMMC_RESP3_OFFSET 0x003c /* Response-3 register */ #define LPC43_SDMMC_MINTSTS_OFFSET 0x0040 /* Masked interrupt-status register */ @@ -313,6 +313,7 @@ /* Bit 24-31: Reserved */ /* Hardware Reset */ + #define SDMMC_RSTN (1 << 0) /* Bit 0: Hardware reset */ /* Bit 1-31: Reserved */ diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_serial.c b/nuttx/arch/arm/src/lpc43xx/lpc43_serial.c index c125660e1..525cad01d 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_serial.c +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_serial.c @@ -1125,9 +1125,12 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) break; } - /* TODO: Handle other termios settings. */ + /* TODO: Handle other termios settings. + * Note that only cfgetispeed is used besued we have knowledge + * that only one speed is supported. + */ - priv->baud = termiosp->c_speed; + priv->baud = cfgetispeed(termiosp); lpc43_setbaud(priv->uartbase, priv->basefreq, priv->baud); } break; diff --git a/nuttx/arch/arm/src/lpc43xx/lpc43_spifi.c b/nuttx/arch/arm/src/lpc43xx/lpc43_spifi.c index fe26fabc5..8e633e5d1 100644 --- a/nuttx/arch/arm/src/lpc43xx/lpc43_spifi.c +++ b/nuttx/arch/arm/src/lpc43xx/lpc43_spifi.c @@ -77,6 +77,10 @@ * CONFIG_SPIFI_OFFSET - Offset the beginning of the block driver this many * bytes into the device address space. This offset must be an exact * multiple of the erase block size. Default 0. + * CONFIG_SPIFI_BLKSIZE - The size of one device erase block. If not defined + * then the driver will try to determine the correct erase block size by + * examining that data returned from spifi_initialize (which sometimes + * seems bad). * CONFIG_SPIFI_SECTOR512 - If defined, then the driver will report a more * FAT friendly 512 byte sector size and will manage the read-modify-write * operations on the larger erase block. @@ -1082,7 +1086,7 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv) priv->blkshift = log2; priv->blksize = (1 << log2); - priv->nblocks = priv->rom.memsize / priv->blksize; + priv->nblocks = (priv->rom.memsize - CONFIG_SPIFI_OFFSET) / priv->blksize; fvdbg("Driver FLASH Geometry:\n"); fvdbg(" blkshift: %d\n", priv->blkshift); @@ -1097,7 +1101,7 @@ static inline int lpc43_rominit(FAR struct lpc43_dev_s *priv) /* Save the digested FLASH geometry info */ - priv->nblocks = (priv->rom.memsize >> SPIFI_BLKSHIFT); + priv->nblocks = ((priv->rom.memsize - CONFIG_SPIFI_OFFSET) >> SPIFI_BLKSHIFT); fvdbg("Driver FLASH Geometry:\n"); fvdbg(" blkshift: %d\n", SPIFI_BLKSHIFT); diff --git a/nuttx/arch/arm/src/stm32/stm32_serial.c b/nuttx/arch/arm/src/stm32/stm32_serial.c index 5572ee662..e1d6e4593 100644 --- a/nuttx/arch/arm/src/stm32/stm32_serial.c +++ b/nuttx/arch/arm/src/stm32/stm32_serial.c @@ -1267,9 +1267,12 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) break; } - /* TODO: Handle other termios settings. */ + /* TODO: Handle other termios settings. + * Note that only cfgetispeed is used besued we have knowledge + * that only one speed is supported. + */ - priv->baud = termiosp->c_speed; + priv->baud = cfgetispeed(termiosp); up_setspeed(dev); } break; diff --git a/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c b/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c index 5fc1512b1..4073c2dc6 100644 --- a/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c +++ b/nuttx/arch/mips/src/pic32mx/pic32mx-serial.c @@ -624,9 +624,12 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg) break; } - /* TODO: Handle other termios settings. */ + /* TODO: Handle other termios settings. + * Note that only cfgetispeed is used besued we have knowledge + * that only one speed is supported. + */ - priv->baud = termiosp->c_speed; + priv->baud = cfgetispeed(termiosp); pic32mx_uartconfigure(priv->uartbase, priv->baud, priv->parity, priv->bits, priv->stopbits2); } |