diff options
Diffstat (limited to 'nuttx/arch')
| -rw-r--r-- | nuttx/arch/arm/src/sam34/sam3u_gpio.h | 184 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sam34/sam4l_gpio.h | 359 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sam34/sam_gpio.c | 16 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sam34/sam_gpio.h | 114 |
4 files changed, 563 insertions, 110 deletions
diff --git a/nuttx/arch/arm/src/sam34/sam3u_gpio.h b/nuttx/arch/arm/src/sam34/sam3u_gpio.h new file mode 100644 index 000000000..7a9fea1ca --- /dev/null +++ b/nuttx/arch/arm/src/sam34/sam3u_gpio.h @@ -0,0 +1,184 @@ +/************************************************************************************ + * arch/arm/src/sam34/sam3u_gpio.h + * + * Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_SAM34_SAM3U_GPIO_H +#define __ARCH_ARM_SRC_SAM34_SAM3U_GPIO_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/* Bit-encoded input to sam_configgpio() ********************************************/ + +/* 16-bit Encoding: + * MMCC CII. VPPB BBBB + */ + +/* Input/Output mode: + * + * MM.. .... .... .... + */ + +#define GPIO_MODE_SHIFT (14) /* Bits 14-15: GPIO mode */ +#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT) +# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* Input */ +# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* Output */ +# define GPIO_PERIPHA (2 << GPIO_MODE_SHIFT) /* Controlled by periph A signal */ +# define GPIO_PERIPHB (3 << GPIO_MODE_SHIFT) /* Controlled by periph B signal */ + +/* These bits set the configuration of the pin: + * ..CC C... .... .... + */ + +#define GPIO_CFG_SHIFT (11) /* Bits 11-13: GPIO configuration bits */ +#define GPIO_CFG_MASK (7 << GPIO_CFG_SHIFT) +# define GPIO_CFG_DEFAULT (0 << GPIO_CFG_SHIFT) /* Default, no attribute */ +# define GPIO_CFG_PULLUP (1 << GPIO_CFG_SHIFT) /* Bit 11: Internal pull-up */ +# define GPIO_CFG_DEGLITCH (2 << GPIO_CFG_SHIFT) /* Bit 12: Internal glitch filter */ +# define GPIO_CFG_OPENDRAIN (4 << GPIO_CFG_SHIFT) /* Bit 13: Open drain */ + +/* Additional interrupt modes: + * .... .II. .... .... + */ + +#define GPIO_INT_SHIFT (9) /* Bits 9-10: GPIO configuration bits */ +#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT) +# define GPIO_INT_LEVEL (1 << 10) /* Bit 10: Level detection interrupt */ +# define GPIO_INT_EDGE (0) /* (vs. Edge detection interrupt) */ +# define GPIO_INT_HIGHLEVEL (1 << 9) /* Bit 9: High level detection interrupt */ +# define GPIO_INT_LOWLEVEL (0) /* (vs. Low level detection interrupt) */ +# define GPIO_INT_RISING (1 << 9) /* Bit 9: Rising edge detection interrupt */ +# define GPIO_INT_FALLING (0) /* (vs. Falling edge detection interrupt) */ + +/* If the pin is an GPIO output, then this identifies the initial output value: + * .... .... V... .... + */ + +#define GPIO_OUTPUT_SET (1 << 7) /* Bit 7: Inital value of output */ +#define GPIO_OUTPUT_CLEAR (0) + +/* This identifies the GPIO port: + * .... .... .PP. .... + */ + +#define GPIO_PORT_SHIFT (5) /* Bit 5-6: Port number */ +#define GPIO_PORT_MASK (3 << GPIO_PORT_SHIFT) +# define GPIO_PORT_PIOA (0 << GPIO_PORT_SHIFT) +# define GPIO_PORT_PIOB (1 << GPIO_PORT_SHIFT) +# define GPIO_PORT_PIOC (2 << GPIO_PORT_SHIFT) + +/* This identifies the bit in the port: + * .... .... ...B BBBB + */ + +#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */ +#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT) +#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT) +#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT) +#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT) +#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT) +#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT) +#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT) +#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT) +#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT) +#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT) +#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT) +#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT) +#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT) +#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT) +#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT) +#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT) +#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT) +#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT) +#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT) +#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT) +#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT) +#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT) +#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT) +#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT) +#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT) +#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT) +#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT) +#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT) +#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT) +#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT) +#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT) +#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT) +#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/* Must be big enough to hold the 16-bit encoding */ + +typedef uint16_t gpio_pinset_t; + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + + #undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_SAM34_SAM3U_GPIO_H */ diff --git a/nuttx/arch/arm/src/sam34/sam4l_gpio.h b/nuttx/arch/arm/src/sam34/sam4l_gpio.h new file mode 100644 index 000000000..2a65ac134 --- /dev/null +++ b/nuttx/arch/arm/src/sam34/sam4l_gpio.h @@ -0,0 +1,359 @@ +/************************************************************************************ + * arch/arm/src/sam34/sam4l_gpio.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_SAM34_SAM4L_GPIO_H +#define __ARCH_ARM_SRC_SAM34_SAM4L_GPIO_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/* Bit-encoded input to sam_configgpio() ********************************************/ + +/* 24-bit Encoding. This could be compacted into 16-bits by making the bit usage + * mode specific. However, by giving each bit field a unique position, we handle + * bad combinations of properties safely. + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: MMRR .... .... IIGT .PPB BBBB + * GPIO Output: MM.. .... DDSV .... .PPB BBBB + * Peripheral: MM.. FFFE .... IIG. .PPB BBBB + * ------------ ----------------------------- + * MMRR FFFE DDSV IIGT .PPB BBBB + */ + +/* Input/output/peripheral mode: + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: MM.. .... .... .... .... .... + * GPIO Output: MM.. .... .... .... .... .... + * Peripheral: MM.. .... .... .... .... .... + */ + +#define GPIO_MODE_SHIFT (22) /* Bits 22-23: GPIO mode */ +#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT) +# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* GPIO Input */ +# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* GPIO Output */ +# define GPIO_PERIPHERAL (2 << GPIO_MODE_SHIFT) /* Controlled by peripheral */ +# define GPIO_INTERRUPT (3 << GPIO_MODE_SHIFT) /* Interrupting input */ + +/* Pull-up/down resistor control for inputs + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: ..RR .... .... .... .... .... + * GPIO Output: .... .... .... .... .... .... + * Peripheral: .... .... .... .... .... .... + */ + +#define GPIO_PULL_SHIFT (20) /* Bits 20-21: Pull-up/down resistor control */ +#define GPIO_PULL_MASK (3 << GPIO_FUNC_SHIFT) +# define GPIO_PULL_NONE (0 << GPIO_FUNC_SHIFT) +# define GPIO_PULL_UP (1 << GPIO_FUNC_SHIFT) +# define GPIO_PULL_DOWN (2 << GPIO_FUNC_SHIFT) +# define GPIO_PULL_BUSKEEPER (3 << GPIO_FUNC_SHIFT) + +/* Peripheral Function + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... .... .... .... + * GPIO Output: .... .... .... .... .... .... + * Peripheral: .... FFF. .... .... .... .... + */ + +#define GPIO_FUNC_SHIFT (17) /* Bits 17-19: Peripheral function */ +#define GPIO_FUNC_MASK (7 << GPIO_FUNC_SHIFT) +# define _GPIO_FUNCA (0 << GPIO_FUNC_SHIFT) /* Function A */ +# define _GPIO_FUNCB (1 << GPIO_FUNC_SHIFT) /* Function B */ +# define _GPIO_FUNCC (2 << GPIO_FUNC_SHIFT) /* Function C */ +# define _GPIO_FUNCD (3 << GPIO_FUNC_SHIFT) /* Function D */ +# define _GPIO_FUNCE (4 << GPIO_FUNC_SHIFT) /* Function E */ +# define _GPIO_FUNCF (5 << GPIO_FUNC_SHIFT) /* Function F */ +# define _GPIO_FUNCG (6 << GPIO_FUNC_SHIFT) /* Function G */ +# define _GPIO_FUNCH (7 << GPIO_FUNC_SHIFT) /* Function H */ + +/* Extended input/output/peripheral mode: + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... .... .... .... + * GPIO Output: .... .... .... .... .... .... + * Peripheral: MM.. FFF. .... .... .... .... + */ + +# define GPIO_FUNCA (GPIO_PERIPHERAL | _GPIO_FUNCA) /* Function A */ +# define GPIO_FUNCB (GPIO_PERIPHERAL | _GPIO_FUNCB) /* Function B */ +# define GPIO_FUNCC (GPIO_PERIPHERAL | _GPIO_FUNCC) /* Function C */ +# define GPIO_FUNCD (GPIO_PERIPHERAL | _GPIO_FUNCD) /* Function D */ +# define GPIO_FUNCE (GPIO_PERIPHERAL | _GPIO_FUNCE) /* Function E */ +# define GPIO_FUNCF (GPIO_PERIPHERAL | _GPIO_FUNCF) /* Function F */ +# define GPIO_FUNCG (GPIO_PERIPHERAL | _GPIO_FUNCG) /* Function G */ +# define GPIO_FUNCH (GPIO_PERIPHERAL | _GPIO_FUNCH) /* Function H */ + +/* Peripheral event control + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... .... .... .... + * GPIO Output: .... .... .... .... .... .... + * Peripheral: .... ...E .... .... .... .... + */ + +#define GPIO_SCHMITT_TRIGGER (1 << 16) /* Bit 16: Enable peripheral events */ + +/* Output drive control + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... .... .... .... + * GPIO Output: .... .... DD.. .... .... .... + * Peripheral: .... .... .... .... .... .... + */ + +#define GPIO_DRIVE_SHIFT (14) /* Bits 14-15: Interrupting input control */ +#define GPIO_DRIVE_MASK (3 << GPIO_INT_SHIFT) /* Lowest drive strength*/ +# define GPIO_DRIVE_LOW (0 << GPIO_INT_SHIFT) +# define GPIO_DRIVE_MEDLOW (1 << GPIO_INT_SHIFT) +# define GPIO_DRIVE_MEDHIGH (2 << GPIO_INT_SHIFT) +# define GPIO_DRIVE_HIGH (3 << GPIO_INT_SHIFT) /* Highest drive strength */ + +/* Output slew rate control + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... .... .... .... + * GPIO Output: .... .... ..S. .... .... .... + * Peripheral: .... .... .... .... .... .... + */ + +#define GPIO_SLEW (1 << 13) /* Bit 13: Enable output slew control */ + +/* If the pin is an GPIO output, then this identifies the initial output value: + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... .... .... .... + * GPIO Output: .... .... ...V .... .... .... + * Peripheral: .... .... .... .... .... .... + */ + +#define GPIO_OUTPUT_SET (1 << 12) /* Bit 12: Inital value of output */ +#define GPIO_OUTPUT_CLEAR (0) + +/* Selections for an interrupting input and peripheral events: + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... II.. .... .... + * GPIO Output: .... .... .... .... .... .... + * Peripheral: .... .... .... II.. .... .... + */ + +#define GPIO_INT_SHIFT (10) /* Bits 10-11: Interrupting input control */ +#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT) +# define GPIO_INT_CHANGE (0 << GPIO_INT_SHIFT) /* Pin change */ +# define GPIO_INT_RISING (1 << GPIO_INT_SHIFT) /* Rising edge */ +# define GPIO_INT_FALLING (2 << GPIO_INT_SHIFT) /* Falling edge */ + +/* Enable input/periphal glitch filter + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... ..G. .... .... + * GPIO Output: .... .... .... .... .... .... + * Peripheral: .... .... .... ..G. .... .... + */ + +#define GPIO_GLITCH_FILTER (1 << 9) /* Bit 9: Enable input/peripheral glitch filter */ + +/* Input Schmitt trigger + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... ...T .... .... + * GPIO Output: .... .... .... .... .... .... + * Peripheral: .... .... .... .... .... .... + */ + +#define GPIO_SCHMITT_TRIGGER (1 << 8) /* Bit 8: Enable Input Schmitt trigger */ + +/* This identifies the GPIO port: + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... .... .PP. .... + * GPIO Output: .... .... .... .... .PP. .... + * Peripheral: .... .... .... .... .PP. .... + */ + +#define GPIO_PORT_SHIFT (5) /* Bit 5-6: Port number */ +#define GPIO_PORT_MASK (3 << GPIO_PORT_SHIFT) +# define GPIO_PORTA (0 << GPIO_PORT_SHIFT) +# define GPIO_PORTB (1 << GPIO_PORT_SHIFT) +# define GPIO_PORTC (2 << GPIO_PORT_SHIFT) + +/* This identifies the bit in the port: + * + * MODE BITFIELDS + * ------------ ----------------------------- + * 2222 1111 1111 1100 0000 0000 + * 3210 9876 5432 1098 7654 3210 + * ------------ ----------------------------- + * GPIO Input: .... .... .... .... ...B BBBB + * GPIO Output: .... .... .... .... ...B BBBB + * Peripheral: .... .... .... .... ...B BBBB + */ + +#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */ +#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT) +#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT) +#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT) +#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT) +#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT) +#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT) +#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT) +#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT) +#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT) +#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT) +#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT) +#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT) +#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT) +#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT) +#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT) +#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT) +#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT) +#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT) +#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT) +#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT) +#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT) +#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT) +#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT) +#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT) +#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT) +#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT) +#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT) +#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT) +#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT) +#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT) +#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT) +#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT) +#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT) + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/* Must be big enough to hold the 24-bit encoding */ + +typedef uint32_t gpio_pinset_t; + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_ARM_SRC_SAM34_SAM4L_GPIO_H */ diff --git a/nuttx/arch/arm/src/sam34/sam_gpio.c b/nuttx/arch/arm/src/sam34/sam_gpio.c index 123c3d4b9..0924857b9 100644 --- a/nuttx/arch/arm/src/sam34/sam_gpio.c +++ b/nuttx/arch/arm/src/sam34/sam_gpio.c @@ -81,7 +81,7 @@ static const char g_portchar[4] = { 'A', 'B', 'C', 'D' }; * ****************************************************************************/ -static inline uintptr_t sam_gpiobase(uint16_t cfgset) +static inline uintptr_t sam_gpiobase(gpio_pinset_t cfgset) { int port = (cfgset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; return SAM_PION_BASE(port); @@ -95,7 +95,7 @@ static inline uintptr_t sam_gpiobase(uint16_t cfgset) * ****************************************************************************/ -static inline int sam_gpiopin(uint16_t cfgset) +static inline int sam_gpiopin(gpio_pinset_t cfgset) { return 1 << ((cfgset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT); } @@ -109,7 +109,7 @@ static inline int sam_gpiopin(uint16_t cfgset) ****************************************************************************/ static inline int sam_configinput(uintptr_t base, uint32_t pin, - uint16_t cfgset) + gpio_pinset_t cfgset) { /* Disable interrupts on the pin */ @@ -159,7 +159,7 @@ static inline int sam_configinput(uintptr_t base, uint32_t pin, ****************************************************************************/ static inline int sam_configoutput(uintptr_t base, uint32_t pin, - uint16_t cfgset) + gpio_pinset_t cfgset) { /* Disable interrupts on the pin */ @@ -215,7 +215,7 @@ static inline int sam_configoutput(uintptr_t base, uint32_t pin, ****************************************************************************/ static inline int sam_configperiph(uintptr_t base, uint32_t pin, - uint16_t cfgset) + gpio_pinset_t cfgset) { uint32_t regval; @@ -265,7 +265,7 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin, * ****************************************************************************/ -int sam_configgpio(uint16_t cfgset) +int sam_configgpio(gpio_pinset_t cfgset) { uintptr_t base = sam_gpiobase(cfgset); uint32_t pin = sam_gpiopin(cfgset); @@ -301,7 +301,7 @@ int sam_configgpio(uint16_t cfgset) * ****************************************************************************/ -void sam_gpiowrite(uint16_t pinset, bool value) +void sam_gpiowrite(gpio_pinset_t pinset, bool value) { uintptr_t base = sam_gpiobase(pinset); uint32_t pin = sam_gpiopin(pinset); @@ -324,7 +324,7 @@ void sam_gpiowrite(uint16_t pinset, bool value) * ****************************************************************************/ -bool sam_gpioread(uint16_t pinset) +bool sam_gpioread(gpio_pinset_t pinset) { uintptr_t base = sam_gpiobase(pinset); uint32_t pin = sam_gpiopin(pinset); diff --git a/nuttx/arch/arm/src/sam34/sam_gpio.h b/nuttx/arch/arm/src/sam34/sam_gpio.h index 3324cd3b3..53f36c8fb 100644 --- a/nuttx/arch/arm/src/sam34/sam_gpio.h +++ b/nuttx/arch/arm/src/sam34/sam_gpio.h @@ -47,6 +47,14 @@ #include "chip.h" +#if defined(CONFIG_ARCH_CHIP_SAM3U) +# include "sam3u_gpio.h" +#elif defined(CONFIG_ARCH_CHIP_SAM4L) +# include "sam4l_gpio.h" +#else +# error Unrecognized SAM architecture +#endif + /************************************************************************************ * Definitions ************************************************************************************/ @@ -63,104 +71,6 @@ # undef CONFIG_DEBUG_GPIO #endif -/* Bit-encoded input to sam_configgpio() ********************************************/ - -/* 16-bit Encoding: - * MMCC CII. VPPB BBBB - */ - -/* Input/Output mode: - * - * MM.. .... .... .... - */ - -#define GPIO_MODE_SHIFT (14) /* Bits 14-15: GPIO mode */ -#define GPIO_MODE_MASK (3 << GPIO_MODE_SHIFT) -# define GPIO_INPUT (0 << GPIO_MODE_SHIFT) /* Input */ -# define GPIO_OUTPUT (1 << GPIO_MODE_SHIFT) /* Output */ -# define GPIO_PERIPHA (2 << GPIO_MODE_SHIFT) /* Controlled by periph A signal */ -# define GPIO_PERIPHB (3 << GPIO_MODE_SHIFT) /* Controlled by periph B signal */ - -/* These bits set the configuration of the pin: - * ..CC C... .... .... - */ - -#define GPIO_CFG_SHIFT (11) /* Bits 11-13: GPIO configuration bits */ -#define GPIO_CFG_MASK (7 << GPIO_CFG_SHIFT) -# define GPIO_CFG_DEFAULT (0 << GPIO_CFG_SHIFT) /* Default, no attribute */ -# define GPIO_CFG_PULLUP (1 << GPIO_CFG_SHIFT) /* Bit 11: Internal pull-up */ -# define GPIO_CFG_DEGLITCH (2 << GPIO_CFG_SHIFT) /* Bit 12: Internal glitch filter */ -# define GPIO_CFG_OPENDRAIN (4 << GPIO_CFG_SHIFT) /* Bit 13: Open drain */ - -/* Additional interrupt modes: - * .... .II. .... .... - */ - -#define GPIO_INT_SHIFT (9) /* Bits 9-10: GPIO configuration bits */ -#define GPIO_INT_MASK (3 << GPIO_INT_SHIFT) -# define GPIO_INT_LEVEL (1 << 10) /* Bit 10: Level detection interrupt */ -# define GPIO_INT_EDGE (0) /* (vs. Edge detection interrupt) */ -# define GPIO_INT_HIGHLEVEL (1 << 9) /* Bit 9: High level detection interrupt */ -# define GPIO_INT_LOWLEVEL (0) /* (vs. Low level detection interrupt) */ -# define GPIO_INT_RISING (1 << 9) /* Bit 9: Rising edge detection interrupt */ -# define GPIO_INT_FALLING (0) /* (vs. Falling edge detection interrupt) */ - -/* If the pin is an GPIO output, then this identifies the initial output value: - * .... .... V... .... - */ - -#define GPIO_OUTPUT_SET (1 << 7) /* Bit 7: Inital value of output */ -#define GPIO_OUTPUT_CLEAR (0) - -/* This identifies the GPIO port: - * .... .... .PP. .... - */ - -#define GPIO_PORT_SHIFT (5) /* Bit 5-6: Port number */ -#define GPIO_PORT_MASK (3 << GPIO_PORT_SHIFT) -# define GPIO_PORT_PIOA (0 << GPIO_PORT_SHIFT) -# define GPIO_PORT_PIOB (1 << GPIO_PORT_SHIFT) -# define GPIO_PORT_PIOC (2 << GPIO_PORT_SHIFT) - -/* This identifies the bit in the port: - * .... .... ...B BBBB - */ - -#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */ -#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT) -#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT) -#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT) -#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT) -#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT) -#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT) -#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT) -#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT) -#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT) -#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT) -#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT) -#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT) -#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT) -#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT) -#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT) -#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT) -#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT) -#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT) -#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT) -#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT) -#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT) -#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT) -#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT) -#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT) -#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT) -#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT) -#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT) -#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT) -#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT) -#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT) -#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT) -#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT) -#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT) - /************************************************************************************ * Public Types ************************************************************************************/ @@ -210,7 +120,7 @@ void sam_gpioirqinitialize(void); * ************************************************************************************/ -int sam_configgpio(uint16_t cfgset); +int sam_configgpio(gpio_pinset_t cfgset); /************************************************************************************ * Name: sam_gpiowrite @@ -220,7 +130,7 @@ int sam_configgpio(uint16_t cfgset); * ************************************************************************************/ -void sam_gpiowrite(uint16_t pinset, bool value); +void sam_gpiowrite(gpio_pinset_t pinset, bool value); /************************************************************************************ * Name: sam_gpioread @@ -230,7 +140,7 @@ void sam_gpiowrite(uint16_t pinset, bool value); * ************************************************************************************/ -bool sam_gpioread(uint16_t pinset); +bool sam_gpioread(gpio_pinset_t pinset); /************************************************************************************ * Name: sam_gpioirq @@ -241,7 +151,7 @@ bool sam_gpioread(uint16_t pinset); ************************************************************************************/ #ifdef CONFIG_GPIO_IRQ -void sam_gpioirq(uint16_t pinset); +void sam_gpioirq(gpio_pinset_t pinset); #else # define sam_gpioirq(pinset) #endif |