diff options
Diffstat (limited to 'nuttx/configs/samv71-xult/src/sam_sdram.c')
| -rw-r--r-- | nuttx/configs/samv71-xult/src/sam_sdram.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/nuttx/configs/samv71-xult/src/sam_sdram.c b/nuttx/configs/samv71-xult/src/sam_sdram.c index 2c9799d07..7cbb4b4f5 100644 --- a/nuttx/configs/samv71-xult/src/sam_sdram.c +++ b/nuttx/configs/samv71-xult/src/sam_sdram.c @@ -90,9 +90,11 @@ * None * * Assumptions: - * The DDR memory regions is configured as strongly ordered memory. When - * we complete initialization of SDRAM and it is ready for use, we will - * make DRAM into normal, cached memory. + * This test runs early in initialization before I- and D-caches are + * enabled. + * + * NOTE: Since the delay loop is calibrate with caches in enabled, the + * calls to up_udelay() are wrong ty orders of magnitude. * ****************************************************************************/ |