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Diffstat (limited to 'nuttx/configs/shenzhou/src/shenzhou-internal.h')
-rw-r--r--nuttx/configs/shenzhou/src/shenzhou-internal.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/nuttx/configs/shenzhou/src/shenzhou-internal.h b/nuttx/configs/shenzhou/src/shenzhou-internal.h
index 095cba485..51ab10553 100644
--- a/nuttx/configs/shenzhou/src/shenzhou-internal.h
+++ b/nuttx/configs/shenzhou/src/shenzhou-internal.h
@@ -295,22 +295,29 @@
(STM32_PERIPHBB_BASE + ((offs + STM32_GPIO_BRR_OFFSET) << 5) + ((pin) << 2))
#define LCD_BIT_SET(offs,pin) \
(STM32_PERIPHBB_BASE + ((offs + STM32_GPIO_BSRR_OFFSET) << 5) + ((pin) << 2))
+#define LCD_BIT_READ(offs,pin) \
+ (STM32_PERIPHBB_BASE + ((offs + STM32_GPIO_ODR_OFFSET) << 5) + ((pin) << 2))
#define LCD_RS_CLEAR LCD_BIT_CLEAR(STM32_GPIOD_OFFSET, 13) /* GPIO_PORTD|GPIO_PIN13 */
#define LCD_RS_SET LCD_BIT_SET(STM32_GPIOD_OFFSET, 13)
+#define LCD_RS_READ LCD_BIT_READ(STM32_GPIOD_OFFSET, 13)
#define LCD_CS_CLEAR LCD_BIT_CLEAR(STM32_GPIOC_OFFSET, 8) /* GPIO_PORTC|GPIO_PIN8 */
#define LCD_CS_SET LCD_BIT_SET(STM32_GPIOC_OFFSET, 8)
+#define LCD_CS_READ LCD_BIT_READ(STM32_GPIOC_OFFSET, 8)
#define LCD_RD_CLEAR LCD_BIT_CLEAR(STM32_GPIOD_OFFSET, 15) /* GPIO_PORTD|GPIO_PIN15 */
#define LCD_RD_SET LCD_BIT_SET(STM32_GPIOD_OFFSET, 15)
+#define LCD_RD_READ LCD_BIT_READ(STM32_GPIOD_OFFSET, 15)
#define LCD_WR_CLEAR LCD_BIT_CLEAR(STM32_GPIOD_OFFSET, 14) /* GPIO_PORTD|GPIO_PIN14 */
#define LCD_WR_SET LCD_BIT_SET(STM32_GPIOD_OFFSET, 14)
+#define LCD_WR_READ LCD_BIT_READ(STM32_GPIOD_OFFSET, 14)
#define LCD_LE_CLEAR LCD_BIT_CLEAR(STM32_GPIOB_OFFSET, 2) /* GPIO_PORTB|GPIO_PIN2 */
#define LCD_LE_SET LCD_BIT_SET(STM32_GPIOB_OFFSET, 2)
+#define LCD_LE_READ LCD_BIT_READ(STM32_GPIOB_OFFSET, 2)
#define LCD_CRL STM32_GPIOE_CRL
#define LCD_CRH STM32_GPIOE_CRH
-#define LCD_INPUT 0x44444444
-#define LCD_OUTPUT 0x33333333
+#define LCD_INPUT 0x44444444 /* Floating input */
+#define LCD_OUTPUT 0x33333333 /* Push/pull output */
#define LCD_ODR STM32_GPIOE_ODR
#define LCD_IDR STM32_GPIOE_IDR