summaryrefslogtreecommitdiff
path: root/nuttx/configs
diff options
context:
space:
mode:
Diffstat (limited to 'nuttx/configs')
-rw-r--r--nuttx/configs/stm32f429i-disco/Kconfig73
-rw-r--r--nuttx/configs/stm32f429i-disco/README.txt24
-rw-r--r--nuttx/configs/stm32f429i-disco/extflash/Make.defs110
-rw-r--r--nuttx/configs/stm32f429i-disco/extflash/defconfig949
-rw-r--r--nuttx/configs/stm32f429i-disco/extflash/setenv.sh77
-rw-r--r--nuttx/configs/stm32f429i-disco/include/board.h22
-rw-r--r--nuttx/configs/stm32f429i-disco/src/stm32f429i-disco-internal.h10
-rw-r--r--nuttx/configs/stm32f429i-disco/src/up_boot.c3
-rw-r--r--nuttx/configs/stm32f429i-disco/src/up_nsh.c142
-rw-r--r--nuttx/configs/stm32f429i-disco/src/up_spi.c124
10 files changed, 1482 insertions, 52 deletions
diff --git a/nuttx/configs/stm32f429i-disco/Kconfig b/nuttx/configs/stm32f429i-disco/Kconfig
index dc84c7e6f..f2e5bfe05 100644
--- a/nuttx/configs/stm32f429i-disco/Kconfig
+++ b/nuttx/configs/stm32f429i-disco/Kconfig
@@ -3,7 +3,78 @@
# see misc/tools/kconfig-language.txt.
#
-if ARCH_BOARD_STM32F429_DISCO
+if ARCH_BOARD_STM32F429I_DISCO
+
+config STM32F429I_DISCO_FLASH
+ bool "MTD driver for external 8Mbyte SST25 FLASH on SPI4"
+ default n
+ select MTD
+ select MTD_SST25XX
+ select MTD_SMART
+ select FS_SMARTFS
+ select STM32_SPI4
+ select MTD_BYTE_WRITE
+ ---help---
+ Configures an MTD device for use with the onboard flash
+
+config STM32F429I_DISCO_FLASH_MINOR
+ int "Minor number for the FLASH /dev/smart entry"
+ default 0
+ depends on STM32F429I_DISCO_FLASH
+ ---help---
+ Sets the minor number for the FLASH MTD /dev entry
+
+config STM32F429I_DISCO_FLASH_PART
+ bool "Enable partition support on FLASH"
+ default n
+ depends on STM32F429I_DISCO_FLASH
+ ---help---
+ Enables creation of partitions on the FLASH
+
+config STM32F429I_DISCO_FLASH_CONFIG_PART
+ bool "Create application config data partition on FLASH"
+ default y
+ depends on STM32F429I_DISCO_FLASH_PART
+ depends on PLATFORM_CONFIGDATA
+ ---help---
+ Enables creation of a /dev/config partition on the FLASH
+
+config STM32F429I_DISCO_FLASH_CONFIG_PART_NUMBER
+ int "Index number of config partition (in list below)"
+ default 0
+ depends on STM32F429I_DISCO_FLASH_CONFIG_PART
+ ---help---
+ Specifies the index number of the config data partition
+ from the partition list.
+
+config STM32F429I_DISCO_FLASH_PART_LIST
+ string "Flash partition size list"
+ default "4,8188"
+ depends on STM32F429I_DISCO_FLASH_PART
+ ---help---
+ Comma separated list of partition sizes in KB.
+
+config STM32F429I_DISCO_RAMMTD
+ bool "MTD driver for SMARTFS RAM disk"
+ default n
+ select MTD
+ select RAMMTD
+ ---help---
+ Configures an MTD based RAM device for use with SMARTFS.
+
+config STM32F429I_DISCO_RAMMTD_MINOR
+ int "Minor number for RAM /dev/smart entry"
+ default 1
+ depends on STM32F429I_DISCO_RAMMTD
+ ---help---
+ Sets the minor number for the RAM MTD /dev entry
+
+config STM32F429I_DISCO_RAMMTD_SIZE
+ int "Size in KB of the RAM device to create"
+ default 32
+ depends on STM32F429I_DISCO_RAMMTD
+ ---help---
+ Sets the size of static RAM allocation for the SMART RAM device
config PM_BUTTONS
bool "PM Button support"
diff --git a/nuttx/configs/stm32f429i-disco/README.txt b/nuttx/configs/stm32f429i-disco/README.txt
index e9c3ef2d0..52d86723a 100644
--- a/nuttx/configs/stm32f429i-disco/README.txt
+++ b/nuttx/configs/stm32f429i-disco/README.txt
@@ -816,6 +816,30 @@ Where <subdir> is one of the following:
nsh> umount /mnt/stuff
+ extflash:
+ ---------
+
+ This is another NSH example. If differs from other 'nsh' configurations
+ in that this configuration defines an external 8 MByte SPI FLASH (the
+ SST25VF064C part from Silicon Storage Technology, Inc.) which must be
+ be connected to the Discovery board's SPI4 pins on the expansion pins.
+ Additionally, this demo uses UART1 for the console
+
+ NOTES:
+
+ 1. This configuration assumes an SST25VF064C 8Mbyte SPI FLASH is
+ connected to SPI4 on the following Discovery board Pins:
+
+ SCK: Port PE2 Board Connector P1, Pin 15
+ MOSI: Port PE6 Board Connector P1, Pin 11
+ MISO: Port PE5 Board Connector P1, Pin 14
+ CS: Port PE4 Board Connector P1, Pin 13
+
+ 2. This configuration does have UART1 output enabled and set up as
+ the system logging device. To use this UART, you must add an
+ external RS-232 line driver to the UART1 pins of the DISCO board
+ on PA9 and PA10 of connector P1.
+
ostest:
------
This configuration directory, performs a simple OS test using
diff --git a/nuttx/configs/stm32f429i-disco/extflash/Make.defs b/nuttx/configs/stm32f429i-disco/extflash/Make.defs
new file mode 100644
index 000000000..16e17e75f
--- /dev/null
+++ b/nuttx/configs/stm32f429i-disco/extflash/Make.defs
@@ -0,0 +1,110 @@
+############################################################################
+# configs/stm32f429i-disco/usbnsh/Make.defs
+#
+# Copyright (C) 2013 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+ # Windows-native toolchains
+ DIRLINK = $(TOPDIR)/tools/copydir.sh
+ DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+ MKDEP = $(TOPDIR)/tools/mknulldeps.sh
+ ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+ ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+ ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+ MAXOPTIMIZATION = -O2
+else
+ # Linux/Cygwin-native toolchain
+ MKDEP = $(TOPDIR)/tools/mkdeps.sh
+ ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+ ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+ ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ ARCHOPTIMIZATION = -g
+else
+ ARCHOPTIMIZATION = $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow
+ARCHWARNINGSXX = -Wall -Wshadow
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -g -pipe
+HOSTLDFLAGS =
+
diff --git a/nuttx/configs/stm32f429i-disco/extflash/defconfig b/nuttx/configs/stm32f429i-disco/extflash/defconfig
new file mode 100644
index 000000000..0245ebd34
--- /dev/null
+++ b/nuttx/configs/stm32f429i-disco/extflash/defconfig
@@ -0,0 +1,949 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+CONFIG_NUTTX_NEWCONFIG=y
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+CONFIG_APPS_DIR="../apps"
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+
+#
+# Debug Options
+#
+CONFIG_DEBUG=y
+CONFIG_ARCH_HAVE_STACKCHECK=y
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+# CONFIG_DEBUG_VERBOSE is not set
+
+#
+# Subsystem Debug Options
+#
+# CONFIG_DEBUG_MM is not set
+# CONFIG_DEBUG_SCHED is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_DEBUG_LIB is not set
+# CONFIG_DEBUG_BINFMT is not set
+# CONFIG_DEBUG_GRAPHICS is not set
+# CONFIG_DEBUG_IRQ is not set
+# CONFIG_DEBUG_STACK is not set
+# CONFIG_DEBUG_HEAP is not set
+
+#
+# Driver Debug Options
+#
+# CONFIG_DEBUG_LEDS is not set
+# CONFIG_DEBUG_ANALOG is not set
+# CONFIG_DEBUG_SPI is not set
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_DEBUG_AUDIO is not set
+CONFIG_DEBUG_SYMBOLS=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_8051 is not set
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RGMP is not set
+# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_CALYPSO is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_IMX is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+CONFIG_ARCH_CHIP_STM32=y
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+CONFIG_ARCH_CORTEXM4=y
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32"
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+# CONFIG_ARMV7M_CMNVECTOR is not set
+CONFIG_ARCH_HAVE_FPU=y
+# CONFIG_ARCH_FPU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARMV7M_MPU is not set
+# CONFIG_DEBUG_HARDFAULT is not set
+
+#
+# ARMV7M Configuration Options
+#
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32L151C6 is not set
+# CONFIG_ARCH_CHIP_STM32L151C8 is not set
+# CONFIG_ARCH_CHIP_STM32L151CB is not set
+# CONFIG_ARCH_CHIP_STM32L151R6 is not set
+# CONFIG_ARCH_CHIP_STM32L151R8 is not set
+# CONFIG_ARCH_CHIP_STM32L151RB is not set
+# CONFIG_ARCH_CHIP_STM32L151V6 is not set
+# CONFIG_ARCH_CHIP_STM32L151V8 is not set
+# CONFIG_ARCH_CHIP_STM32L151VB is not set
+# CONFIG_ARCH_CHIP_STM32L152C6 is not set
+# CONFIG_ARCH_CHIP_STM32L152C8 is not set
+# CONFIG_ARCH_CHIP_STM32L152CB is not set
+# CONFIG_ARCH_CHIP_STM32L152R6 is not set
+# CONFIG_ARCH_CHIP_STM32L152R8 is not set
+# CONFIG_ARCH_CHIP_STM32L152RB is not set
+# CONFIG_ARCH_CHIP_STM32L152V6 is not set
+# CONFIG_ARCH_CHIP_STM32L152V8 is not set
+# CONFIG_ARCH_CHIP_STM32L152VB is not set
+# CONFIG_ARCH_CHIP_STM32F100C8 is not set
+# CONFIG_ARCH_CHIP_STM32F100CB is not set
+# CONFIG_ARCH_CHIP_STM32F100R8 is not set
+# CONFIG_ARCH_CHIP_STM32F100RB is not set
+# CONFIG_ARCH_CHIP_STM32F100RC is not set
+# CONFIG_ARCH_CHIP_STM32F100RD is not set
+# CONFIG_ARCH_CHIP_STM32F100RE is not set
+# CONFIG_ARCH_CHIP_STM32F100V8 is not set
+# CONFIG_ARCH_CHIP_STM32F100VB is not set
+# CONFIG_ARCH_CHIP_STM32F100VC is not set
+# CONFIG_ARCH_CHIP_STM32F100VD is not set
+# CONFIG_ARCH_CHIP_STM32F100VE is not set
+# CONFIG_ARCH_CHIP_STM32F103C4 is not set
+# CONFIG_ARCH_CHIP_STM32F103C8 is not set
+# CONFIG_ARCH_CHIP_STM32F103T8 is not set
+# CONFIG_ARCH_CHIP_STM32F103TB is not set
+# CONFIG_ARCH_CHIP_STM32F103CB is not set
+# CONFIG_ARCH_CHIP_STM32F103R8 is not set
+# CONFIG_ARCH_CHIP_STM32F103RB is not set
+# CONFIG_ARCH_CHIP_STM32F103V8 is not set
+# CONFIG_ARCH_CHIP_STM32F103VB is not set
+# CONFIG_ARCH_CHIP_STM32F103RET6 is not set
+# CONFIG_ARCH_CHIP_STM32F103VCT6 is not set
+# CONFIG_ARCH_CHIP_STM32F103VET6 is not set
+# CONFIG_ARCH_CHIP_STM32F103ZET6 is not set
+# CONFIG_ARCH_CHIP_STM32F105VBT7 is not set
+# CONFIG_ARCH_CHIP_STM32F107VC is not set
+# CONFIG_ARCH_CHIP_STM32F207IG is not set
+# CONFIG_ARCH_CHIP_STM32F207ZE is not set
+# CONFIG_ARCH_CHIP_STM32F302CB is not set
+# CONFIG_ARCH_CHIP_STM32F302CC is not set
+# CONFIG_ARCH_CHIP_STM32F302RB is not set
+# CONFIG_ARCH_CHIP_STM32F302RC is not set
+# CONFIG_ARCH_CHIP_STM32F302VB is not set
+# CONFIG_ARCH_CHIP_STM32F302VC is not set
+# CONFIG_ARCH_CHIP_STM32F303CB is not set
+# CONFIG_ARCH_CHIP_STM32F303CC is not set
+# CONFIG_ARCH_CHIP_STM32F303RB is not set
+# CONFIG_ARCH_CHIP_STM32F303RC is not set
+# CONFIG_ARCH_CHIP_STM32F303VB is not set
+# CONFIG_ARCH_CHIP_STM32F303VC is not set
+# CONFIG_ARCH_CHIP_STM32F405RG is not set
+# CONFIG_ARCH_CHIP_STM32F405VG is not set
+# CONFIG_ARCH_CHIP_STM32F405ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407VE is not set
+# CONFIG_ARCH_CHIP_STM32F407VG is not set
+# CONFIG_ARCH_CHIP_STM32F407ZE is not set
+# CONFIG_ARCH_CHIP_STM32F407ZG is not set
+# CONFIG_ARCH_CHIP_STM32F407IE is not set
+# CONFIG_ARCH_CHIP_STM32F407IG is not set
+# CONFIG_ARCH_CHIP_STM32F427V is not set
+# CONFIG_ARCH_CHIP_STM32F427Z is not set
+# CONFIG_ARCH_CHIP_STM32F427I is not set
+# CONFIG_ARCH_CHIP_STM32F429V is not set
+CONFIG_ARCH_CHIP_STM32F429Z=y
+# CONFIG_ARCH_CHIP_STM32F429I is not set
+# CONFIG_ARCH_CHIP_STM32F429B is not set
+# CONFIG_ARCH_CHIP_STM32F429N is not set
+# CONFIG_STM32_STM32L15XX is not set
+# CONFIG_STM32_ENERGYLITE is not set
+# CONFIG_STM32_STM32F10XX is not set
+# CONFIG_STM32_VALUELINE is not set
+# CONFIG_STM32_CONNECTIVITYLINE is not set
+# CONFIG_STM32_PERFORMANCELINE is not set
+# CONFIG_STM32_HIGHDENSITY is not set
+# CONFIG_STM32_MEDIUMDENSITY is not set
+# CONFIG_STM32_LOWDENSITY is not set
+# CONFIG_STM32_STM32F20XX is not set
+# CONFIG_STM32_STM32F30XX is not set
+CONFIG_STM32_STM32F40XX=y
+CONFIG_STM32_STM32F429=y
+# CONFIG_STM32_DFU is not set
+
+#
+# STM32 Peripheral Support
+#
+# CONFIG_STM32_ADC1 is not set
+# CONFIG_STM32_ADC2 is not set
+# CONFIG_STM32_ADC3 is not set
+# CONFIG_STM32_BKPSRAM is not set
+# CONFIG_STM32_CAN1 is not set
+# CONFIG_STM32_CAN2 is not set
+# CONFIG_STM32_CCMDATARAM is not set
+# CONFIG_STM32_CRC is not set
+# CONFIG_STM32_CRYP is not set
+# CONFIG_STM32_DMA1 is not set
+# CONFIG_STM32_DMA2 is not set
+# CONFIG_STM32_DAC1 is not set
+# CONFIG_STM32_DAC2 is not set
+# CONFIG_STM32_DCMI is not set
+# CONFIG_STM32_ETHMAC is not set
+CONFIG_STM32_FSMC=y
+# CONFIG_STM32_HASH is not set
+# CONFIG_STM32_I2C1 is not set
+# CONFIG_STM32_I2C2 is not set
+# CONFIG_STM32_I2C3 is not set
+# CONFIG_STM32_LTDC is not set
+# CONFIG_STM32_OTGFS is not set
+# CONFIG_STM32_OTGHS is not set
+CONFIG_STM32_PWR=y
+CONFIG_STM32_RNG=y
+# CONFIG_STM32_SDIO is not set
+# CONFIG_STM32_SPI1 is not set
+# CONFIG_STM32_SPI2 is not set
+# CONFIG_STM32_SPI3 is not set
+CONFIG_STM32_SPI4=y
+CONFIG_STM32_SPI5=y
+# CONFIG_STM32_SPI6 is not set
+CONFIG_STM32_SYSCFG=y
+# CONFIG_STM32_TIM1 is not set
+# CONFIG_STM32_TIM2 is not set
+# CONFIG_STM32_TIM3 is not set
+# CONFIG_STM32_TIM4 is not set
+# CONFIG_STM32_TIM5 is not set
+# CONFIG_STM32_TIM6 is not set
+# CONFIG_STM32_TIM7 is not set
+# CONFIG_STM32_TIM8 is not set
+# CONFIG_STM32_TIM9 is not set
+# CONFIG_STM32_TIM10 is not set
+# CONFIG_STM32_TIM11 is not set
+# CONFIG_STM32_TIM12 is not set
+# CONFIG_STM32_TIM13 is not set
+# CONFIG_STM32_TIM14 is not set
+CONFIG_STM32_USART1=y
+# CONFIG_STM32_USART2 is not set
+# CONFIG_STM32_USART3 is not set
+# CONFIG_STM32_UART4 is not set
+# CONFIG_STM32_UART5 is not set
+# CONFIG_STM32_USART6 is not set
+# CONFIG_STM32_UART7 is not set
+# CONFIG_STM32_UART8 is not set
+# CONFIG_STM32_IWDG is not set
+# CONFIG_STM32_WWDG is not set
+CONFIG_STM32_SPI=y
+
+#
+# Alternate Pin Mapping
+#
+# CONFIG_STM32_FLASH_PREFETCH is not set
+# CONFIG_STM32_JTAG_DISABLE is not set
+# CONFIG_STM32_JTAG_FULL_ENABLE is not set
+# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+# CONFIG_STM32_FORCEPOWER is not set
+# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
+# CONFIG_STM32_CCMEXCLUDE is not set
+CONFIG_STM32_FSMC_SRAM=y
+CONFIG_STM32_USART=y
+
+#
+# U[S]ART Configuration
+#
+# CONFIG_USART1_RS485 is not set
+# CONFIG_SERIAL_DISABLE_REORDERING is not set
+# CONFIG_STM32_USART_SINGLEWIRE is not set
+
+#
+# SPI Configuration
+#
+# CONFIG_STM32_SPI_INTERRUPTS is not set
+# CONFIG_STM32_SPI_DMA is not set
+
+#
+# USB Host Configuration
+#
+
+#
+# USB Device Configuration
+#
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_IRQPRIO=y
+# CONFIG_CUSTOM_STACK is not set
+# CONFIG_ADDRENV is not set
+CONFIG_ARCH_HAVE_VFORK=y
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=16717
+# CONFIG_ARCH_CALIBRATION is not set
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20000000
+CONFIG_RAM_SIZE=114688
+
+#
+# Board Selection
+#
+CONFIG_ARCH_BOARD_STM32F429I_DISCO=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="stm32f429i-disco"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Board-Specific Options
+#
+CONFIG_STM32F429I_DISCO_FLASH=y
+CONFIG_STM32F429I_DISCO_FLASH_MINOR=0
+# CONFIG_STM32F429I_DISCO_FLASH_PART is not set
+CONFIG_STM32F429I_DISCO_RAMMTD=y
+CONFIG_STM32F429I_DISCO_RAMMTD_MINOR=1
+CONFIG_STM32F429I_DISCO_RAMMTD_SIZE=256
+
+#
+# RTOS Features
+#
+# CONFIG_BOARD_INITIALIZE is not set
+CONFIG_MSEC_PER_TICK=10
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_INSTRUMENTATION is not set
+CONFIG_TASK_NAME_SIZE=0
+# CONFIG_SCHED_HAVE_PARENT is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_DEV_CONSOLE=y
+# CONFIG_MUTEX_TYPES is not set
+# CONFIG_PRIORITY_INHERITANCE is not set
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_SCHED_WAITPID=y
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_CLOCK is not set
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# Sizes of configurable things (0 disables)
+#
+CONFIG_MAX_TASKS=16
+CONFIG_MAX_TASK_ARGS=4
+CONFIG_NPTHREAD_KEYS=4
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+CONFIG_DEV_ZERO=y
+CONFIG_ARCH_HAVE_RNG=y
+CONFIG_DEV_RANDOM=y
+# CONFIG_LOOP is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_PWM is not set
+# CONFIG_I2C is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+CONFIG_SPI=y
+# CONFIG_SPI_OWNBUS is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_I2S is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+# CONFIG_LCD is not set
+# CONFIG_MMCSD is not set
+CONFIG_MTD=y
+
+#
+# MTD Configuration
+#
+CONFIG_MTD_PARTITION=y
+CONFIG_MTD_BYTE_WRITE=y
+CONFIG_MTD_CONFIG=y
+CONFIG_MTD_CONFIG_RAM_CONSOLIDATE=y
+CONFIG_MTD_CONFIG_ERASEDVALUE=0xff
+
+#
+# MTD Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+# CONFIG_ARCH_NAND_HWECC is not set
+CONFIG_RAMMTD=y
+CONFIG_RAMMTD_BLOCKSIZE=512
+CONFIG_RAMMTD_ERASESIZE=4096
+CONFIG_RAMMTD_ERASESTATE=0xff
+# CONFIG_RAMMTD_FLASHSIM is not set
+# CONFIG_MTD_AT24XX is not set
+# CONFIG_MTD_AT25 is not set
+# CONFIG_MTD_AT45DB is not set
+# CONFIG_MTD_M25P is not set
+CONFIG_MTD_SMART=y
+CONFIG_MTD_SMART_SECTOR_SIZE=512
+# CONFIG_MTD_RAMTRON is not set
+# CONFIG_MTD_SST25 is not set
+CONFIG_MTD_SST25XX=y
+CONFIG_SST25XX_SPIMODE=0
+CONFIG_SST25XX_SPIFREQUENCY=20000000
+CONFIG_SST25XX_MANUFACTURER=0xBF
+CONFIG_SST25XX_MEMORY_TYPE=0x25
+# CONFIG_MTD_SST39FV is not set
+# CONFIG_MTD_W25 is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_16550_UART is not set
+CONFIG_ARCH_HAVE_USART1=y
+
+#
+# USART Configuration
+#
+CONFIG_USART1_ISUART=y
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_TIOCSERGSTRUCT is not set
+CONFIG_USART1_SERIAL_CONSOLE=y
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART1 Configuration
+#
+CONFIG_USART1_RXBUFSIZE=256
+CONFIG_USART1_TXBUFSIZE=256
+CONFIG_USART1_BAUD=115200
+CONFIG_USART1_BITS=8
+CONFIG_USART1_PARITY=0
+CONFIG_USART1_2STOP=0
+# CONFIG_USART1_IFLOWCONTROL is not set
+# CONFIG_USART1_OFLOWCONTROL is not set
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_WIRELESS is not set
+
+#
+# System Logging Device Options
+#
+
+#
+# System Logging
+#
+# CONFIG_RAMLOG is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+CONFIG_FS_READABLE=y
+CONFIG_FS_WRITABLE=y
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+CONFIG_FS_SMARTFS=y
+CONFIG_SMARTFS_ERASEDSTATE=0xff
+CONFIG_SMARTFS_MAXNAMLEN=16
+# CONFIG_SMARTFS_MULTI_ROOT_DIRS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+
+#
+# System Logging
+#
+# CONFIG_SYSLOG_ENABLE is not set
+# CONFIG_SYSLOG is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_MULTIHEAP is not set
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=3
+CONFIG_ARCH_HAVE_HEAP2=y
+CONFIG_HEAP2_BASE=0xD0000000
+CONFIG_HEAP2_SIZE=8388608
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Binary Formats
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CAN is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_LCDRW is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_MTDPART is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXCONSOLE is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXFLAT is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PASHELLO is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_QENCODER is not set
+# CONFIG_EXAMPLES_RANDOM is not set
+# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_ROMFS is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_FLASH_TEST is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_THTTPD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_UDP is not set
+# CONFIG_EXAMPLES_UIP is not set
+# CONFIG_EXAMPLES_USBSERIAL is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+
+#
+# Network Utilities
+#
+
+#
+# Networking Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_DHCPC is not set
+# CONFIG_NETUTILS_DHCPD is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_FTPD is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_RESOLV is not set
+# CONFIG_NETUTILS_SMTP is not set
+# CONFIG_NETUTILS_TELNETD is not set
+# CONFIG_NETUTILS_TFTPC is not set
+# CONFIG_NETUTILS_THTTPD is not set
+# CONFIG_NETUTILS_UIPLIB is not set
+# CONFIG_NETUTILS_WEBCLIENT is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFATFS is not set
+# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_NSFMOUNT is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PING is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_CONSOLE=y
+
+#
+# USB Trace Support
+#
+# CONFIG_NSH_CONDEV is not set
+CONFIG_NSH_ARCHINIT=y
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+CONFIG_PLATFORM_CONFIGDATA=y
+
+#
+# System NSH Add-Ons
+#
+
+#
+# USB CDC/ACM Device Commands
+#
+
+#
+# USB Composite Device Commands
+#
+
+#
+# Custom Free Memory Command
+#
+# CONFIG_SYSTEM_FREE is not set
+
+#
+# I2C tool
+#
+
+#
+# FLASH Program Installation
+#
+# CONFIG_SYSTEM_INSTALL is not set
+
+#
+# FLASH Erase-all Command
+#
+CONFIG_SYSTEM_FLASH_ERASEALL=y
+
+#
+# NxPlayer media player library / command Line
+#
+# CONFIG_SYSTEM_NXPLAYER is not set
+
+#
+# RAM test
+#
+# CONFIG_SYSTEM_RAMTEST is not set
+
+#
+# readline()
+#
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+
+#
+# Power Off
+#
+# CONFIG_SYSTEM_POWEROFF is not set
+
+#
+# RAMTRON
+#
+# CONFIG_SYSTEM_RAMTRON is not set
+
+#
+# SD Card
+#
+# CONFIG_SYSTEM_SDCARD is not set
+
+#
+# Sysinfo
+#
+CONFIG_SYSTEM_SYSINFO=y
+CONFIG_SYSTEM_SYSINFO_STACKSIZE=1024
+
+#
+# USB Monitor
+#
+
+#
+# Stack Monitor
+#
+
+#
+# USB Mass Storage Device Commands
+#
+
+#
+# Zmodem Commands
+#
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/nuttx/configs/stm32f429i-disco/extflash/setenv.sh b/nuttx/configs/stm32f429i-disco/extflash/setenv.sh
new file mode 100644
index 000000000..1a17cc0a3
--- /dev/null
+++ b/nuttx/configs/stm32f429i-disco/extflash/setenv.sh
@@ -0,0 +1,77 @@
+#!/bin/bash
+# configs/stm32f429i-disco/usbnsh/setenv.sh
+#
+# Copyright (C) 2013 Gregory Nutt. All rights reserved.
+# Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+# used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+ echo "You must source this script, not run it!" 1>&2
+ exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+ echo "This script must be executed from the top-level NuttX build directory"
+ exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+ export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the RIDE
+# toolchain under windows. You will also have to edit this if you install
+# the RIDE toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows. You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+
+# These are the Cygwin paths to the locations where I installed the Atollic
+# toolchain under windows. You will also have to edit this if you install
+# the Atollic toolchain in any other location. /usr/bin is added before
+# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
+# at those locations as well.
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
+#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+#export TOOLCHAIN_BIN="${WD}/../misc/buildroot/build_arm_nofpu/staging_dir/bin"
+
+export TOOLCHAIN_BIN="/home/ken/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/nuttx/configs/stm32f429i-disco/include/board.h b/nuttx/configs/stm32f429i-disco/include/board.h
index 86de6a2f3..49fb18d87 100644
--- a/nuttx/configs/stm32f429i-disco/include/board.h
+++ b/nuttx/configs/stm32f429i-disco/include/board.h
@@ -220,9 +220,15 @@
/* SPI - There is a MEMS device on SPI1 using these pins: */
-#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
-#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
-#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
+#define GPIO_SPI5_MISO GPIO_SPI5_MISO_1
+#define GPIO_SPI5_MOSI GPIO_SPI5_MOSI_1
+#define GPIO_SPI5_SCK GPIO_SPI5_SCK_1
+
+/* SPI - External SPI flash may be connected on SPI4: */
+
+#define GPIO_SPI4_MISO GPIO_SPI4_MISO_1
+#define GPIO_SPI4_MOSI GPIO_SPI4_MOSI_1
+#define GPIO_SPI4_SCK GPIO_SPI4_SCK_1
/* Timer Inputs/Outputs (see the README.txt file for options) */
@@ -232,6 +238,16 @@
#define GPIO_TIM8_CH1IN GPIO_TIM8_CH1IN_1
#define GPIO_TIM8_CH2IN GPIO_TIM8_CH2IN_1
+/* LCD
+ *
+ * The STM32F429I-DISCO board contains an onboard TFT LCD connected to the
+ * LTDC interface of the uC. The LCD is 240x320 pixels. Define the parameters
+ * of the LCD and the interface here.
+ */
+
+#define BOARD_LTDC_WIDTH 240
+#define BOARD_LTDC_HEIGHT 320
+
/************************************************************************************
* Public Data
************************************************************************************/
diff --git a/nuttx/configs/stm32f429i-disco/src/stm32f429i-disco-internal.h b/nuttx/configs/stm32f429i-disco/src/stm32f429i-disco-internal.h
index ab9a57f34..9a0251782 100644
--- a/nuttx/configs/stm32f429i-disco/src/stm32f429i-disco-internal.h
+++ b/nuttx/configs/stm32f429i-disco/src/stm32f429i-disco-internal.h
@@ -90,7 +90,15 @@
/* SPI chip selects */
#define GPIO_CS_MEMS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
- GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3)
+ GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN1)
+#define GPIO_CS_LCD (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+ GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN2)
+#define GPIO_LCD_DC (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+ GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN13)
+#define GPIO_LCD_ENABLE (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+ GPIO_OUTPUT_CLEAR|GPIO_PORTF|GPIO_PIN10)
+#define GPIO_CS_SST25 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+ GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
/* USB OTG HS
*
diff --git a/nuttx/configs/stm32f429i-disco/src/up_boot.c b/nuttx/configs/stm32f429i-disco/src/up_boot.c
index 297686f40..d6eb2df16 100644
--- a/nuttx/configs/stm32f429i-disco/src/up_boot.c
+++ b/nuttx/configs/stm32f429i-disco/src/up_boot.c
@@ -75,7 +75,8 @@ void stm32_boardinitialize(void)
* stm32_spiinitialize() has been brought into the link.
*/
-#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) ||\
+ defined(CONFIG_STM32_SPI4) || defined(CONFIG_STM32_SPI5)
if (stm32_spiinitialize)
{
stm32_spiinitialize();
diff --git a/nuttx/configs/stm32f429i-disco/src/up_nsh.c b/nuttx/configs/stm32f429i-disco/src/up_nsh.c
index 9a820b949..bca81d939 100644
--- a/nuttx/configs/stm32f429i-disco/src/up_nsh.c
+++ b/nuttx/configs/stm32f429i-disco/src/up_nsh.c
@@ -45,15 +45,26 @@
#include <debug.h>
#include <errno.h>
-#ifdef CONFIG_STM32_SDIO
-# include <nuttx/sdio.h>
+#include <nuttx/kmalloc.h>
+
+#ifdef CONFIG_STM32_SPI4
# include <nuttx/mmcsd.h>
#endif
+#ifdef CONFIG_MTD_SST25XX
+# include <nuttx/mtd/mtd.h>
+#endif
+
#ifdef CONFIG_SYSTEM_USBMONITOR
# include <apps/usbmonitor.h>
#endif
+#ifdef CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART
+#ifdef CONFIG_PLATFORM_CONFIGDATA
+# include <nuttx/configdata.h>
+#endif
+#endif
+
#ifdef CONFIG_STM32_OTGFS2
# include "stm32_usbhost.h"
#endif
@@ -138,6 +149,133 @@ int nsh_archinitialize(void)
#if defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR)
int ret;
#endif
+#if defined(CONFIG_STM32_SPI5) || defined(CONFIG_STM32_SPI4)
+ FAR struct spi_dev_s *spi;
+ FAR struct mtd_dev_s *mtd;
+#endif
+
+ /* Configure SPI-based devices */
+
+#ifdef CONFIG_STM32_SPI4
+ /* Get the SPI port */
+
+ message("nsh_archinitialize: Initializing SPI port 4\n");
+ spi = up_spiinitialize(4);
+ if (!spi)
+ {
+ message("nsh_archinitialize: Failed to initialize SPI port 4\n");
+ return -ENODEV;
+ }
+
+ message("nsh_archinitialize: Successfully initialized SPI port 4\n");
+
+ /* Now bind the SPI interface to the SST25F064 SPI FLASH driver. This
+ * is a FLASH device that has been added external to the board (i.e.
+ * the board does not ship from STM with any on-board FLASH.
+ */
+
+#if defined(CONFIG_MTD) && defined(CONFIG_MTD_SST25XX)
+ message("nsh_archinitialize: Bind SPI to the SPI flash driver\n");
+ mtd = sst25xx_initialize(spi);
+ if (!mtd)
+ {
+ message("nsh_archinitialize: Failed to bind SPI port 4 to the SPI FLASH driver\n");
+ }
+ else
+ {
+ message("nsh_archinitialize: Successfully bound SPI port 4 to the SPI FLASH driver\n");
+
+#ifdef CONFIG_STM32F429I_DISCO_FLASH_PART
+ {
+ int partno;
+ int partsize;
+ int partoffset;
+ const char *partstring = CONFIG_STM32F429I_DISCO_FLASH_PART_LIST;
+ const char *ptr;
+ FAR struct mtd_dev_s *mtd_part;
+ char partname[4];
+
+ /* Now create a partition on the FLASH device */
+
+ partno = 0;
+ ptr = partstring;
+ partoffset = 0;
+
+ while (*ptr != '\0')
+ {
+ /* Get the partition size */
+
+ partsize = atoi(ptr);
+ mtd_part = mtd_partition(mtd, partoffset, (partsize>>2) * 16);
+ partoffset += (partsize >> 2) * 16;
+
+#ifdef CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART
+ /* Test if this is the config partition */
+
+ if (CONFIG_STM32F429I_DISCO_FLASH_CONFIG_PART_NUMBER == partno)
+ {
+ /* Register the partition as the config device */
+
+ mtdconfig_register(mtd_part);
+ }
+ else
+#endif
+ {
+ /* Now initialize a SMART Flash block device and bind it
+ * to the MTD device.
+ */
+
+#if defined(CONFIG_MTD_SMART) && defined(CONFIG_FS_SMARTFS)
+ sprintf(partname, "p%d", partno);
+ smart_initialize(CONFIG_STM32F429I_DISCO_FLASH_MINOR, mtd_part, partname);
+#endif
+ }
+
+ /* Update the pointer to point to the next size in the list */
+
+ while ((*ptr >= '0') && (*ptr <= '9'))
+ {
+ ptr++;
+ }
+
+ if (*ptr == ',')
+ {
+ ptr++;
+ }
+
+ /* Increment the part number */
+
+ partno++;
+ }
+ }
+#else /* CONFIG_STM32F429I_DISCO_FLASH_PART */
+
+ /* Configure the device with no partition support */
+
+ smart_initialize(CONFIG_STM32F429I_DISCO_FLASH_MINOR, mtd, NULL);
+
+#endif /* CONFIG_STM32F429I_DISCO_FLASH_PART */
+ }
+
+#endif /* CONFIG_MTD */
+#endif /* CONFIG_STM32_SPI4 */
+
+ /* Create a RAM MTD device if configured */
+
+#if defined(CONFIG_RAMMTD) && defined(CONFIG_STM32F429I_DISCO_RAMMTD)
+ {
+ uint8_t *start = (uint8_t *) kmalloc(CONFIG_STM32F429I_DISCO_RAMMTD_SIZE * 1024);
+ mtd = rammtd_initialize(start, CONFIG_STM32F429I_DISCO_RAMMTD_SIZE * 1024);
+ mtd->ioctl(mtd, MTDIOC_BULKERASE, 0);
+
+ /* Now initialize a SMART Flash block device and bind it to the MTD device */
+
+#if defined(CONFIG_MTD_SMART) && defined(CONFIG_FS_SMARTFS)
+ smart_initialize(CONFIG_STM32F429I_DISCO_RAMMTD_MINOR, mtd, NULL);
+#endif
+ }
+
+#endif /* CONFIG_RAMMTD && CONFIG_STM32F429I_DISCO_RAMMTD */
#ifdef HAVE_USBHOST
/* Initialize USB host operation. stm32_usbhost_initialize() starts a thread
diff --git a/nuttx/configs/stm32f429i-disco/src/up_spi.c b/nuttx/configs/stm32f429i-disco/src/up_spi.c
index 779cceeb1..df9e9a3a0 100644
--- a/nuttx/configs/stm32f429i-disco/src/up_spi.c
+++ b/nuttx/configs/stm32f429i-disco/src/up_spi.c
@@ -53,7 +53,8 @@
#include "stm32.h"
#include "stm32f429i-disco-internal.h"
-#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
+#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3) ||\
+ defined(CONFIG_STM32_SPI4) || defined(CONFIG_STM32_SPI5)
/************************************************************************************
* Definitions
@@ -89,28 +90,25 @@
* Name: stm32_spiinitialize
*
* Description:
- * Called to configure SPI chip select GPIO pins for the stm32fr29i-disco board.
+ * Called to configure SPI chip select GPIO pins for the stm32f429i-disco board.
*
************************************************************************************/
void weak_function stm32_spiinitialize(void)
{
-#ifdef CONFIG_STM32_SPI1
+#ifdef CONFIG_STM32_SPI5
(void)stm32_configgpio(GPIO_CS_MEMS); /* MEMS chip select */
+ (void)stm32_configgpio(GPIO_CS_LCD); /* LCD chip select */
+ (void)stm32_configgpio(GPIO_LCD_DC); /* LCD Data/Command select */
+ (void)stm32_configgpio(GPIO_LCD_ENABLE); /* LCD enable select */
#endif
-#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
- (void)stm32_configgpio(GPIO_OLED_CS); /* OLED chip select */
-# if defined(CONFIG_LCD_UG2864AMBAG01)
- (void)stm32_configgpio(GPIO_OLED_A0); /* OLED Command/Data */
-# endif
-# if defined(CONFIG_LCD_UG2864HSWEG01)
- (void)stm32_configgpio(GPIO_OLED_DC); /* OLED Command/Data */
-# endif
+#if defined(CONFIG_STM32_SPI4) && defined(CONFIG_MTD_SST25XX)
+ (void)stm32_configgpio(GPIO_CS_SST25); /* SST25 FLASH chip select */
#endif
}
/****************************************************************************
- * Name: stm32_spi1/2/3select and stm32_spi1/2/3status
+ * Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
@@ -138,17 +136,6 @@ void weak_function stm32_spiinitialize(void)
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
-
-#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
- if (devid == SPIDEV_DISPLAY)
- {
- stm32_gpiowrite(GPIO_OLED_CS, !selected);
- }
- else
-#endif
- {
- stm32_gpiowrite(GPIO_CS_MEMS, !selected);
- }
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -181,6 +168,47 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
}
#endif
+#ifdef CONFIG_STM32_SPI4
+void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+#if defined(CONFIG_MTD_SST25XX)
+ if (devid == SPIDEV_FLASH)
+ {
+ stm32_gpiowrite(GPIO_CS_SST25, !selected);
+ }
+#endif
+}
+
+uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI5
+void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+ spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+
+#if defined(CONFIG_STM32_LTDC)
+ if (devid == SPIDEV_DISPLAY)
+ {
+ stm32_gpiowrite(GPIO_CS_LCD, !selected);
+ }
+ else
+#endif
+
+ {
+ stm32_gpiowrite(GPIO_CS_MEMS, !selected);
+ }
+}
+
+uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+ return 0;
+}
+#endif
+
/****************************************************************************
* Name: stm32_spi1cmddata
*
@@ -208,27 +236,6 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
{
-#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
- if (devid == SPIDEV_DISPLAY)
- {
- /* "This is the Data/Command control pad which determines whether the
- * data bits are data or a command.
- *
- * A0 = "H": the inputs at D0 to D7 are treated as display data.
- * A0 = "L": the inputs at D0 to D7 are transferred to the command
- * registers."
- */
-
-# if defined(CONFIG_LCD_UG2864AMBAG01)
- (void)stm32_gpiowrite(GPIO_OLED_A0, !cmd);
-# endif
-# if defined(CONFIG_LCD_UG2864HSWEG01)
- (void)stm32_gpiowrite(GPIO_OLED_DC, !cmd);
-# endif
- return OK;
- }
-#endif
-
return -ENODEV;
}
#endif
@@ -246,6 +253,35 @@ int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
return -ENODEV;
}
#endif
+
+#ifdef CONFIG_STM32_SPI4
+int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+ return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32_SPI5
+int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+#if defined(CONFIG_STM32_LTDC)
+ if (devid == SPIDEV_DISPLAY)
+ {
+ /* "This is the Data/Command control pad which determines whether the
+ * data bits are data or a command.
+ */
+
+# if defined(CONFIG_STM32_LTDC)
+ (void)stm32_gpiowrite(GPIO_LCD_DC, !cmd);
+# endif
+ return OK;
+ }
+#endif
+
+ return -ENODEV;
+}
+#endif
+
#endif /* CONFIG_SPI_CMDDATA */
#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-21 18:04:18 +0000