diff options
Diffstat (limited to 'nuttx')
-rw-r--r-- | nuttx/Makefile | 2 | ||||
-rw-r--r-- | nuttx/TODO | 1 | ||||
-rw-r--r-- | nuttx/arch/arm/src/dm320/dm320_emif.h | 112 | ||||
-rw-r--r-- | nuttx/configs/ntosd-dm320/defconfig | 2 | ||||
-rw-r--r-- | nuttx/configs/ntosd-dm320/src/up_network.c | 9 | ||||
-rw-r--r-- | nuttx/drivers/net/dm90x0.c | 30 | ||||
-rw-r--r-- | nuttx/examples/nettest/nettest.c | 10 | ||||
-rw-r--r-- | nuttx/examples/uip/main.c | 10 |
8 files changed, 158 insertions, 18 deletions
diff --git a/nuttx/Makefile b/nuttx/Makefile index 0ddbc60e6..0f8704a80 100644 --- a/nuttx/Makefile +++ b/nuttx/Makefile @@ -48,7 +48,7 @@ BOARD_DIR = configs/$(CONFIG_ARCH_BOARD) # (except for parts of FSDIRS). We will exclude FSDIRS # from the build if file descriptor support is disabled -NONFSDIRS = sched lib $(ARCH_SRC) mm examples/$(CONFIG_EXAMPLE) $(BOARD_DIR)/src +NONFSDIRS = sched lib $(ARCH_SRC) mm examples/$(CONFIG_EXAMPLE) FSDIRS = fs drivers ifeq ($(CONFIG_NET),y) diff --git a/nuttx/TODO b/nuttx/TODO index 3f6825e73..1e1905e80 100644 --- a/nuttx/TODO +++ b/nuttx/TODO @@ -54,6 +54,7 @@ o Build system - Some names under arch are still incorrect. These should be processor architecture names: pjrc-8051 should be 805x - configs/pjrc-8051 should be configs/pjrc-87c52 +- Dependencies do not work correctly under configs/<board>/src (same as arch/<arch>/src/board). o Applications & Tests diff --git a/nuttx/arch/arm/src/dm320/dm320_emif.h b/nuttx/arch/arm/src/dm320/dm320_emif.h new file mode 100644 index 000000000..a54666387 --- /dev/null +++ b/nuttx/arch/arm/src/dm320/dm320_emif.h @@ -0,0 +1,112 @@ +/************************************************************************************ + * dm320/dm320_emif.h + * + * Copyright (C) 2007 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name Gregory Nutt nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __DM320_DM320_EMIF_H +#define __DM320_DM320_EMIF_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +# include <sys/types.h> +#endif + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/* External Memory Interface (EMIF) Registers */ + +#define DM320_EMIF_CS0CTRL1 (DM320_PERIPHERALS_VADDR + 0x0A00) /* CS0 Control Register #1 */ +#define DM320_EMIF_CS0CTRL2 (DM320_PERIPHERALS_VADDR + 0x0A02) /* CS0 Control Register #2 */ +#define DM320_EMIF_CS0CTRL3 (DM320_PERIPHERALS_VADDR + 0x0A04) /* CS0 Control Register #3 */ +#define DM320_EMIF_CS1CTRL1A (DM320_PERIPHERALS_VADDR + 0x0A06) /* CS1 Control Register #1A */ +#define DM320_EMIF_CS1CTRL1B (DM320_PERIPHERALS_VADDR + 0x0A08) /* CS1 Control Register #1B */ +#define DM320_EMIF_CS2CTRL2 (DM320_PERIPHERALS_VADDR + 0x0A0A) /* CS1 Control Register #2 */ +#define DM320_EMIF_CS2CTRL1 (DM320_PERIPHERALS_VADDR + 0x0A0C) /* CS2 Control Register #1 */ +#define DM320_EMIF_CS1CTRL2 (DM320_PERIPHERALS_VADDR + 0x0A0E) /* CS2 Control Register #2 */ +#define DM320_EMIF_CS3CTRL1 (DM320_PERIPHERALS_VADDR + 0x0A10) /* CS3 Control Register #1 */ +#define DM320_EMIF_CS3CTRL2 (DM320_PERIPHERALS_VADDR + 0x0A12) /* CS3 Control Register #2 */ +#define DM320_EMIF_CS4CTRL1 (DM320_PERIPHERALS_VADDR + 0x0A14) /* CS4 Control Register #1 */ +#define DM320_EMIF_CS4CTRL2 (DM320_PERIPHERALS_VADDR + 0x0A16) /* CS4 Control Register #2 */ +#define DM320_EMIF_BUSCTRL (DM320_PERIPHERALS_VADDR + 0x0A18) /* Bus Control Register */ +#define DM320_EMIF_BUSRLS (DM320_PERIPHERALS_VADDR + 0x0A1A) /* Bus Release Control Register */ +#define DM320_EMIF_CFCTRL1 (DM320_PERIPHERALS_VADDR + 0x0A1C) /* CFC ControlRegister #1 */ +#define DM320_EMIF_CFCTRL2 (DM320_PERIPHERALS_VADDR + 0x0A1E) /* CFC ControlRegister#2 */ +#define DM320_EMIF_SMCTRL (DM320_PERIPHERALS_VADDR + 0x0A20) /* SmartMedia Control Register */ +#define DM320_EMIF_BUSINTEN (DM320_PERIPHERALS_VADDR + 0x0A22) /* Bus Interrupt Enable Register */ +#define DM320_EMIF_BUSSTS (DM320_PERIPHERALS_VADDR + 0x0A24) /* Bus Status Register */ +#define DM320_EMIF_BUSWAITMD (DM320_PERIPHERALS_VADDR + 0x0A26) /* Bus Wait Mode Register */ +#define DM320_EMIF_ECC1CP (DM320_PERIPHERALS_VADDR + 0x0A28) /* ECC Area 1 CP Register */ +#define DM320_EMIF_ECC1LP (DM320_PERIPHERALS_VADDR + 0x0A2A) /* ECC Area 1 LP Register */ +#define DM320_EMIF_ECC2CP (DM320_PERIPHERALS_VADDR + 0x0A2C) /* ECC Area 2 CP Register */ +#define DM320_EMIF_ECC2LP (DM320_PERIPHERALS_VADDR + 0x0A2E) /* ECC Area 2 LP Register */ +#define DM320_EMIF_ECC3CP (DM320_PERIPHERALS_VADDR + 0x0A30) /* ECC Area 3 CP Register */ +#define DM320_EMIF_ECC3LP (DM320_PERIPHERALS_VADDR + 0x0A32) /* ECC Area 3 LP Register */ +#define DM320_EMIF_ECC4CP (DM320_PERIPHERALS_VADDR + 0x0A34) /* ECC Area 4 CP Register */ +#define DM320_EMIF_ECC4LP (DM320_PERIPHERALS_VADDR + 0x0A36) /* ECC Area 4 LP Register */ +#define DM320_EMIF_ECC5CP (DM320_PERIPHERALS_VADDR + 0x0A38) /* ECC Area 5 CP Register */ +#define DM320_EMIF_ECC5LP (DM320_PERIPHERALS_VADDR + 0x0A3A) /* ECC Area 5 LP Register */ +#define DM320_EMIF_ECC6CP (DM320_PERIPHERALS_VADDR + 0x0A3C) /* ECC Area 6 CP Register */ +#define DM320_EMIF_ECC6LP (DM320_PERIPHERALS_VADDR + 0x0A3E) /* ECC Area 6 LP Register */ +#define DM320_EMIF_ECC7CP (DM320_PERIPHERALS_VADDR + 0x0A40) /* ECC Area 7 CP Register */ +#define DM320_EMIF_ECC7LP (DM320_PERIPHERALS_VADDR + 0x0A42) /* ECC Area 7 LP Register */ +#define DM320_EMIF_ECC8CP (DM320_PERIPHERALS_VADDR + 0x0A44) /* ECC Area 8 CP Register */ +#define DM320_EMIF_ECC8LP (DM320_PERIPHERALS_VADDR + 0x0A46) /* ECC Area 8 LP Register */ +#define DM320_EMIF_ECCCLR (DM320_PERIPHERALS_VADDR + 0x0A48) /* ECC Clear Register */ +#define DM320_EMIF_PAGESZ (DM320_PERIPHERALS_VADDR + 0x0A4A) /* SmartMedia Page Size Register */ +#define DM320_EMIF_PRIORCTL (DM320_PERIPHERALS_VADDR + 0x0A4C) /* Priority control for DMA */ +#define DM320_EMIF_IMGDSPDEST (DM320_PERIPHERALS_VADDR + 0x0A4E) /* DSP/IMGBUF DMA destination */ +#define DM320_EMIF_IMGDSPADDH (DM320_PERIPHERALS_VADDR + 0x0A50) /* DSP/IMGBUF high address */ +#define DM320_EMIF_IMGDSPADDL (DM320_PERIPHERALS_VADDR + 0x0A52) /* DSP/IMGBUG low address */ +#define DM320_EMIF_AHBADDH (DM320_PERIPHERALS_VADDR + 0x0A54) /* AHB high address */ +#define DM320_EMIF_AHBADDL (DM320_PERIPHERALS_VADDR + 0x0A56) /* AHB low address */ +#define DM320_EMIF_MTCADDH (DM320_PERIPHERALS_VADDR + 0x0A58) /* MTC high address */ +#define DM320_EMIF_MTCADDL (DM320_PERIPHERALS_VADDR + 0x0A5A) /* MTC low address */ +#define DM320_EMIF_DMASIZE (DM320_PERIPHERALS_VADDR + 0x0A5C) /* DMA Transfer Size Register */ +#define DM320_EMIF_DMAMTCSEL (DM320_PERIPHERALS_VADDR + 0x0A5E) /* DMA Device Select Register */ +#define DM320_EMIF_DMACTL (DM320_PERIPHERALS_VADDR + 0x0A60) /* DMA Control Register */ +#define DM320_EMIF_TEST (DM320_PERIPHERALS_VADDR + 0x0A62) /* Test Register.Do not use */ + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +#endif + +#endif /* __DM320_DM320_EMIF_H */ diff --git a/nuttx/configs/ntosd-dm320/defconfig b/nuttx/configs/ntosd-dm320/defconfig index b2d4c505e..cc6d5ee42 100644 --- a/nuttx/configs/ntosd-dm320/defconfig +++ b/nuttx/configs/ntosd-dm320/defconfig @@ -298,7 +298,7 @@ CONFIG_NET_RESOLV_ENTRIES=4 CONFIG_NET_DM90x0=n CONFIG_DM9X_NINTERFACES=1 CONFIG_DM9X_STATS=1 -CONFIG_DM9X_BASE=0x60000300 +CONFIG_DM9X_BASE=0xd0000300 CONFIG_DM9X_IRQ=27 CONFIG_DM9X_BUSWIDTH8=n CONFIG_DM9X_BUSWIDTH16=y diff --git a/nuttx/configs/ntosd-dm320/src/up_network.c b/nuttx/configs/ntosd-dm320/src/up_network.c index 78234f98f..19d56ab3b 100644 --- a/nuttx/configs/ntosd-dm320/src/up_network.c +++ b/nuttx/configs/ntosd-dm320/src/up_network.c @@ -41,12 +41,14 @@ #if defined(CONFIG_NET) && defined(CONFIG_NET_DM90x0) #include <sys/types.h> +#include <debug.h> #include <arch/board/board.h> #include "up_arch.h" #include "up_internal.h" #include "dm320_memorymap.h" +#include "dm320_emif.h" #include "dm320_gio.h" extern void dm9x_initialize(void); @@ -78,6 +80,9 @@ void up_netinitialize(void) * width is 16-bits. */ + lldbg("CS4CTRL1=%04x CS4CTRL2=%04x\n", + getreg16(DM320_EMIF_CS4CTRL1), getreg16(DM320_EMIF_CS4CTRL2)); + /* It is assumed that bootloader has already configured CS4. Here, * we will only make certain that the GIO is properly configured */ @@ -87,6 +92,10 @@ void up_netinitialize(void) GIO_INTERRUPT(GIO_DM9000A_INT); GIO_RISINGEDGE(GIO_DM9000A_INT); + lldbg("GIO DIR0=%04x INV0=%04x IRQPORT=%04x IRQEDGE=%04x\n", + getreg16(DM320_GIO_DIR0), getreg16(DM320_GIO_INV0), + getreg16(DM320_GIO_IRQPORT), getreg16(DM320_GIO_IRQEDGE)); + /* Then initialize the driver */ dm9x_initialize(); diff --git a/nuttx/drivers/net/dm90x0.c b/nuttx/drivers/net/dm90x0.c index 3be239619..a39f97a92 100644 --- a/nuttx/drivers/net/dm90x0.c +++ b/nuttx/drivers/net/dm90x0.c @@ -267,7 +267,7 @@ # define CONFIG_DM9X_MODE DM9X_MODE_AUTO #endif -// /* TX poll deley = 5 seconds. CLK_TCK is the number of clock ticks per second */ +/* TX poll deley = 5 seconds. CLK_TCK is the number of clock ticks per second */ #define DM6X_WDDELAY (5*CLK_TCK) @@ -434,8 +434,8 @@ static uint8 getreg(int reg) static void putreg(int reg, uint8 value) { - DM9X_INDEX = reg; - DM9X_DATA = value & 0xff; + DM9X_INDEX = reg; + DM9X_DATA = value & 0xff; } /**************************************************************************** @@ -677,8 +677,6 @@ static void dm9x_resetstatistics(struct dm9x_driver_s *dm9x) dm9x->nresets = 0; /* Counts number of resets */ dm9x->ntxtimeouts = 0; /* Counts resets caused by TX timeouts */ } -#else -# define dm9x_resetstatistics(dev) #endif /**************************************************************************** @@ -1647,7 +1645,7 @@ int dm9x_initialize(void) vid = (((uint16)getreg(DM9X_VIDH)) << 8) | (uint16)getreg(DM9X_VIDL); pid = (((uint16)getreg(DM9X_PIDH)) << 8) | (uint16)getreg(DM9X_PIDL); - dbg("I/O base: %08x VID: %04x PID: %04x\n", CONFIG_DM9X_BASE, vid, pid); + lldbg("I/O base: %08x VID: %04x PID: %04x\n", CONFIG_DM9X_BASE, vid, pid); /* Check if a DM90x0 chip is recognized at this I/O base */ @@ -1662,20 +1660,21 @@ int dm9x_initialize(void) if (irq_attach(CONFIG_DM9X_IRQ, dm9x_interrupt)) { /* We could not attach the ISR to the ISR */ - dbg("irq_attach() failed\n"); + lldbg("irq_attach() failed\n"); return -EAGAIN; } /* Initialize the driver structure */ memset(g_dm9x, 0, CONFIG_DM9X_NINTERFACES*sizeof(struct dm9x_driver_s)); - g_dm9x[0].dev.ifup = dm9x_ifup; - g_dm9x[0].dev.ifdown = dm9x_ifdown; + g_dm9x[0].dev.ifup = dm9x_ifup; /* I/F down callback */ + g_dm9x[0].dev.ifdown = dm9x_ifdown; /* I/F up (new IP address) callback */ + g_dm9x[0].dev.d_private = (void*)g_dm9x; /* Used to recover private state from dev */ /* Create a watchdog for timing polling for and timing of transmisstions */ - g_dm9x[0].txpoll = wd_create(); - g_dm9x[0].txtimeout = wd_create(); + g_dm9x[0].txpoll = wd_create(); /* Create periodic poll timer */ + g_dm9x[0].txtimeout = wd_create(); /* Create TX timeout timer */ /* Read the MAC address */ @@ -1685,10 +1684,13 @@ int dm9x_initialize(void) mptr[i] = getreg(j); } - dbg("MAC: %0x:%0x:%0x:%0x:%0x:%0x", - mptr[0], mptr[1], mptr[2], mptr[3], mptr[4], mptr[5]); + lldbg("MAC: %0x:%0x:%0x:%0x:%0x:%0x", + mptr[0], mptr[1], mptr[2], mptr[3], mptr[4], mptr[5]); - return 0; + /* Register the device with the OS so that socket IOCTLs can be performed */ + + (void)netdev_register(&g_dm9x[0].dev); + return OK; } #endif /* CONFIG_NET && CONFIG_NET_DM90x0 */ diff --git a/nuttx/examples/nettest/nettest.c b/nuttx/examples/nettest/nettest.c index 443b555b3..1afa21182 100644 --- a/nuttx/examples/nettest/nettest.c +++ b/nuttx/examples/nettest/nettest.c @@ -46,6 +46,10 @@ #include "nettest.h" /**************************************************************************** + * Definitions + ****************************************************************************/ + +/**************************************************************************** * Private Data ****************************************************************************/ @@ -104,5 +108,9 @@ int user_start(int argc, char *argv[]) void uip_log(char *m) { - printf("uIP log message: %s\n", m); + /* Since uip_log is called from interrupt handling logic, it cannot use + * or other standard I/O. This should work from an interrupt handler: + */ + + lib_rawprintf("uIP log message: %s\n", m); } diff --git a/nuttx/examples/uip/main.c b/nuttx/examples/uip/main.c index 5d1406b6b..ded7bca20 100644 --- a/nuttx/examples/uip/main.c +++ b/nuttx/examples/uip/main.c @@ -77,6 +77,10 @@ #endif /**************************************************************************** + * Definitions + ****************************************************************************/ + +/**************************************************************************** * Private Data ****************************************************************************/ @@ -205,7 +209,11 @@ int user_start(int argc, char *argv[]) void uip_log(char *m) { - printf("uIP log message: %s\n", m); + /* Since uip_log is called from interrupt handling logic, it cannot use + * or other standard I/O. This should work from an interrupt handler: + */ + + lib_rawprintf("uIP log message: %s\n", m); } #if defined(CONFIG_EXAMPLE_UIP_WEBCLIENT) |