diff options
Diffstat (limited to 'nuttx')
29 files changed, 3577 insertions, 0 deletions
diff --git a/nuttx/arch/arm/src/str71x/chip.h b/nuttx/arch/arm/src/str71x/chip.h new file mode 100644 index 000000000..de69c43cd --- /dev/null +++ b/nuttx/arch/arm/src/str71x/chip.h @@ -0,0 +1,81 @@ +/************************************************************************************ + * arch/arm/src/str71x/chip.h + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STR71X_CHIP_H +#define __ARCH_ARM_SRC_STR71X_CHIP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include <nuttx/config.h> +#include <sys/types.h> + +#include "str71x_map.h" /* Memory map */ +#include "str71x_emi.h" /* External memory interface */ +#include "str71x_rccu.h" /* Reset and clock control unit */ +#include "str71x_pcu.h" /* Power control unit */ +#include "str71x_gpio.h" /* I/O ports */ +#include "str71x_eic.h" /* Enhanced interrupt controller */ +#include "str71x_xti.h" /* External interrupts (XTI) */ +#include "str71x_rtc.h" /* Real Time Clock (RTC) */ +#include "str71x_wdog.h" /* Watchdog timer */ +#include "str71x_timer.h" /* Timers */ +#include "str71x_can.h" /* Controller Area Network (CAN) */ +#include "str71x_i2c.h" /* I2C */ +#include "str71x_bspi.h" /* Buffered SPI (BSPI) */ +#include "str71x_uart.h" /* UART */ +#include "str71x_usb.h" /* USB */ +#include "str71x_adc12.h" /* ADC */ +#include "str71x_apb.h" /* USB */ +#include "str71x_flash.h" /* Flash */ + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ARCH_ARM_SRC_STR71X_CHIP_H */ diff --git a/nuttx/arch/arm/src/str71x/str71x_adc12.h b/nuttx/arch/arm/src/str71x/str71x_adc12.h new file mode 100644 index 000000000..a4393ee94 --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_adc12.h @@ -0,0 +1,109 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_adc12.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_ADC12_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_ADC12_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* ADC12 registers ******************************************************************/
+
+#define STR71X_ADC12_DATA0 (STR71X_ADC12_BASE + 0x0000) /* 16-bits wide */
+#define STR71X_ADC12_DATA1 (STR71X_ADC12_BASE + 0x0008) /* 16-bits wide */
+#define STR71X_ADC12_DATA2 (STR71X_ADC12_BASE + 0x0010) /* 16-bits wide */
+#define STR71X_ADC12_DATA3 (STR71X_ADC12_BASE + 0x0018) /* 16-bits wide */
+#define STR71X_ADC12_CSR (STR71X_ADC12_BASE + 0x0020) /* 16-bits wide */
+#define STR71X_ADC12_CPR (STR71X_ADC12_BASE + 0x0030) /* 16-bits wide */
+
+/* Register bit settings ************************************************************/
+/* ADC12 Conversion modes */
+
+#define STR71X_ADC12_SINGLE (0)
+#define STR71X_ADC12_ROUND (1)
+
+/* ADC12 Channels */
+
+#define STR71X_ADC12_CHANNEL0 (0x00)
+#define STR71X_ADC12_CHANNEL1 (0x10)
+#define STR71X_ADC12_CHANNEL2 (0x20)
+#define STR71X_ADC12_CHANNEL3 (0x30)
+
+/* ADC12 control status register */
+
+#define STR71X_ADC12_DA0 (0x0001)
+#define STR71X_ADC12_DA1 (0x0002)
+#define STR71X_ADC12_DA2 (0x0004)
+#define STR71X_ADC12_DA3 (0x0008)
+#define STR71X_ADC12_OR (0x2000)
+
+/* Interrupt bits for channel n */
+
+#define STR71X_ADC12_IT0 (0x0100)
+#define STR71X_ADC12_IT1 (0x0200)
+#define STR71X_ADC12_IT2 (0x0400)
+#define STR71X_ADC12_IT3 (0x0800)
+#define STR71X_ADC12_ITALL (0x0f00)
+
+/* Mode selection */
+
+#define STR71X_ADC12_MODE (0x0040)
+
+/* Converter configuration */
+
+#define STR71X_ADC12_START (0x0020)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_ADC12_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_apb.h b/nuttx/arch/arm/src/str71x/str71x_apb.h new file mode 100644 index 000000000..bb8448107 --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_apb.h @@ -0,0 +1,104 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_apb.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_APB_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_APB_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* APB Registers ********************************************************************/
+
+#define STR71X_APB1_CKDIS (STR71X_APB1_BASE + 0x0010) /* 32-bits wide */
+#define STR71X_APB1_SWRES (STR71X_APB1_BASE + 0x0014) /* 32-bits wide */
+
+#define STR71X_APB2_CKDIS (STR71X_APB2_BASE + 0x0010) /* 32-bits wide */
+#define STR71X_APB2_SWRES (STR71X_APB2_BASE + 0x0014) /* 32-bits wide */
+
+/* Register bit settings ***********************************************************/
+
+/* APB1 periperals */
+
+#define STR71X_APB1_I2C0 (0x0001)
+#define STR71X_APB1_I2C1 (0x0002)
+#define STR71X_APB1_UART0 (0x0008)
+#define STR71X_APB1_UART1 (0x0010)
+#define STR71X_APB1_UART2 (0x0020)
+#define STR71X_APB1_UART3 (0x0040)
+#define STR71X_APB1_USB (0x0080)
+#define STR71X_APB1_CAN (0x0100)
+#define STR71X_APB1_BSPI0 (0x0200)
+#define STR71X_APB1_BSPI1 (0x0400)
+#define STR71X_APB1_HDLC (0x2000)
+#define STR71X_APB1_APB1ALL (0x27fb)
+
+/* APB2 Peripherals */
+
+#define STR71X_APB2_XTI (0x0001)
+#define STR71X_APB2_GPIO0 (0x0004)
+#define STR71X_APB2_GPIO1 (0x0008)
+#define STR71X_APB2_GPIO2 (0x0010)
+#define STR71X_APB2_ADC12 (0x0040)
+#define STR71X_APB2_CKOUT (0x0080)
+#define STR71X_APB2_TIM0 (0x0100)
+#define STR71X_APB2_TIM1 (0x0200)
+#define STR71X_APB2_TIM2 (0x0400)
+#define STR71X_APB2_TIM3 (0x0800)
+#define STR71X_APB2_RTC (0x1000)
+#define STR71X_APB2_EIC (0x4000)
+#define STR71X_APB2_APB2ALL (0x5fdd)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_APB_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_bspi.h b/nuttx/arch/arm/src/str71x/str71x_bspi.h new file mode 100644 index 000000000..da46e4d55 --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_bspi.h @@ -0,0 +1,147 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_bspi.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_BSPI_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_BSPI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Register Offsets *****************************************************************/
+
+#define STR71X_BSPI_RXR_OFFSET (0x0000) /* 16-bits wide */
+#define STR71X_BSPI_TXR_OFFSET (0x0004) /* 16-bits wide */
+#define STR71X_BSPI_CSR1_OFFSET (0x0008) /* 16-bits wide */
+#define STR71X_BSPI_CSR2_OFFSET (0x000c) /* 16-bits wide */
+#define STR71X_BSPI_CLK_OFFSET (0x0010) /* 16-bits wide */
+
+/* Registers ************************************************************************/
+
+#define STR71X_BSPI_RXR(b) ((b) + STR71X_BSPI_RXR_OFFSET)
+#define STR71X_BSPI_TXR(b) ((b) + STR71X_BSPI_TXR_OFFSET)
+#define STR71X_BSPI_CSR1(b) ((b) + STR71X_BSPI_CSR1_OFFSET)
+#define STR71X_BSPI_CSR2(b) ((b) + STR71X_BSPI_CSR2_OFFSET)
+#define STR71X_BSPI_CLK(b) ((b) + STR71X_BSPI_CLK_OFFSET)
+
+#define STR71X_BSPI0_RXR (STR71X_BSPI0_BASE + STR71X_BSPI_RXR_OFFSET)
+#define STR71X_BSPI0_TXR (STR71X_BSPI0_BASE + STR71X_BSPI_TXR_OFFSET)
+#define STR71X_BSPI0_CSR1 (STR71X_BSPI0_BASE + STR71X_BSPI_CSR1_OFFSET)
+#define STR71X_BSPI0_CSR2 (STR71X_BSPI0_BASE + STR71X_BSPI_CSR2_OFFSET)
+#define STR71X_BSPI0_CLK (STR71X_BSPI0_BASE + STR71X_BSPI_CLK_OFFSET)
+
+#define STR71X_BSPI1_RXR (STR71X_BSPI1_BASE + STR71X_BSPI_RXR_OFFSET)
+#define STR71X_BSPI1_TXR (STR71X_BSPI1_BASE + STR71X_BSPI_TXR_OFFSET)
+#define STR71X_BSPI1_CSR1 (STR71X_BSPI1_BASE + STR71X_BSPI_CSR1_OFFSET)
+#define STR71X_BSPI1_CSR2 (STR71X_BSPI1_BASE + STR71X_BSPI_CSR2_OFFSET)
+#define STR71X_BSPI1_CLK (STR71X_BSPI1_BASE + STR71X_BSPI_CLK_OFFSET)
+
+/* Register bit settings ***********************************************************/
+
+/* BSPI control/status register 1 */
+
+#define STR71X_BSPICSR1_BSPE 0x0001 /* Bit 0: BSPI enable */
+#define STR71X_BSPICSR1_MSTR 0x0002 /* Bit 1: Master/Slave select */
+#define STR71X_BSPICSR1_RIEMASK 0x000c /* Bit 2-3: BSPI receive interrupt enable */
+#define STR71X_BSPICSR1_RIEDISABLED 0x0000 /* Disabled */
+#define STR71X_BSPICSR1_RIERFNE 0x0004 /* Receive FIFO not empty */
+#define STR71X_BSPICSR1_RIERFF 0x000c /* Receive FIFO full */
+#define STR71X_BSPICSR1_BEIE 0x0080 /* Bit 7: Bus error interrupt enable */
+#define STR71X_BSPICSR1_CPOL 0x0100 /* Bit 8: Clock polarity select */
+#define STR71X_BSPICSR1_CPHA 0x0200 /* Bit 9: Clock phase select */
+#define STR71X_BSPICSR1_WLMASK 0x0c00 /* Bits 10-11: Word length */
+#define STR71X_BSPICSR1_WL8BIT 0x0000 /* 8-bits */
+#define STR71X_BSPICSR1_WL16BIT 0x0400 /* 16-bits */
+#define STR71X_BSPICSR1_RFEMASK 0xf000 /* Bits 12-15: Receive FIFO enable */
+#define STR71X_BSPICSR1_RFE1 0x0000 /* Word 1 enabled */
+#define STR71X_BSPICSR1_RFE12 0x1000 /* Word 1-2 enabled */
+#define STR71X_BSPICSR1_RFE13 0x2000 /* Word 1-3 enabled */
+#define STR71X_BSPICSR1_RFE14 0x3000 /* Word 1-4 enabled */
+#define STR71X_BSPICSR1_RFE15 0x4000 /* Word 1-5 enabled */
+#define STR71X_BSPICSR1_RFE16 0x5000 /* Word 1-6 enabled */
+#define STR71X_BSPICSR1_RFE17 0x6000 /* Word 1-7 enabled */
+#define STR71X_BSPICSR1_RFE18 0x7000 /* Word 1-8 enabled */
+#define STR71X_BSPICSR1_RFE19 0x8000 /* Word 1-9 enabled */
+#define STR71X_BSPICSR1_RFE110 0x9000 /* Word 1-10 enabled */
+
+/* BSPI control/status register 1 */
+
+#define STR71X_BSPICSR2_DFIFO 0x0000 /* Bit 0: FIFO disable */
+#define STR71X_BSPICSR2_BERR 0x0000 /* Bit 2: Bus error */
+#define STR71X_BSPICSR2_RFNE 0x0000 /* Bit 3: Receiver FIFO not empty */
+#define STR71X_BSPICSR2_RFF 0x0000 /* Bit 4: Receiver FIFO full */
+#define STR71X_BSPICSR2_ROFL 0x0000 /* Bit 5: Receiver overflow */
+#define STR71X_BSPICSR2_TFE 0x0000 /* Bit 6: Transmit FIFO empty */
+#define STR71X_BSPICSR2_TUFL 0x0000 /* Bit 7: Transmit FIFO underflow */
+#define STR71X_BSPICSR2_TFF 0x0000 /* Bit 8: Transmit FIFO full */
+#define STR71X_BSPICSR2_TFNE 0x0000 /* Bit 9: Transmit FIFO not empty */
+#define STR71X_BSPICSR2_TFEMASK 0x3c00 /* Bit 10-13: Transmit FIFO enable*/
+#define STR71X_BSPICSR2_TFE1 0x0000 /* Word 1 enabled */
+#define STR71X_BSPICSR2_TFE12 0x0000 /* Word 1-2 enabled */
+#define STR71X_BSPICSR2_TFE13 0x0000 /* Word 1-3 enabled */
+#define STR71X_BSPICSR2_TFE14 0x0000 /* Word 1-4 enabled */
+#define STR71X_BSPICSR2_TFE15 0x0000 /* Word 1-5 enabled */
+#define STR71X_BSPICSR2_TFE16 0x0000 /* Word 1-6 enabled */
+#define STR71X_BSPICSR2_TFE17 0x0000 /* Word 1-7 enabled */
+#define STR71X_BSPICSR2_TFE18 0x0000 /* Word 1-8 enabled */
+#define STR71X_BSPICSR2_TFE19 0x0000 /* Word 1-9 enabled */
+#define STR71X_BSPICSR2_TFE110 0x0000 /* Word 1-10 enabled */
+#define STR71X_BSPICSR2_TIEMASK 0xc000 /* Bit 14-15: BSPI transmit interrupt enable */
+#define STR71X_BSPICSR2_TIEDISABLED 0x0000 /* Disabled */
+#define STR71X_BSPICSR2_TIETFE 0x4000 /* Interrupt on transmit FIFO empty */
+#define STR71X_BSPICSR2_TIETUFL 0x8000 /* Interrupt on transmit underlow */
+#define STR71X_BSPICSR2_TIETFF 0xc000 /* Interrupt on transmit FIFO full */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_BSPI_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_can.h b/nuttx/arch/arm/src/str71x/str71x_can.h new file mode 100644 index 000000000..a4dab4e2a --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_can.h @@ -0,0 +1,207 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_can.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_CAN_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_CAN_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Registers ************************************************************************/
+
+#define STR71X_CAN_CR (STR71X_CAN_BASE + 0x0000) /* 16-bits wide */
+#define STR71X_CAN_SR (STR71X_CAN_BASE + 0x0004) /* 16-bits wide */
+#define STR71X_CAN_ERR (STR71X_CAN_BASE + 0x0008) /* 16-bits wide */
+#define STR71X_CAN_BTR (STR71X_CAN_BASE + 0x000c) /* 16-bits wide */
+#define STR71X_CAN_IDR (STR71X_CAN_BASE + 0x0010) /* 16-bits wide */
+#define STR71X_CAN_TESTR (STR71X_CAN_BASE + 0x0014) /* 16-bits wide */
+#define STR71X_CAN_BRPR (STR71X_CAN_BASE + 0x0018) /* 16-bits wide */
+
+#define STR71X_CAN_IF1BASE (STR71X_CAN_BASE + 0x0020)
+#define STR71X_CAN_IF2BASE (STR71X_CAN_BASE + 0x0080)
+
+#define STR71X_CAN_CRR_OFFSET (0x0000) /* 16-bits wide */
+#define STR71X_CAN_CMR_OFFSET (0x0004) /* 16-bits wide */
+#define STR71X_CAN_M1R_OFFSET (0x0008) /* 16-bits wide */
+#define STR71X_CAN_M2R_OFFSET (0x000c) /* 16-bits wide */
+#define STR71X_CAN_A1R_OFFSET (0x0010) /* 16-bits wide */
+#define STR71X_CAN_A2R_OFFSET (0x0014) /* 16-bits wide */
+#define STR71X_CAN_MCR_OFFSET (0x0018) /* 16-bits wide */
+#define STR71X_CAN_DA1R_OFFSET (0x001c) /* 16-bits wide */
+#define STR71X_CAN_DA2R_OFFSET (0x0020) /* 16-bits wide */
+#define STR71X_CAN_DB1R_OFFSET (0x0024) /* 16-bits wide */
+#define STR71X_CAN_DB2R_OFFSET (0x0028) /* 16-bits wide */
+
+#define STR71X_CAN_CRR(b) ((b) + STR71X_CAN_CRR_OFFSET)
+#define STR71X_CAN_CMR(b) ((b) + STR71X_CAN_CMR_OFFSET)
+#define STR71X_CAN_M1R(b) ((b) + STR71X_CAN_M1R_OFFSET)
+#define STR71X_CAN_M2R(b) ((b) + STR71X_CAN_M2R_OFFSET)
+#define STR71X_CAN_A1R(b) ((b) + STR71X_CAN_A1R_OFFSET)
+#define STR71X_CAN_A2R(b) ((b) + STR71X_CAN_A2R_OFFSET)
+#define STR71X_CAN_MCR(b) ((b) + STR71X_CAN_MCR_OFFSET)
+#define STR71X_CAN_DA1R(b) ((b) + STR71X_CAN_DA1R_OFFSET)
+#define STR71X_CAN_DA2R(b) ((b) + STR71X_CAN_DA2R_OFFSET)
+#define STR71X_CAN_DB1R(b) ((b) + STR71X_CAN_DB1R_OFFSET)
+#define STR71X_CAN_DB2R(b) ((b) + STR71X_CAN_DB2R_OFFSET)
+
+#define STR71X_CAN_IF1CRR (STR71X_CAN_IF1BASE + STR71X_CAN_CRR_OFFSET)
+#define STR71X_CAN_IF1CMR (STR71X_CAN_IF1BASE + STR71X_CAN_CMR_OFFSET)
+#define STR71X_CAN_IF1M1R (STR71X_CAN_IF1BASE + STR71X_CAN_M1R_OFFSET)
+#define STR71X_CAN_IF1M2R (STR71X_CAN_IF1BASE + STR71X_CAN_M2R_OFFSET)
+#define STR71X_CAN_IF1A1R (STR71X_CAN_IF1BASE + STR71X_CAN_A1R_OFFSET)
+#define STR71X_CAN_IF1A2R (STR71X_CAN_IF1BASE + STR71X_CAN_A2R_OFFSET)
+#define STR71X_CAN_IF1MCR (STR71X_CAN_IF1BASE + STR71X_CAN_MCR_OFFSET)
+#define STR71X_CAN_IF1DA1R (STR71X_CAN_IF1BASE + STR71X_CAN_DA1R_OFFSET)
+#define STR71X_CAN_IF1DA2R (STR71X_CAN_IF1BASE + STR71X_CAN_DA2R_OFFSET)
+#define STR71X_CAN_IF1DB1R (STR71X_CAN_IF1BASE + STR71X_CAN_DB1R_OFFSET)
+#define STR71X_CAN_IF1DB2R (STR71X_CAN_IF1BASE + STR71X_CAN_DB2R_OFFSET)
+
+#define STR71X_CAN_IF2CRR (STR71X_CAN_IF2BASE + STR71X_CAN_CRR_OFFSET)
+#define STR71X_CAN_IF2CMR (STR71X_CAN_IF2BASE + STR71X_CAN_CMR_OFFSET)
+#define STR71X_CAN_IF2M1R (STR71X_CAN_IF2BASE + STR71X_CAN_M1R_OFFSET)
+#define STR71X_CAN_IF2M2R (STR71X_CAN_IF2BASE + STR71X_CAN_M2R_OFFSET)
+#define STR71X_CAN_IF2A1R (STR71X_CAN_IF2BASE + STR71X_CAN_A1R_OFFSET)
+#define STR71X_CAN_IF2A2R (STR71X_CAN_IF2BASE + STR71X_CAN_A2R_OFFSET)
+#define STR71X_CAN_IF2MCR (STR71X_CAN_IF2BASE + STR71X_CAN_MCR_OFFSET)
+#define STR71X_CAN_IF2DA1R (STR71X_CAN_IF2BASE + STR71X_CAN_DA1R_OFFSET)
+#define STR71X_CAN_IF2DA2R (STR71X_CAN_IF2BASE + STR71X_CAN_DA2R_OFFSET)
+#define STR71X_CAN_IF2DB1R (STR71X_CAN_IF2BASE + STR71X_CAN_DB1R_OFFSET)
+#define STR71X_CAN_IF2DB2R (STR71X_CAN_IF2BASE + STR71X_CAN_DB2R_OFFSET)
+
+#define STR71X_CAN_TR1R (STR71X_CAN_BASE + 0x0100) /* 16-bits wide */
+#define STR71X_CAN_TR2R (STR71X_CAN_BASE + 0x0104) /* 16-bits wide */
+#define STR71X_CAN_ND1R (STR71X_CAN_BASE + 0x0120) /* 16-bits wide */
+#define STR71X_CAN_ND2R (STR71X_CAN_BASE + 0x0124) /* 16-bits wide */
+#define STR71X_CAN_IP1R (STR71X_CAN_BASE + 0x0140) /* 16-bits wide */
+#define STR71X_CAN_IP2R (STR71X_CAN_BASE + 0x0144) /* 16-bits wide */
+#define STR71X_CAN_MV1R (STR71X_CAN_BASE + 0x0160) /* 16-bits wide */
+#define STR71X_CAN_MV2R (STR71X_CAN_BASE + 0x0164) /* 16-bits wide */
+
+/* Register bit settings ***********************************************************/
+
+/* Control register */
+
+#define STR41X_CANCR_INIT (0x0001)
+#define STR41X_CANCR_IE (0x0002)
+#define STR41X_CANCR_SIE (0x0004)
+#define STR41X_CANCR_EIE (0x0008)
+#define STR41X_CANCR_DAR (0x0020)
+#define STR41X_CANCR_CCE (0x0040)
+#define STR41X_CANCR_TEST (0x0080)
+
+/* Status register */
+
+#define STR41X_CANSR_LEC (0x0007)
+#define STR41X_CANSR_TXOK (0x0008)
+#define STR41X_CANSR_RXOK (0x0010)
+#define STR41X_CANSR_EPASS (0x0020)
+#define STR41X_CANSR_EWARN (0x0040)
+#define STR41X_CANSR_BOFF (0x0080)
+
+/* Test register */
+
+#define STR41X_CANTESTR_BASIC (0x0004)
+#define STR41X_CANTESTR_SILENT (0x0008)
+#define STR41X_CANTESTR_LBACK (0x0010)
+#define STR41X_CANTESTR_TX0 (0x0020)
+#define STR41X_CANTESTR_TX1 (0x0040)
+#define STR41X_CANTESTR_RX (0x0080)
+
+/* IFn / Command Request register */
+
+#define STR41X_CANCRR_BUSY (0x8000)
+
+/* IFn / Command Mask register */
+
+#define STR41X_CANCMR_DATAB (0x0001)
+#define STR41X_CANCMR_DATAA (0x0002)
+#define STR41X_CANCMR_TXRQST (0x0004)
+#define STR41X_CANCMR_CLRINTPND (0x0008)
+#define STR41X_CANCMR_CONTROL (0x0010)
+#define STR41X_CANCMR_ARB (0x0020)
+#define STR41X_CANCMR_MASK (0x0040)
+#define STR41X_CANCMR_WRRD (0x0080)
+
+/* IFn / Mask 2 register */
+
+#define STR41X_CANM2R_MXTD (0x8000)
+#define STR41X_CANM2R_MDIR (0x4000)
+
+/* IFn / Arbitration 2 register */
+
+#define STR41X_CANA2R_DIR (0x2000)
+#define STR41X_CANA2R_XTD (0x4000)
+#define STR41X_CANA2R_MSGVAL (0x8000)
+
+/* IFn / Message Control register */
+
+#define STR41X_CANMCR_EOB (0x0080)
+#define STR41X_CANMCR_TXRQST (0x0100)
+#define STR41X_CANMCR_RMTEN (0x0200)
+#define STR41X_CANMCR_RXIE (0x0400)
+#define STR41X_CANMCR_TXIE (0x0800)
+#define STR41X_CANMCR_UMASK (0x1000)
+#define STR41X_CANMCR_INTPND (0x2000)
+#define STR41X_CANMCR_MSGLST (0x4000)
+#define STR41X_CANMCR_NEWDAT (0x8000)
+
+/* Message ID limits */
+
+#define STR41X_CAN_LASTSTDID ((1 << 11) - 1)
+#define STR41X_CAN_LASTEXTID ((1 << 29) - 1)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_CAN_H */
+
diff --git a/nuttx/arch/arm/src/str71x/str71x_eic.h b/nuttx/arch/arm/src/str71x/str71x_eic.h new file mode 100644 index 000000000..32b1fd91d --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_eic.h @@ -0,0 +1,110 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_eic.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_EIC_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_EIC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "<arch/irq.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Enhanced Interupt Controller (EIC) registers *************************************/
+
+#define STR71X_EIC_ICR (STR71X_EIC_BASE + 0x0000) /* 32-bits wide */
+#define STR71X_EIC_CICR (STR71X_EIC_BASE + 0x0004) /* 32-bits wide */
+#define STR71X_EIC_CIPR (STR71X_EIC_BASE + 0x0008) /* 32-bits wide */
+#define STR71X_EIC_IVR (STR71X_EIC_BASE + 0x0018) /* 32-bits wide */
+#define STR71X_EIC_FIR (STR71X_EIC_BASE + 0x001c) /* 32-bits wide */
+#define STR71X_EIC_IER0 (STR71X_EIC_BASE + 0x0020) /* 32-bits wide */
+#define STR71X_EIC_IPR0 (STR71X_EIC_BASE + 0x0040) /* 32-bits wide */
+
+#define STR71X_EIC_SIR(n) (STR71X_EIC_BASE + 0x0060 + ((n) << 2))
+
+#define STR71X_EIC_SIR0 (STR71X_EIC_BASE + 0x0060) /* 32-bits wide */
+#define STR71X_EIC_SIR1 (STR71X_EIC_BASE + 0x0064) /* 32-bits wide */
+#define STR71X_EIC_SIR2 (STR71X_EIC_BASE + 0x0068) /* 32-bits wide */
+#define STR71X_EIC_SIR3 (STR71X_EIC_BASE + 0x006c) /* 32-bits wide */
+#define STR71X_EIC_SIR4 (STR71X_EIC_BASE + 0x0070) /* 32-bits wide */
+#define STR71X_EIC_SIR5 (STR71X_EIC_BASE + 0x0074) /* 32-bits wide */
+#define STR71X_EIC_SIR6 (STR71X_EIC_BASE + 0x0078) /* 32-bits wide */
+#define STR71X_EIC_SIR7 (STR71X_EIC_BASE + 0x007c) /* 32-bits wide */
+#define STR71X_EIC_SIR8 (STR71X_EIC_BASE + 0x0080) /* 32-bits wide */
+#define STR71X_EIC_SIR9 (STR71X_EIC_BASE + 0x0084) /* 32-bits wide */
+#define STR71X_EIC_SIR10 (STR71X_EIC_BASE + 0x0088) /* 32-bits wide */
+#define STR71X_EIC_SIR11 (STR71X_EIC_BASE + 0x008c) /* 32-bits wide */
+#define STR71X_EIC_SIR12 (STR71X_EIC_BASE + 0x0090) /* 32-bits wide */
+#define STR71X_EIC_SIR13 (STR71X_EIC_BASE + 0x0094) /* 32-bits wide */
+#define STR71X_EIC_SIR14 (STR71X_EIC_BASE + 0x0098) /* 32-bits wide */
+#define STR71X_EIC_SIR15 (STR71X_EIC_BASE + 0x009c) /* 32-bits wide */
+#define STR71X_EIC_SIR16 (STR71X_EIC_BASE + 0x00a0) /* 32-bits wide */
+#define STR71X_EIC_SIR17 (STR71X_EIC_BASE + 0x00a4) /* 32-bits wide */
+#define STR71X_EIC_SIR18 (STR71X_EIC_BASE + 0x00a8) /* 32-bits wide */
+#define STR71X_EIC_SIR19 (STR71X_EIC_BASE + 0x00ac) /* 32-bits wide */
+#define STR71X_EIC_SIR20 (STR71X_EIC_BASE + 0x00b0) /* 32-bits wide */
+#define STR71X_EIC_SIR21 (STR71X_EIC_BASE + 0x00b4) /* 32-bits wide */
+#define STR71X_EIC_SIR22 (STR71X_EIC_BASE + 0x00b8) /* 32-bits wide */
+#define STR71X_EIC_SIR23 (STR71X_EIC_BASE + 0x00bc) /* 32-bits wide */
+#define STR71X_EIC_SIR24 (STR71X_EIC_BASE + 0x00c0) /* 32-bits wide */
+#define STR71X_EIC_SIR25 (STR71X_EIC_BASE + 0x00c4) /* 32-bits wide */
+#define STR71X_EIC_SIR26 (STR71X_EIC_BASE + 0x00c8) /* 32-bits wide */
+#define STR71X_EIC_SIR27 (STR71X_EIC_BASE + 0x00cc) /* 32-bits wide */
+#define STR71X_EIC_SIR28 (STR71X_EIC_BASE + 0x00d0) /* 32-bits wide */
+#define STR71X_EIC_SIR29 (STR71X_EIC_BASE + 0x00d4) /* 32-bits wide */
+#define STR71X_EIC_SIR30 (STR71X_EIC_BASE + 0x00d8) /* 32-bits wide */
+#define STR71X_EIC_SIR31 (STR71X_EIC_BASE + 0x00dc) /* 32-bits wide */
+
+/* Register bit settings ************************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_EIC_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_emi.h b/nuttx/arch/arm/src/str71x/str71x_emi.h new file mode 100644 index 000000000..0bb0be5cc --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_emi.h @@ -0,0 +1,107 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_emi.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_EMI_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_EMI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* External Memory Interfac (EMI) registers *****************************************/
+
+#define STR71X_EMI_BCON0 (STR71X_EMI_BASE + 0x0000) /* 16-bits wide */
+#define STR71X_EMI_BCON1 (STR71X_EMI_BASE + 0x0004) /* 16-bits wide */
+#define STR71X_EMI_BCON2 (STR71X_EMI_BASE + 0x0008) /* 16-bits wide */
+#define STR71X_EMI_BCON3 (STR71X_EMI_BASE + 0x000c) /* 16-bits wide */
+
+/* Register bit settings ***********************************************************/
+
+/* EMI enable */
+
+#define STR71X_EMI_ENABLE (0x8000)
+
+/* Banks */
+
+#define STR71X_EMI_BANK0 (0x00)
+#define STR71X_EMI_BANK1 (0x01)
+#define STR71X_EMI_BANK2 (0x02)
+#define STR71X_EMI_BANK3 (0x03)
+
+/* EMI data bus length */
+
+#define STR71X_EMI_SIZE8 (0x0000)
+#define STR71X_EMI_SIZE16 (0x0001)
+
+/* Number of wait states */
+
+#define STR71X_EMI_0WaitState (0x00)
+#define STR71X_EMI_1WaitState (0x01)
+#define STR71X_EMI_2WaitStates (0x02)
+#define STR71X_EMI_3WaitStates (0x03)
+#define STR71X_EMI_4WaitStates (0x04)
+#define STR71X_EMI_5WaitStates (0x05)
+#define STR71X_EMI_6WaitStates (0x06)
+#define STR71X_EMI_7WaitStates (0x07)
+#define STR71X_EMI_8WaitStates (0x08)
+#define STR71X_EMI_9WaitStates (0x09)
+#define STR71X_EMI_10WaitStates (0x0a)
+#define STR71X_EMI_11WaitStates (0x0b)
+#define STR71X_EMI_12WaitStates (0x0c)
+#define STR71X_EMI_13WaitStates (0x0d)
+#define STR71X_EMI_14WaitStates (0x0e)
+#define STR71X_EMI_15WaitStates (0x0f)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_EMI_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_flash.h b/nuttx/arch/arm/src/str71x/str71x_flash.h new file mode 100644 index 000000000..c21c34c88 --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_flash.h @@ -0,0 +1,123 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_flash.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_FLASH_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_FLASH_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Flash registers ******************************************************************/
+
+#define STR71X_FLASH_CR0 (STR71X_FLASHREG_BASE + 0x0000) /* 32-bits wide */
+#define STR71X_FLASH_CR1 (STR71X_FLASHREG_BASE + 0x0004) /* 32-bits wide */
+#define STR71X_FLASH_DR0 (STR71X_FLASHREG_BASE + 0x0008) /* 32-bits wide */
+#define STR71X_FLASH_DR1 (STR71X_FLASHREG_BASE + 0x000c) /* 32-bits wide */
+#define STR71X_FLASH_AR (STR71X_FLASHREG_BASE + 0x0010) /* 32-bits wide */
+#define STR71X_FLASH_ER (STR71X_FLASHREG_BASE + 0x0014) /* 32-bits wide */
+
+/* Register bit settings ************************************************************/
+
+#define STR71X_FLASH_B0F0 (0x00000001)
+#define STR71X_FLASH_B0F1 (0x00000002)
+#define STR71X_FLASH_B0F2 (0x00000004)
+#define STR71X_FLASH_B0F3 (0x00000008)
+#define STR71X_FLASH_B0F4 (0x00000010)
+#define STR71X_FLASH_B0F5 (0x00000020)
+#define STR71X_FLASH_B0F6 (0x00000040)
+#define STR71X_FLASH_B0F7 (0x00000080)
+
+#define STR71X_FLASH_B1F0 (0x00010000)
+#define STR71X_FLASH_B1F1 (0x00020000)
+
+#define STR71X_FLASH_B0 (STR71X_FLASH_B0F0|STR71X_FLASH_B0F1|\
+ STR71X_FLASH_B0F2|STR71X_FLASH_B0F3|\
+ STR71X_FLASH_B0F4|STR71X_FLASH_B0F5|\
+ STR71X_FLASH_B0F6| STR71X_FLASH_B0F7)
+#define STR71X_FLASH_B1 (STR71X_FLASH_B1F0|STR71X_FLASH_B1F1)
+
+#define STR71X_FLASH_BANK0 (0x1000000)
+#define STR71X_FLASH_BANK1 (0x2000000)
+
+#define STR71X_FLASH_BSYA0 (0x01) /* 000-00001 (0000 0001 (0x01 */ /* STR71X_FLASH_CR0.1 */
+#define STR71X_FLASH_BSYA1 (0x02) /* 000-00010 (0000 0010 (0x02 */ /* STR71X_FLASH_CR0.2 */
+#define STR71X_FLASH_LOCK (0x04) /* 000-00100 (0000 0100 (0x04 */ /* STR71X_FLASH_CR0.4 */
+#define STR71X_FLASH_INTP (0x14) /* 000-10100 (0001 0100 (0x14 */ /* STR71X_FLASH_CR0.20 */
+#define STR71X_FLASH_B0S (0x38) /* 001-11000 (0011 1000 (0x38 */ /* STR71X_FLASH_CR1.24 */
+#define STR71X_FLASH_B1S (0x39) /* 001-11001 (0011 1001 (0x39 */ /* STR71X_FLASH_CR1.25 */
+#define STR71X_FLASH_ERR (0xa0) /* 101-00000 (1010 0000 (0xA0 */ /* STR71X_FLASH_ER.0 */
+#define STR71X_FLASH_ERER (0xa1) /* 101-00001 (1010 0001 (0xA1 */ /* STR71X_FLASH_ER.1 */
+#define STR71X_FLASH_PGER (0xa2) /* 101-00010 (1010 0010 (0xA2 */ /* STR71X_FLASH_ER.2 */
+#define STR71X_FLASH_10ER (0xa3) /* 101-00011 (1010 0011 (0xA3 */ /* STR71X_FLASH_ER.3 */
+#define STR71X_FLASH_SEQER (0xa6) /* 101-00110 (1010 0110 (0xA6 */ /* STR71X_FLASH_ER.6 */
+#define STR71X_FLASH_RESER (0xa7) /* 101-00111 (1010 0111 (0xA7 */ /* STR71X_FLASH_ER.7 */
+#define STR71X_FLASH_WPF (0xa8) /* 101-01000 (1010 1000 (0xA8 */ /* STR71X_FLASH_ER.8 */
+
+#define STR71X_FLASH_WMS_MASK (0x80000000)
+#define STR71X_FLASH_SUSP_MASK (0x40000000)
+#define STR71X_FLASH_WPG_MASK (0x20000000)
+#define STR71X_FLASH_DWPG_MASK (0x10000000)
+#define STR71X_FLASH_SER_MASK (0x08000000)
+#define STR71X_FLASH_SPR_MASK (0x01000000)
+#define STR71X_FLASH_DBGP_MASK (0x00000002)
+#define STR71X_FLASH_ACCP_MASK (0x00000001)
+
+#define STR71X_FLASH_Reg_Mask (0xe0)
+#define STR71X_FLASH_Flag_Mask (0x1f)
+
+#define STR71X_FLASH_INTM_Mask (0x00200000)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_FLASH_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_gpio.h b/nuttx/arch/arm/src/str71x/str71x_gpio.h new file mode 100644 index 000000000..78680a17d --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_gpio.h @@ -0,0 +1,84 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_gpio.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_GPIO_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_GPIO_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* GPIO registers *******************************************************************/
+
+#define STR71X_GPIO_PC0 (STR71X_GPIO_BASE + 0x0000) /* 16-bits wide */
+#define STR71X_GPIO_PC1 (STR71X_GPIO_BASE + 0x0004) /* 16-bits wide */
+#define STR71X_GPIO_PC2 (STR71X_GPIO_BASE + 0x0008) /* 16-bits wide */
+#define STR71X_GPIO_PD (STR71X_GPIO_BASE + 0x000c) /* 16-bits wide */
+
+/* Register bit settings ************************************************************/
+
+#define STR71X_GPIO_HIAINTRI (0) /* High impedance analog input tristate */
+#define STR71X_GPIO_INTRITTL (1) /* Tristate ttl input */
+#define STR71X_GPIO_INTRICMOS (2) /* Tristate cmos input */
+#define STR71X_GPIO_IPUPDWP (3) /* Pull-up/pull-down weak push pull input */
+#define STR71X_GPIO_OUTOD (4) /* Open drain output */
+#define STR71X_GPIO_OUTPP (5) /* Push pull output */
+#define STR71X_GPIO_AFOD (6) /* Open drain output alternate function */
+#define STR71X_GPIO_AFPP (7) /* Push-pull output alternate function */
+
+#define STR71X_GPIO_LSB (0x00)
+#define STR71X_GPIO_MSB (0x08)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_GPIO_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_i2c.h b/nuttx/arch/arm/src/str71x/str71x_i2c.h new file mode 100644 index 000000000..f0267ef38 --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_i2c.h @@ -0,0 +1,159 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_i2c.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_I2C_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_I2C_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Register offets ******************************************************************/
+
+#define STR71X_I2C_SR_OFFSET (0x0000) /* 8-bits wide */
+#define STR71X_I2C_SR1_OFFSET (0x0004) /* 8-bits wide */
+#define STR71X_I2C_SR2_OFFSET (0x0008) /* 8-bits wide */
+#define STR71X_I2C_CCR_OFFSET (0x000c) /* 8-bits wide */
+#define STR71X_I2C_OAR1_OFFSET (0x0010) /* 8-bits wide */
+#define STR71X_I2C_OAR2_OFFSET (0x0014) /* 8-bits wide */
+#define STR71X_I2C_DR_OFFSET (0x0018) /* 8-bits wide */
+#define STR71X_I2C_ECCR_OFFSET (0x001c) /* 8-bits wide */
+
+/* Registers ************************************************************************/
+
+#define STR71X_I2C_SR(b) ((b) + STR71X_I2C_SR_OFFSET)
+#define STR71X_I2C_SR1(b) ((b) + STR71X_I2C_SR1_OFFSET)
+#define STR71X_I2C_SR2(b) ((b) + STR71X_I2C_SR2_OFFSET)
+#define STR71X_I2C_CCR(b) ((b) + STR71X_I2C_CCR_OFFSET)
+#define STR71X_I2C_OAR1(b) ((b) + STR71X_I2C_OAR1_OFFSET)
+#define STR71X_I2C_OAR2(b) ((b) + STR71X_I2C_OAR2_OFFSET)
+#define STR71X_I2C_DR(b) ((b) + STR71X_I2C_DR_OFFSET)
+#define STR71X_I2C_ECCR(b) ((b) + STR71X_I2C_ECCR_OFFSET)
+
+#define STR71X_I2C0_SR (STR71X_I2C0_BASE + STR71X_I2C_SR_OFFSET)
+#define STR71X_I2C0_SR1 (STR71X_I2C0_BASE + STR71X_I2C_SR1_OFFSET)
+#define STR71X_I2C0_SR2 (STR71X_I2C0_BASE + STR71X_I2C_SR2_OFFSET)
+#define STR71X_I2C0_CCR (STR71X_I2C0_BASE + STR71X_I2C_CCR_OFFSET)
+#define STR71X_I2C0_OAR1 (STR71X_I2C0_BASE + STR71X_I2C_OAR1_OFFSET)
+#define STR71X_I2C0_OAR2 (STR71X_I2C0_BASE + STR71X_I2C_OAR2_OFFSET)
+#define STR71X_I2C0_DR (STR71X_I2C0_BASE + STR71X_I2C_DR_OFFSET)
+#define STR71X_I2C0_ECCR (STR71X_I2C0_BASE + STR71X_I2C_ECCR_OFFSET)
+
+#define STR71X_I2C1_SR (STR71X_I2C1_BASE + STR71X_I2C_SR_OFFSET)
+#define STR71X_I2C1_SR1 (STR71X_I2C1_BASE + STR71X_I2C_SR1_OFFSET)
+#define STR71X_I2C1_SR2 (STR71X_I2C1_BASE + STR71X_I2C_SR2_OFFSET)
+#define STR71X_I2C1_CCR (STR71X_I2C1_BASE + STR71X_I2C_CCR_OFFSET)
+#define STR71X_I2C1_OAR1 (STR71X_I2C1_BASE + STR71X_I2C_OAR1_OFFSET)
+#define STR71X_I2C1_OAR2 (STR71X_I2C1_BASE + STR71X_I2C_OAR2_OFFSET)
+#define STR71X_I2C1_DR (STR71X_I2C1_BASE + STR71X_I2C_DR_OFFSET)
+#define STR71X_I2C1_ECCR (STR71X_I2C1_BASE + STR71X_I2C_ECCR_OFFSET)
+
+/* Register bit settings ***********************************************************/
+
+ ST71X_I2C_CR = 0x00,
+ ST71X_I2C_SR1 = 0x04,
+ ST71X_I2C_SR2 = 0x08,
+ ST71X_I2C_CCR = 0x0C,
+ ST71X_I2C_OAR1 = 0x10,
+ ST71X_I2C_OAR2 = 0x14,
+ ST71X_I2C_DR = 0x18,
+ ST71X_I2C_ECCR = 0x1C
+} ST71X_I2C_Registers;
+
+#define ST71X_I2C_SB (0x00000001)
+#define ST71X_I2C_MSL (0x00000002)
+#define ST71X_I2C_ADSL (0x00000004)
+#define ST71X_I2C_BTF (0x00000008)
+#define ST71X_I2C_BUSY (0x00000010)
+#define ST71X_I2C_TRA (0x00000020)
+#define ST71X_I2C_ADD10 (0x00000040)
+#define ST71X_I2C_EVF (0x00000080)
+#define ST71X_I2C_GCAL (0x00000100)
+#define ST71X_I2C_BERR (0x00000200)
+#define ST71X_I2C_ARLO (0x00000400)
+#define ST71X_I2C_STOPF (0x00000800)
+#define ST71X_I2C_AF (0x00001000)
+#define ST71X_I2C_ENDAD (0x00002000)
+#define ST71X_I2C_STOP (0x00008000)
+#define ST71X_I2C_ACK (0x00010000)
+#define ST71X_I2C_START (0x00020000)
+
+#define ST71X_I2C_PESET (0x0020)
+#define ST71X_I2C_PERESET (0x00df)
+#define ST71X_I2C_ENGC (0x0010)
+#define ST71X_I2C_START (0x0008)
+#define ST71X_I2C_STOP (0x0002)
+#define ST71X_I2C_ACK (0x0004)
+#define ST71X_I2C_ITE (0x0001)
+#define ST71X_I2C_EVENT (0x3fff)
+
+/* I2C Events */
+
+#define ST71X_I2C_EVENT_SLAVEADDRESSMATCHED (ST71X_I2C_EVF|ST71X_I2C_BUSY|ST71X_I2C_ADSL)
+#define ST71X_I2C_EVENT_SLAVEBYTERECEIVED (ST71X_I2C_EVF|ST71X_I2C_BUSY|ST71X_I2C_BTF)
+#define ST71X_I2C_EVENT_SLAVEBYTETRANSMITTED (ST71X_I2C_EVF|ST71X_I2C_BUSY|ST71X_I2C_BTF|ST71X_I2C_TRA)
+#define ST71X_I2C_EVENT_MASTERMODESELECT (ST71X_I2C_EVF|ST71X_I2C_BUSY|ST71X_I2C_MSL|ST71X_I2C_SB)
+#define ST71X_I2C_EVENT_MASTERMODESELECTED (ST71X_I2C_EVF|ST71X_I2C_BUSY|ST71X_I2C_MSL|ST71X_I2C_ENDAD)
+#define ST71X_I2C_EVENT_MASTERBYTERECEIVED (ST71X_I2C_EVF|ST71X_I2C_BUSY|ST71X_I2C_MSL|ST71X_I2C_BTF)
+#define ST71X_I2C_EVENT_MASTERBYTETRANSMITTED (ST71X_I2C_EVF|ST71X_I2C_BUSY|ST71X_I2C_MSL|ST71X_I2C_BTF|ST71X_I2C_TRA)
+#define ST71X_I2C_EVENT_MASTERMODEADDRESS10 (ST71X_I2C_EVF|ST71X_I2C_BUSY|ST71X_I2C_MSL|ST71X_I2C_ADD10)
+#define ST71X_I2C_EVENT_SLAVESTOPDETECTED ST71X_I2C_STOPF
+#define ST71X_I2C_EVENT_SLAVEACKFAILURE (ST71X_I2C_EVF|ST71X_I2C_BUSY|ST71X_I2C_BTF|ST71X_I2C_TRA|ST71X_I2C_AF)
+
+#define ST71X_I2C_BUSERRORDETECTED ST71X_I2C_BERR
+#define ST71X_I2C_ARBITRATIONLOST ST71X_I2C_ARLO
+#define ST71X_I2C_SLAVEGENERALCALL (ST71X_I2C_BUSY|ST71X_I2C_GCAL)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_I2C_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_map.h b/nuttx/arch/arm/src/str71x/str71x_map.h new file mode 100644 index 000000000..254ac7905 --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_map.h @@ -0,0 +1,163 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_map.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_MAP_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_MAP_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Memory Map ***********************************************************************/
+
+#define STR71X_FLASHRAMEMI_BASE (0x00000000) /* Flash alias for booting */
+#define STR71X_RAM_BASE (0x20000000)
+#define STR71X_FLASH_BASE (0x40000000)
+#define STR71X_FLASHREG_BASE (0x40100000)
+#define STR71X_EXTMEM_BASE (0x60000000)
+#define STR71X_EMI_BASE (STR71X_EXTMEM_BASE + 0x0c000000)
+#define STR71X_RCCU_BASE (0xa0000000)
+#define STR71X_PCU_BASE (0xa0000040)
+#define STR71X_APB1_BASE (0xc0000000)
+#define STR71X_I2C0_BASE (STR71X_APB1_BASE + 0x1000)
+#define STR71X_I2C1_BASE (STR71X_APB1_BASE + 0x2000)
+#define STR71X_UART0_BASE (STR71X_APB1_BASE + 0x4000)
+#define STR71X_UART1_BASE (STR71X_APB1_BASE + 0x5000)
+#define STR71X_UART2_BASE (STR71X_APB1_BASE + 0x6000)
+#define STR71X_UART3_BASE (STR71X_APB1_BASE + 0x7000)
+#define STR71X_USBRAM_BASE (STR71X_APB1_BASE + 0x8000)
+#define STR71X_USB_BASE (STR71X_APB1_BASE + 0x8800)
+#define STR71X_CAN_BASE (STR71X_APB1_BASE + 0x9000)
+#define STR71X_BSPI0_BASE (STR71X_APB1_BASE + 0xa000)
+#define STR71X_BSPI1_BASE (STR71X_APB1_BASE + 0xb000)
+#define STR71X_HDLCRAM_BASE (STR71X_APB1_BASE + 0xe000)
+#define STR71X_APB2_BASE (0xe0000000)
+#define STR71X_XTI_BASE (STR71X_APB2_BASE + 0x1000)
+#define STR71X_GPIO0_BASE (STR71X_APB2_BASE + 0x3000)
+#define STR71X_GPIO1_BASE (STR71X_APB2_BASE + 0x4000)
+#define STR71X_GPIO2_BASE (STR71X_APB2_BASE + 0x5000)
+#define STR71X_ADC12_BASE (STR71X_APB2_BASE + 0x7000)
+#define STR71X_CLKOUT_BASE (STR71X_APB2_BASE + 0x8000)
+#define STR71X_TIMER0_BASE (STR71X_APB2_BASE + 0x9000)
+#define STR71X_TIMER1_BASE (STR71X_APB2_BASE + 0xa000)
+#define STR71X_TIMER2_BASE (STR71X_APB2_BASE + 0xb000)
+#define STR71X_TIMER3_BASE (STR71X_APB2_BASE + 0xc000)
+#define STR71X_RTC_BASE (STR71X_APB2_BASE + 0xd000)
+#define STR71X_WDOG_BASE (STR71X_APB2_BASE + 0xe000)
+#define STR71X_EIC_BASE (0xfffff800)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif // __ARCH_ARM_SRC_STR71X_STR71X_MAP_H
+
+
+/*------------------------ Analog to Digital Converter -----------------------*/
+
+/*------------------------ APB -----------------------------------------------*/
+
+/*------------------------ Buffered Serial Peripheral Interface --------------*/
+
+/*------------------------ Controller Area Network ---------------------------*/
+
+/*------------------------ Enhanced Interrupt Controller ---------------------*/
+/*------------------------ External Memory Interface -------------------------*/
+
+/*------------------------ General Purpose IO ports --------------------------*/
+
+/*------------------------ I2C interface -------------------------------------*/
+
+/*------------------------ Power Reset Clock Control unit --------------------*/
+
+
+/*------------------------ Real Time Clock -----------------------------------*/
+
+/*------------------------ TIM -----------------------------------------------*/
+
+/*------------------------ Universal Asynchronous Receiver Transmitter -------*/
+
+
+/*------------------------ WATCHDOG ------------------------------------------*/
+/*------------------------ External Interrupt Controller ---------------------*/
+
+
+/* IRQ vectors */
+typedef struct
+{
+ volatile uint32 T0TIMI_IRQHandler;
+ volatile uint32 RCCU_IRQHandler;
+ volatile uint32 RTC_IRQHandler;
+ volatile uint32 WDG_IRQHandler;
+ volatile uint32 XTI_IRQHandler;
+ volatile uint32 USBHP_IRQHandler;
+ volatile uint32 I2C0ITERR_IRQHandler;
+ volatile uint32 I2C1ITERR_IRQHandler;
+ volatile uint32 UART0_IRQHandler;
+ volatile uint32 UART1_IRQHandler;
+ volatile uint32 UART2_IRQHandler;
+ volatile uint32 UART3_IRQHandler;
+ volatile uint32 BSPI0_IRQHandler;
+ volatile uint32 BSPI1_IRQHandler;
+ volatile uint32 I2C0_IRQHandler;
+ volatile uint32 I2C1_IRQHandler;
+ volatile uint32 CAN_IRQHandler;
+ volatile uint32 ADC12_IRQHandler;
+ volatile uint32 T1TIMI_IRQHandler;
+ volatile uint32 T2TIMI_IRQHandler;
+ volatile uint32 T3TIMI_IRQHandler;
+ uint32 EMPTY1[3];
+ volatile uint32 HDLC_IRQHandler;
+ volatile uint32 USBLP_IRQHandler;
+ uint32 EMPTY2[2];
+ volatile uint32 T0TOI_IRQHandler;
+ volatile uint32 T0OC1_IRQHandler;
+ volatile uint32 T0OC2_IRQHandler;
+} IRQVectors_TypeDef;
diff --git a/nuttx/arch/arm/src/str71x/str71x_pcu.h b/nuttx/arch/arm/src/str71x/str71x_pcu.h new file mode 100644 index 000000000..1ac7f39cf --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_pcu.h @@ -0,0 +1,113 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_pcu.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_PCU_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_PCU_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Power Control Unit (PCU) registers ***********************************************/
+
+#define STR71X_PCU_MDIVR (STR71X_PCU_BASE + 0x0000) /* 16-bits wide */
+#define STR71X_PCU_PDIVR (STR71X_PCU_BASE + 0x0004) /* 16-bits wide */
+#define STR71X_PCU_RSTR (STR71X_PCU_BASE + 0x0008) /* 16-bits wide */
+#define STR71X_PCU_PLL2CR (STR71X_PCU_BASE + 0x000c) /* 16-bits wide */
+#define STR71X_PCU_BOOTCR (STR71X_PCU_BASE + 0x0010) /* 16-bits wide */
+#define STR71X_PCU_PWRCR (STR71X_PCU_BASE + 0x0014) /* 16-bits wide */
+
+/* Register bit settings ************************************************************/
+
+/* PCU flags */
+
+#define STR71X_PCU_WREN (0x8000)
+#define STR71X_PCU_VROK (0x1000)
+
+/* PCU VR status */
+
+#define STR71X_PCU_STABLE (0)
+#define STR71X_PCU_UNSTABLE (1)
+
+/* PCU VR */
+
+#define STR71X_PCU_MVR (0x0008)
+#define STR71X_PCU_LPR (0x0010)
+
+/* WFI Clocks */
+
+#define STR71X_PCU_WFICLOCK216 (0)
+#define STR71X_PCU_WFICkAF (1)
+
+/* LPWFI Clocks */
+
+#define STR71X_PCU_LPWFICLK216 (0)
+#define STR71X_PCU_LPWFICKAF (1)
+
+/* RCCU_CCR register bits definition */
+
+#define STR71X_PCUCCR_ENHALT (0x00000800) /* Bit 11: Enable Halt bit */
+#define STR71X_PCUCCR_LPOWFI (0x00000001) /* Bit 0: Low Power Mode in Wait For interrupt Mode */
+
+/* PCU_PWRCR register bits definition */
+
+#define STR71X_PCUPWRCR_VRBYP (0x0008) /* Bit 3: Main Regulator Bypass bit */
+#define STR71X_PCUPWRCR_LPRWFI (0x0010) /* Bit 4: Low Power Regulator in Wait For interrupt Mode bit */
+#define STR71X_PCUPWRCR_LVDDIS (0x0100) /* Bit 8: Low Voltage Detector Disable bit */
+#define STR71X_PCUPWRCR_VROK (0x1000) /* Bit 12: Voltage Regulator OK flag */
+#define STR71X_PCUPWRCR_BUSY (0x4000) /* Bit 14: PCU register Backup logic Busy flag */
+#define STR71X_PCUPWRCR_WREN (0x8000) /* Bit 15: PCU register Write Enable Bit */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_PCU_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_rccu.h b/nuttx/arch/arm/src/str71x/str71x_rccu.h new file mode 100644 index 000000000..c7ff2a88d --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_rccu.h @@ -0,0 +1,194 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_rccu.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_RCCU_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_RCCU_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Reset and Clock Control Unit (RCCU) registers ************************************/
+
+/* All registers are 32-bits wide, but with the top 16 bits "reserved" */
+
+#define STR71X_RCCU_CCR (STR71X_RCCU_BASE + 0x0000) /* 32-bits wide */
+#define STR71X_RCCU_CFR (STR71X_RCCU_BASE + 0x0008) /* 32-bits wide */
+#define STR71X_RCCU_PLL1CR (STR71X_RCCU_BASE + 0x0018) /* 32-bits wide */
+#define STR71X_RCCU_PER (STR71X_RCCU_BASE + 0x001c) /* 32-bits wide */
+#define STR71X_RCCU_SMR (STR71X_RCCU_BASE + 0x0020) /* 32-bits wide */
+
+/* Register bit settings ************************************************************/
+/* RCCU Clock Div */
+
+#define STR71X_RCCU_DEFAULT (0x00)
+#define STR71X_RCCU_RCLK2 (0x01)
+#define STR71X_RCCU_RCLK4 (0x02)
+#define STR71X_RCCU_RCLK8 (0x03)
+
+/* RCCU RCLK Clocks */
+
+#define STR71X_RCCU_PLL1_OUTPUT (0)
+#define STR71X_RCCU_CLOCK216 (1)
+#define STR71X_RCCU_CLOCK2 (2)
+#define STR71X_RCCU_CK_AF (3)
+
+/* RCCU PLL1 Multipliers */
+
+#define STR71X_RCCU_PLL1_MUL12 (0x01)
+#define STR71X_RCCU_PLL1_MUL16 (0x03)
+#define STR71X_RCCU_PLL1_MUL20 (0x00)
+#define STR71X_RCCU_PLL1_MUL24 (0x02)
+
+/* RCCU PLL1 Multipliers */
+
+#define STR71X_RCCU_PLL2_MUL12 (0x01)
+#define STR71X_RCCU_PLL2_MUL16 (0x03)
+#define STR71X_RCCU_PLL2_MUL20 (0x00)
+#define STR71X_RCCU_PLL2_MUL28 (0x02)
+
+/* RCCU PLL Divisors */
+
+#define STR71X_RCCU_DIV1 (0x00)
+#define STR71X_RCCU_DIV2 (0x01)
+#define STR71X_RCCU_DIV3 (0x02)
+#define STR71X_RCCU_DIV4 (0x03)
+#define STR71X_RCCU_DIV5 (0x04)
+#define STR71X_RCCU_DIV6 (0x05)
+#define STR71X_RCCU_DIV7 (0x06)
+
+/* RCCU USB Clocks */
+
+#define STR71X_RCCU_PLL2_OUTPUT (0x01)
+#define STR71X_RCCU_USBCK (0x00)
+
+/* RCCU Clocks */
+
+#define STR71X_RCCU_CLK2 (0)
+#define STR71X_RCCU_RCLK (1)
+#define STR71X_RCCU_MCLK (2)
+#define STR71X_RCCU_PCLK2 (3)
+#define STR71X_RCCU_PCLK1 (4)
+
+/* RCCU Interrupts */
+
+#define STR71X_RCCU_INTPLL1LOCK (0x0080)
+#define STR71X_RCCU_INTCKAF (0x0100)
+#define STR71X_RCCU_INTCK216 (0x0200)
+#define STR71X_RCCU_INTSTOP (0x0400)
+
+/* RCCU Flags */
+
+#define STR71X_RCCU_PLL1LOCK (0x0002)
+#define STR71X_RCCU_CKAFST (0x0004)
+#define STR71X_RCCU_PLL1LOCKI (0x0800)
+#define STR71X_RCCU_CKAFI (0x1000)
+#define STR71X_RCCU_CK216I (0x2000)
+#define STR71X_RCCU_STOPI (0x4000
+
+/* RCCU Reset Sources */
+
+#define STR71X_RCCU_RESETSOURCESMASK (0x000006e0)
+#define STR71X_RCCU_EXTERNALRESET (0x00000000)
+#define STR71X_RCCU_SOFTWARERESET (0x00000020)
+#define STR71X_RCCU_WDGRESET (0x00000040)
+#define STR71X_RCCU_RTCALARMRESET (0x00000080)
+#define STR71X_RCCU_LVDRESET (0x00000200)
+#define STR71X_RCCU_WKPRESET (0x00000400
+
+/* RCCU PLL1 free running modes */
+
+#define STR71X_RCCU_PLL1FRM125 (0)
+#define STR71X_RCCU_PLL1FRM250 (1)
+#define STR71X_RCCU_PLL1FRM500 (2)
+
+#define STR71X_RCCU_DIV2_MASK (0x00008000)
+#define STR71X_RCCU_DIV2_INDEX (0x0f)
+#define STR71X_RCCU_FACT_MASK (0x0003)
+
+#define STR71X_RCCU_FACT1_MASK (0x0003)
+
+#define STR71X_RCCU_FACT2_MASK (0x0300)
+#define STR71X_RCCU_FACT2_INDEX (0x08)
+
+#define STR71X_RCCU_MX_MASK (0x00000030)
+#define STR71X_RCCU_MX_INDEX (0x04)
+
+#define STR71X_RCCU_DX_MASK (0x00000007)
+
+#define STR71X_RCCU_FREFRANGE_MASK (0x00000040)
+
+#define STR71X_RCCU_FRQRNG_MASK (0x00000040)
+
+#define STR71X_RCCU_FREEN_MASK (0x00000080)
+
+#define STR71X_RCCU_PLLEN_MASK (0x00000080)
+
+#define STR71X_RCCU_CSU_CKSEL_MASK (0x00000001)
+
+#define STR71X_RCCU_CK2_16_MASK (0x00000008)
+
+#define STR71X_RCCU_CKAF_SEL_MASK (0x00000004)
+
+#define STR71X_RCCU_LOCK_MASK (0x00000002)
+
+#define STR71X_RCCU_USBEN_MASK (0x0100)
+#define STR71X_RCCU_USBEN_INDEX (0x08)
+
+/* RTC Oscillator Frequency value = 32 768 Hz */
+
+#define STR71X_RCCU_RTC_OSC (32768)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_RCCU_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_rtc.h b/nuttx/arch/arm/src/str71x/str71x_rtc.h new file mode 100644 index 000000000..c9ac48d9e --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_rtc.h @@ -0,0 +1,92 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_rtc.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_RTC_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_RTC_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* RTC Registers ********************************************************************/
+
+#define STR71X_RTC_CRH (STR71X_RTC_BASE + 0x0000) /* 16-bits wide */
+#define STR71X_RTC_CRL (STR71X_RTC_BASE + 0x0004) /* 16-bits wide */
+#define STR71X_RTC_PRLH (STR71X_RTC_BASE + 0x0008) /* 16-bits wide */
+#define STR71X_RTC_PRLL (STR71X_RTC_BASE + 0x000c) /* 16-bits wide */
+#define STR71X_RTC_DIVH (STR71X_RTC_BASE + 0x0010) /* 16-bits wide */
+#define STR71X_RTC_DIVL (STR71X_RTC_BASE + 0x0014) /* 16-bits wide */
+#define STR71X_RTC_CNTH (STR71X_RTC_BASE + 0x0018) /* 16-bits wide */
+#define STR71X_RTC_CNTL (STR71X_RTC_BASE + 0x001c) /* 16-bits wide */
+#define STR71X_RTC_ALRH (STR71X_RTC_BASE + 0x0020) /* 16-bits wide */
+#define STR71X_RTC_ALRL (STR71X_RTC_BASE + 0x0024) /* 16-bits wide */
+
+/* Register bit settings ***********************************************************/
+
+/* RTC control register */
+
+#define STR71X_RTCCRH_SEN (0x0001) /* Bit 0: Second interrupt enable */
+#define STR71X_RTCCRH_AEN (0x0002) /* Bit 1: Alarm interrupt enable */
+#define STR71X_RTCCRH_OWEN (0x0004) /* Bit 2: Overflow interrupt enable */
+#define STR71X_RTCCRH_GEN (0x0008) /* Bit 3: Global interrupt enable */
+
+#define STR71X_RTCCRL_SIR (0x0001) /* Bit 0: Second interrupt request */
+#define STR71X_RTCCRL_AIR (0x0002) /* Bit 1: Alarm interrupt request */
+#define STR71X_RTCCRL_OWIR (0x0004) /* Bit 2: Overflow interrupt request */
+#define STR71X_RTCCRL_GIR (0x0008) /* Bit 3: Global interrupt request */
+#define STR71X_RTCCRL_CNF (0x0010) /* Bit 4: Enter configuration mode */
+#define STR71X_RTCCRL_RTOFF (0x0020) /* Bit 5: RTC Operation Off */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_RTC_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_timer.h b/nuttx/arch/arm/src/str71x/str71x_timer.h new file mode 100644 index 000000000..860316004 --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_timer.h @@ -0,0 +1,154 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_timer.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_TIMER_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_TIMER_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Register offsets *****************************************************************/
+
+#define STR71X_TIMER_ICAR_OFFSET (0x0000) /* 16-bits wide */
+#define STR71X_TIMER_ICBR_OFFSET (0x0004) /* 16-bits wide */
+#define STR71X_TIMER_OCAR_OFFSET (0x0008) /* 16-bits wide */
+#define STR71X_TIMER_OCBR_OFFSET (0x000c) /* 16-bits wide */
+#define STR71X_TIMER_CNTR_OFFSET (0x0010) /* 16-bits wide */
+#define STR71X_TIMER_CR1_OFFSET (0x0014) /* 16-bits wide */
+#define STR71X_TIMER_CR2_OFFSET (0x0018) /* 16-bits wide */
+#define STR71X_TIMER_SR_OFFSET (0x001c) /* 16-bits wide */
+
+/* Register Addresses ***************************************************************/
+
+#define STR71X_TIMER_ICAR(b) ((b) + STR71X_TIMER_ICAR_OFFSET)
+#define STR71X_TIMER_ICBR(b) ((b) + STR71X_TIMER_ICBR_OFFSET)
+#define STR71X_TIMER_OCAR(b) ((b) + STR71X_TIMER_OCAR_OFFSET)
+#define STR71X_TIMER_OCBR(b) ((b) + STR71X_TIMER_OCBR_OFFSET)
+#define STR71X_TIMER_CNTR(b) ((b) + STR71X_TIMER_CNTR_OFFSET)
+#define STR71X_TIMER_CR1(b) ((b) + STR71X_TIMER_CR1_OFFSET)
+#define STR71X_TIMER_CR2(b) ((b) + STR71X_TIMER_CR2_OFFSET)
+#define STR71X_TIMER_SR(b) ((b) + STR71X_TIMER_SR_OFFSET)
+
+#define STR71X_TIMER0_ICAR (STR71X_TIMER0_BASE + STR71X_TIMER_ICAR_OFFSET)
+#define STR71X_TIMER0_ICBR (STR71X_TIMER0_BASE + STR71X_TIMER_ICBR_OFFSET)
+#define STR71X_TIMER0_OCAR (STR71X_TIMER0_BASE + STR71X_TIMER_OCAR_OFFSET)
+#define STR71X_TIMER0_OCBR (STR71X_TIMER0_BASE + STR71X_TIMER_OCBR_OFFSET)
+#define STR71X_TIMER0_CNTR (STR71X_TIMER0_BASE + STR71X_TIMER_CNTR_OFFSET)
+#define STR71X_TIMER0_CR1 (STR71X_TIMER0_BASE + STR71X_TIMER_CR1_OFFSET)
+#define STR71X_TIMER0_CR2 (STR71X_TIMER0_BASE + STR71X_TIMER_CR2_OFFSET)
+#define STR71X_TIMER0_SR (STR71X_TIMER0_BASE + STR71X_TIMER_SR_OFFSET)
+
+#define STR71X_TIMER1_ICAR (STR71X_TIMER1_BASE + STR71X_TIMER_ICAR_OFFSET)
+#define STR71X_TIMER1_ICBR (STR71X_TIMER1_BASE + STR71X_TIMER_ICBR_OFFSET)
+#define STR71X_TIMER1_OCAR (STR71X_TIMER1_BASE + STR71X_TIMER_OCAR_OFFSET)
+#define STR71X_TIMER1_OCBR (STR71X_TIMER1_BASE + STR71X_TIMER_OCBR_OFFSET)
+#define STR71X_TIMER1_CNTR (STR71X_TIMER1_BASE + STR71X_TIMER_CNTR_OFFSET)
+#define STR71X_TIMER1_CR1 (STR71X_TIMER1_BASE + STR71X_TIMER_CR1_OFFSET)
+#define STR71X_TIMER1_CR2 (STR71X_TIMER1_BASE + STR71X_TIMER_CR2_OFFSET)
+#define STR71X_TIMER1_SR (STR71X_TIMER1_BASE + STR71X_TIMER_SR_OFFSET)
+
+#define STR71X_TIMER2_ICAR (STR71X_TIMER2_BASE + STR71X_TIMER_ICAR_OFFSET)
+#define STR71X_TIMER2_ICBR (STR71X_TIMER2_BASE + STR71X_TIMER_ICBR_OFFSET)
+#define STR71X_TIMER2_OCAR (STR71X_TIMER2_BASE + STR71X_TIMER_OCAR_OFFSET)
+#define STR71X_TIMER2_OCBR (STR71X_TIMER2_BASE + STR71X_TIMER_OCBR_OFFSET)
+#define STR71X_TIMER2_CNTR (STR71X_TIMER2_BASE + STR71X_TIMER_CNTR_OFFSET)
+#define STR71X_TIMER2_CR1 (STR71X_TIMER2_BASE + STR71X_TIMER_CR1_OFFSET)
+#define STR71X_TIMER2_CR2 (STR71X_TIMER2_BASE + STR71X_TIMER_CR2_OFFSET)
+#define STR71X_TIMER2_SR (STR71X_TIMER2_BASE + STR71X_TIMER_SR_OFFSET)
+
+#define STR71X_TIMER3_ICAR (STR71X_TIMER3_BASE + STR71X_TIMER_ICAR_OFFSET)
+#define STR71X_TIMER3_ICBR (STR71X_TIMER3_BASE + STR71X_TIMER_ICBR_OFFSET)
+#define STR71X_TIMER3_OCAR (STR71X_TIMER3_BASE + STR71X_TIMER_OCAR_OFFSET)
+#define STR71X_TIMER3_OCBR (STR71X_TIMER3_BASE + STR71X_TIMER_OCBR_OFFSET)
+#define STR71X_TIMER3_CNTR (STR71X_TIMER3_BASE + STR71X_TIMER_CNTR_OFFSET)
+#define STR71X_TIMER3_CR1 (STR71X_TIMER3_BASE + STR71X_TIMER_CR1_OFFSET)
+#define STR71X_TIMER3_CR2 (STR71X_TIMER3_BASE + STR71X_TIMER_CR2_OFFSET)
+#define STR71X_TIMER3_SR (STR71X_TIMER3_BASE + STR71X_TIMER_SR_OFFSET)
+
+/* Register bit settings ***********************************************************/
+
+/* Timer control register (CR1 and CR2) */
+
+#define STR71X_TIMERCR1_ECKEN (0x0001) /* Bit 0: External clock enable */
+#define STR71X_TIMERCR1_EXEDG (0x0002) /* Bit 1: External clock edge */
+#define STR71X_TIMERCR1_IEDGA (0x0004) /* Bit 2: Input edge A */
+#define STR71X_TIMERCR1_IEDGB (0x0008) /* Bit 3: Input edge B */
+#define STR71X_TIMERCR1_PWM (0x0010) /* Bit 4: Pulse width modulation */
+#define STR71X_TIMERCR1_OPM (0x0020) /* Bit 5: One pulse mode */
+#define STR71X_TIMERCR1_OCAE (0x0040) /* Bit 6: Output compare A enable */
+#define STR71X_TIMERCR1_OCBE (0x0080) /* Bit 7: Output compare B enable */
+#define STR71X_TIMERCR1_OLVLA (0x0100) /* Bit 8: Output level A */
+#define STR71X_TIMERCR1_OLVLB (0x0200) /* Bit 9: Output level B */
+#define STR71X_TIMERCR1_FOLVA (0x0400) /* Bit 10: Forced output compare A */
+#define STR71X_TIMERCR1_FOLVB (0x0800) /* Bit 11: Forced output compare B */
+#define STR71X_TIMERCR1_PWMI (0x4000) /* Bit 14: Pulse width modulation input */
+#define STR71X_TIMERCR1_EN (0x8000) /* Bit 15: Timer count enable */
+
+#define STR71X_TIMERCR2_OCBIE (0x0800) /* Bit 11: Output capture B enable */
+#define STR71X_TIMERCR2_ICBIE (0x1000) /* Bit 12: Input capture B enable */
+#define STR71X_TIMERCR2_TOIE (0x2000) /* Bit 13: Timer overflow enable */
+#define STR71X_TIMERCR2_OCAIE (0x4000) /* Bit 14: Output capture A enable */
+#define STR71X_TIMERCR2_ICAIE (0x8000) /* Bit 15: Input capture B enable */
+
+/* Timer status register (SR) */
+
+#define STR71X_TIMERSR_OCFB (0x0800) /* Bit 11: Output capture flag B */
+#define STR71X_TIMERSR_ICFB (0x1000) /* Bit 12: Input capture flag B */
+#define STR71X_TIMERSR_TOF (0x2000) /* Bit 13: Timer overflow */
+#define STR71X_TIMERSR_OCFA (0x4000) /* Bit 14: Output capture flag A */
+#define STR71X_TIMERSR_ICFA (0x8000) /* Bit 15: Input capture flag A */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_TIMER_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_uart.h b/nuttx/arch/arm/src/str71x/str71x_uart.h new file mode 100644 index 000000000..2533f8e78 --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_uart.h @@ -0,0 +1,180 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_uart.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_UART_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_UART_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Registers offsets ****************************************************************/
+
+#define STR71X_UART_BR_OFFSET (0x0000) /* 16-bits wide */
+#define STR71X_UART_TXBUFR_OFFSET (0x0004) /* 16-bits wide */
+#define STR71X_UART_RXBUFR_OFFSET (0x0008) /* 16-bits wide */
+#define STR71X_UART_CR_OFFSET (0x000c) /* 16-bits wide */
+#define STR71X_UART_IER_OFFSET (0x0010) /* 16-bits wide */
+#define STR71X_UART_SR_OFFSET (0x0014) /* 16-bits wide */
+#define STR71X_UART_GTR_OFFSET (0x0018) /* 16-bits wide */
+#define STR71X_UART_TOR_OFFSET (0x001c) /* 16-bits wide */
+#define STR71X_UART_TXRSTR_OFFSET (0x0020) /* 16-bits wide */
+#define STR71X_UART_RXRSTR_OFFSET (0x0024) /* 16-bits wide */
+
+/* Registers addresses **************************************************************/
+
+#define STR71X_UART_BR(b) ((b) + STR71X_UART_BR_OFFSET)
+#define STR71X_UART_TXBUFR(b) ((b) + STR71X_UART_TXBUFR_OFFSET)
+#define STR71X_UART_RXBUFR(b) ((b) + STR71X_UART_RXBUFR_OFFSET)
+#define STR71X_UART_CR(b) ((b) + STR71X_UART_CR_OFFSET)
+#define STR71X_UART_IER(b) ((b) + STR71X_UART_IER_OFFSET)
+#define STR71X_UART_SR(b) ((b) + STR71X_UART_SR_OFFSET)
+#define STR71X_UART_GTR(b) ((b) + STR71X_UART_GTR_OFFSET)
+#define STR71X_UART_TOR(b) ((b) + STR71X_UART_TOR_OFFSET)
+#define STR71X_UART_TXRSTR(b) ((b) + STR71X_UART_TXRSTR_OFFSET)
+#define STR71X_UART_RXRSTR(b) ((b) + STR71X_UART_RXRSTR_OFFSET)
+
+#define STR71X_UART0_BR (STR71X_UART0_BASE + STR71X_UART_BR_OFFSET)
+#define STR71X_UART0_TXBUFR (STR71X_UART0_BASE + STR71X_UART_TXBUFR_OFFSET)
+#define STR71X_UART0_RXBUFR (STR71X_UART0_BASE + STR71X_UART_RXBUFR_OFFSET)
+#define STR71X_UART0_CR (STR71X_UART0_BASE + STR71X_UART_CR_OFFSET)
+#define STR71X_UART0_IER (STR71X_UART0_BASE + STR71X_UART_IER_OFFSET)
+#define STR71X_UART0_SR (STR71X_UART0_BASE + STR71X_UART_SR_OFFSET)
+#define STR71X_UART0_GTR (STR71X_UART0_BASE + STR71X_UART_GTR_OFFSET)
+#define STR71X_UART0_TOR (STR71X_UART0_BASE + STR71X_UART_TOR_OFFSET)
+#define STR71X_UART0_TXRSTR (STR71X_UART0_BASE + STR71X_UART_TXRSTR_OFFSET)
+#define STR71X_UART0_RXRSTR (STR71X_UART0_BASE + STR71X_UART_RXRSTR_OFFSET)
+
+#define STR71X_UART1_BR (STR71X_UART1_BASE + STR71X_UART_BR_OFFSET)
+#define STR71X_UART1_TXBUFR (STR71X_UART1_BASE + STR71X_UART_TXBUFR_OFFSET)
+#define STR71X_UART1_RXBUFR (STR71X_UART1_BASE + STR71X_UART_RXBUFR_OFFSET)
+#define STR71X_UART1_CR (STR71X_UART1_BASE + STR71X_UART_CR_OFFSET)
+#define STR71X_UART1_IER (STR71X_UART1_BASE + STR71X_UART_IER_OFFSET)
+#define STR71X_UART1_SR (STR71X_UART1_BASE + STR71X_UART_SR_OFFSET)
+#define STR71X_UART1_GTR (STR71X_UART1_BASE + STR71X_UART_GTR_OFFSET)
+#define STR71X_UART1_TOR (STR71X_UART1_BASE + STR71X_UART_TOR_OFFSET)
+#define STR71X_UART1_TXRSTR (STR71X_UART1_BASE + STR71X_UART_TXRSTR_OFFSET)
+#define STR71X_UART1_RXRSTR (STR71X_UART1_BASE + STR71X_UART_RXRSTR_OFFSET)
+
+#define STR71X_UART2_BR (STR71X_UART2_BASE + STR71X_UART_BR_OFFSET)
+#define STR71X_UART2_TXBUFR (STR71X_UART2_BASE + STR71X_UART_TXBUFR_OFFSET)
+#define STR71X_UART2_RXBUFR (STR71X_UART2_BASE + STR71X_UART_RXBUFR_OFFSET)
+#define STR71X_UART2_CR (STR71X_UART2_BASE + STR71X_UART_CR_OFFSET)
+#define STR71X_UART2_IER (STR71X_UART2_BASE + STR71X_UART_IER_OFFSET)
+#define STR71X_UART2_SR (STR71X_UART2_BASE + STR71X_UART_SR_OFFSET)
+#define STR71X_UART2_GTR (STR71X_UART2_BASE + STR71X_UART_GTR_OFFSET)
+#define STR71X_UART2_TOR (STR71X_UART2_BASE + STR71X_UART_TOR_OFFSET)
+#define STR71X_UART2_TXRSTR (STR71X_UART2_BASE + STR71X_UART_TXRSTR_OFFSET)
+#define STR71X_UART2_RXRSTR (STR71X_UART2_BASE + STR71X_UART_RXRSTR_OFFSET)
+
+#define STR71X_UART3_BR (STR71X_UART3_BASE + STR71X_UART_BR_OFFSET)
+#define STR71X_UART3_TXBUFR (STR71X_UART3_BASE + STR71X_UART_TXBUFR_OFFSET)
+#define STR71X_UART3_RXBUFR (STR71X_UART3_BASE + STR71X_UART_RXBUFR_OFFSET)
+#define STR71X_UART3_CR (STR71X_UART3_BASE + STR71X_UART_CR_OFFSET)
+#define STR71X_UART3_IER (STR71X_UART3_BASE + STR71X_UART_IER_OFFSET)
+#define STR71X_UART3_SR (STR71X_UART3_BASE + STR71X_UART_SR_OFFSET)
+#define STR71X_UART3_GTR (STR71X_UART3_BASE + STR71X_UART_GTR_OFFSET)
+#define STR71X_UART3_TOR (STR71X_UART3_BASE + STR71X_UART_TOR_OFFSET)
+#define STR71X_UART3_TXRSTR (STR71X_UART3_BASE + STR71X_UART_TXRSTR_OFFSET)
+#define STR71X_UART3_RXRSTR (STR71X_UART3_BASE + STR71X_UART_RXRSTR_OFFSET)
+
+/* Register bit settings ***********************************************************/
+
+/* UART control register (CR) */
+
+#define STR71X_UARTCR_MODEMASK (0x0007) /* Bits 0-2: Mode */
+#define STR71X_UARTCR_MODE8BIT (0x0001) /* 8-bit */
+#define STR71X_UARTCR_MODE7BITP (0x0003) /* 7-bit with parity bit */
+#define STR71X_UARTCR_MODE9BIT (0x0004) /* 9-bit */
+#define STR71X_UARTCR_MODE8BIT (0x0005) /* 8-bit with wakeup bit */
+#define STR71X_UARTCR_MODE8BIT (0x0007) /* 8-bit with parity bit */
+#define STR71X_UARTCR_STOPBITSMASK (0x0018) /* Bits 3-4: Stop bits */
+#define STR71X_UARTCR_STOPBIT0 (0x0000) /* 0.5 stop bits */
+#define STR71X_UARTCR_STOPBIT1 (0x0008) /* 1 stop bit */
+#define STR71X_UARTCR_STOPBIT0 (0x0010) /* 1.5 stop bits */
+#define STR71X_UARTCR_STOPBIT0 (0x0018) /* 2 stop bits */
+#define STR71X_UARTCR_PARITYODD (0x0020) /* Bit 5:
+#define STR71X_UARTCR_LOOPBACK (0x0040) /* Bit 6:
+#define STR71X_UARTCR_RUN (0x0080) /* Bit 7:
+#define STR71X_UARTCR_RXENABLE (0x0100) /* Bit 8:
+#define STR71X_UARTCR_SCENABLE (0x0200) /* Bit 9:
+#define STR71X_UARTCR_FIFOENABLE (0x0400) /* Bit 10: FIFO enable */
+
+/* UART interrupt enable (IER) register */
+
+#define STR71X_UARTIER_RNE (0x0001) /* Bit 0: Rx buffer not empty */
+#define STR71X_UARTIER_TE (0x0002) /* Bit 1: Tx empty */
+#define STR71X_UARTIER_THE (0x0004) /* Bit 2: Tx half empty */
+#define STR71X_UARTIER_PERROR (0x0008) /* Bit 3: Parity error */
+#define STR71X_UARTIER_FRERROR (0x0010) /* Bit 4: Frame error */
+#define STR71X_UARTIER_OVERRUN (0x0020) /* Bit 5: Overrun error */
+#define STR71X_UARTIER_TIMEOUTNE (0x0040) /* Bit 6: Time out not empty*/
+#define STR71X_UARTIER_TIMEOUTIDLE (0x0080) /* Bit 7: Timeout out idle */
+#define STR71X_UARTIER_RHF (0x0100) /* Bit 8: Rx half full */
+
+/* UART status register (SR) */
+
+#define STR71X_UARTSR_RNE (0x0001) /* Bit 0: Rx buffer not empty */
+#define STR71X_UARTSR_TE (0x0002) /* Bit 1: Tx empty */
+#define STR71X_UARTSR_THE (0x0004) /* Bit 2: Tx half empty */
+#define STR71X_UARTSR_PERR (0x0008) /* Bit 3: Parity error */
+#define STR71X_UARTSR_FRERROR (0x0010) /* Bit 4: Frame error */
+#define STR71X_UARTSR_OVERRUN (0x0020) /* Bit 5: Overrun error */
+#define STR71X_UARTSR_TIMEOUTNE (0x0040) /* Bit 6: Time out not empty*/
+#define STR71X_UARTSR_TIMEOUTIDLE (0x0080) /* Bit 7: Timeout out idle */
+#define STR71X_UARTSR_RHF (0x0100) /* Bit 8: Rx half full */
+#define STR71X_UARTSR_TF (0x0200) /* Bit 9: Tx full */
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_UART_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_usb.h b/nuttx/arch/arm/src/str71x/str71x_usb.h new file mode 100644 index 000000000..c9d9d9116 --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_usb.h @@ -0,0 +1,193 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_usb.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_USB_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_USB_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* USB registers ********************************************************************/
+
+#define STR71X_USB_NENDPNTS (16)
+#define STR71X_USB_EPR(ep) (STR71X_USB_BASE + ((ep) << 4))
+#define STR71X_USB_EP0R (STR71X_USB_BASE + 0x0000) /* Endpoint 0 */
+#define STR71X_USB_EP1R (STR71X_USB_BASE + 0x0004) /* Endpoint 1 */
+#define STR71X_USB_EP2R (STR71X_USB_BASE + 0x0008) /* Endpoint 2 */
+#define STR71X_USB_EP3R (STR71X_USB_BASE + 0x000c) /* Endpoint 3 */
+#define STR71X_USB_EP4R (STR71X_USB_BASE + 0x0010) /* Endpoint 4 */
+#define STR71X_USB_EP5R (STR71X_USB_BASE + 0x0014) /* Endpoint 5 */
+#define STR71X_USB_EP6R (STR71X_USB_BASE + 0x0018) /* Endpoint 6 */
+#define STR71X_USB_EP7R (STR71X_USB_BASE + 0x001c) /* Endpoint 7 */
+#define STR71X_USB_EP8R (STR71X_USB_BASE + 0x0020) /* Endpoint 8 */
+#define STR71X_USB_EP9R (STR71X_USB_BASE + 0x0024) /* Endpoint 9 */
+#define STR71X_USB_EP10R (STR71X_USB_BASE + 0x0028) /* Endpoint 10 */
+#define STR71X_USB_EP11R (STR71X_USB_BASE + 0x002c) /* Endpoint 11 */
+#define STR71X_USB_EP12R (STR71X_USB_BASE + 0x0030) /* Endpoint 12 */
+#define STR71X_USB_EP13R (STR71X_USB_BASE + 0x0034) /* Endpoint 13 */
+#define STR71X_USB_EP14R (STR71X_USB_BASE + 0x0038) /* Endpoint 14 */
+#define STR71X_USB_EP15R (STR71X_USB_BASE + 0x003c) /* Endpoint 15 */
+#define STR71X_USB_CNTR (STR71X_USB_BASE + 0x0040) /* Control register */
+#define STR71X_USB_ISTR (STR71X_USB_BASE + 0x0044) /* Interrupt status register */
+#define STR71X_USB_FNR (STR71X_USB_BASE + 0x0048) /* Frame number register */
+#define STR71X_USB_DADDR (STR71X_USB_BASE + 0x004C) /* Device address register */
+#define STR71X_USB_BTABLE (STR71X_USB_BASE + 0x0050) /* Buffer Table address register */
+
+/* Register bit settings ***********************************************************/
+
+/* Interrupt status register (ISTR) */
+
+#define STR71X_USBISTR_CTR (0x8000) /* Correct Transfer */
+#define STR71X_USBISTR_DOVR (0x4000) /* DMA Over/underrun */
+#define STR71X_USBISTR_ERR (0x2000) /* Error */
+#define STR71X_USBISTR_WKUP (0x1000) /* Wakeup */
+#define STR71X_USBISTR_SUSP (0x0800) /* Suspend */
+#define STR71X_USBISTR_RESET (0x0400) /* Reset */
+#define STR71X_USBISTR_SOF (0x0200) /* Start of frame */
+#define STR71X_USBISTR_ESOF (0x0100) /* Expected start of frame */
+#define STR71X_USBISTR_DIR (0x0010) /* DIRection of transaction */
+#define STR71X_USBISTR_EPID (0x000f) /* Endpoint IDentifier */
+
+#define STR71X_USBCLR_CTR (~STR71X_USBISTR_CTR)
+#define STR71X_USBCLR_DOVR (~STR71X_USBISTR_DOVR)
+#define STR71X_USBCLR_ERR (~STR71X_USBISTR_ERR)
+#define STR71X_USBCLR_WKUP (~STR71X_USBISTR_WKUP)
+#define STR71X_USBCLR_SUSP (~STR71X_USBISTR_SUSP)
+#define STR71X_USBCLR_RESET (~STR71X_USBISTR_RESET)
+#define STR71X_USBCLR_SOF (~STR71X_USBISTR_SOF)
+#define STR71X_USBCLR_ESOF (~STR71X_USBISTR_ESOF)
+
+/* Control Register (CNTR) */
+
+#define STR71X_USBCNTR_CTRM (0x8000) /* Correct transfer */
+#define STR71X_USBCNTR_DOVRM (0x4000) /* DMA over/underrun */
+#define STR71X_USBCNTR_ERRM (0x2000) /* Error */
+#define STR71X_USBCNTR_WKUPM (0x1000) /* Wake up */
+#define STR71X_USBCNTR_SUSPM (0x0800) /* Suspend */
+#define STR71X_USBCNTR_RESETM (0x0400) /* Reset */
+#define STR71X_USBCNTR_SOFM (0x0200) /* Start of frame */
+#define STR71X_USBCNTR_ESOFM (0x0100) /* Expected start of frame */
+#define STR71X_USBCNTR_RESUME (0x0010) /* Resume request */
+#define STR71X_USBCNTR_FSUSP (0x0008) /* Force suspend */
+#define STR71X_USBCNTR_LPMODE (0x0004) /* Low-power mode */
+#define STR71X_USBCNTR_PDWN (0x0002) /* Power down */
+#define STR71X_USBCNTR_FRES (0x0001) /* Force usb reset */
+
+/* Frame number register (FNR) */
+
+#define STR71X_USBFNR_RXDP (0x8000) /* Status of D+ data line */
+#define STR71X_USBFNR_RXDM (0x4000) /* Status of D- data line */
+#define STR71X_USBFNR_LCK (0x2000) /* Locked */
+#define STR71X_USBFNR_LSOF (0x1800) /* Lost SOF */
+#define STR71X_USBFNR_FN (0x07ff) /* Frame number */
+
+/* Device address register (DADDR) */
+
+#define STR71X_USBDADDR_EF (0x80)
+#define STR71X_USBDADDR_ADD (0x7f)
+
+/* Endpoint registers (EPR) */
+
+#define STR71X_USBEPR_CTRRX (0x8000) /* Endpoint correct transfer RX */
+#define STR71X_USBEPR_DTOGRX (0x4000) /* Endpoint data toggle RX */
+#define STR71X_USBEPR_RXSTAT (0x3000) /* Endpoint RX status bit */
+#define STR71X_USBEPR_SETUP (0x0800) /* Endpoint setup */
+#define STR71X_USBEPR_TFIELD (0x0600) /* Endpoint type */
+#define STR71X_USBEPR_KIND (0x0100) /* Endpoint kind */
+#define STR71X_USBEPR_CTRTX (0x0080) /* Endpoint correct transfer TX */
+#define STR71X_USBEPR_DTOGTX (0x0040) /* Endpoint data toggle TX */
+#define STR71X_USBEPR_TXSTAT (0x0030) /* Endpoint TX status bit */
+#define STR71X_USBEPR_ADDRFIELD (0x000f) /* Endpoint address */
+
+/* Endpoint register mask (no toggle fields) */
+
+#define STR71X_USBEPRREG_MASK (STR71X_USBEPR_CTRRX|STR71X_USBEPR_SETUP|STR71X_USBEPR_TFIELD|\
+ STR71X_USBEPR_KIND|STR71X_USBEPR_CTRTX|STR71X_USBEPR_ADDRFIELD)
+
+/* EP_TYPE[1:0] Endpoint type */
+
+#define STR71X_USBEPR_TYPEMASK (0x0600) /* Endpoint type mask */
+#define STR71X_USBEPR_BULK (0x0000) /* Endpoint BULK */
+#define STR71X_USBEPR_CONTROL (0x0200) /* Endpoint CONTROL */
+#define STR71X_USBEPR_ISOC (0x0400) /* Endpoint ISOCHRONOUS */
+#define STR71X_USBEPR_INTERRUPT (0x0600) /* Endpoint INTERRUPT */
+#define STR71X_USBEPR_TMASK (~STR71X_USBEPR_TFIELD & STR71X_USBEPRREG_MASK)
+
+/* EP_KIND Endpoint kind */
+
+#define STR71X_USBEPR_KINDMASK (~STR71X_USBEPR_KIND & STR71X_USBEPRREG_MASK)
+
+/* STAT_TX[1:0] Status for TX transfer */
+
+#define STR71X_USBEPR_TXDIS (0x0000) /* Endpoint TX disabled */
+#define STR71X_USBEPR_TXSTALL (0x0010) /* Endpoint TX stalled */
+#define STR71X_USBEPR_TXNAK (0x0020) /* Endpoint TX NAKed */
+#define STR71X_USBEPR_TXVALID (0x0030) /* Endpoint TX valid */
+#define STR71X_USBEPRTX_DTOG1 (0x0010) /* Endpoint TX data toggle bit1 */
+#define STR71X_USBEPRTX_DTOG2 (0x0020) /* Endpoint TX data toggle bit2 */
+#define STR71X_USBEPRTX_DTOGMASK (STR71X_USBEPR_TXSTAT|STR71X_USBEPRREG_MASK)
+
+/* STAT_RX[1:0] Status for RX transfer */
+
+#define STR71X_USBEPR_RXDIS (0x0000) /* Endpoint RX disabled */
+#define STR71X_USBEPR_RXSTALL (0x1000) /* Endpoint RX stalled */
+#define STR71X_USBEPR_RXNAK (0x2000) /* Endpoint RX NAKed */
+#define STR71X_USBEPR_RXVALID (0x3000) /* Endpoint RX valid */
+#define STR71X_USBEPR_RXDTOG1 (0x1000) /* Endpoint RX data toggle bit1 */
+#define STR71X_USBEPR_RXDTOG2 (0x2000) /* Endpoint RX data toggle bit1 */
+#define STR71X_USBEPR_RXDTOGMASK (EPRX_STAT|STR71X_USBEPRREG_MASK)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* __ARCH_ARM_SRC_STR71X_STR71X_USB_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_wdog.h b/nuttx/arch/arm/src/str71x/str71x_wdog.h new file mode 100644 index 000000000..11661aa7f --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_wdog.h @@ -0,0 +1,75 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_wdog.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef #define __ARCH_ARM_SRC_STR71X_STR71X_WDOG_H
+#define #define __ARCH_ARM_SRC_STR71X_STR71X_WDOG_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* Registers ************************************************************************/
+
+#define STR71X_WDOG_CR (STR71X_WDOG_BASE + 0x0000) /* 16-bits wide */
+#define STR71X_WDOG_PR (STR71X_WDOG_BASE + 0x0004) /* 16-bits wide */
+#define STR71X_WDOG_VR (STR71X_WDOG_BASE + 0x0008) /* 16-bits wide */
+#define STR71X_WDOG_CNT (STR71X_WDOG_BASE + 0x000c) /* 16-bits wide */
+#define STR71X_WDOG_SR (STR71X_WDOG_BASE + 0x0010) /* 16-bits wide */
+#define STR71X_WDOG_MR (STR71X_WDOG_BASE + 0x0014) /* 16-bits wide */
+#define STR71X_WDOG_KR (STR71X_WDOG_BASE + 0x00018 /* 16-bits wide */
+
+/* Register bit settings ***********************************************************/
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* #define __ARCH_ARM_SRC_STR71X_STR71X_WDOG_H */
diff --git a/nuttx/arch/arm/src/str71x/str71x_xti.h b/nuttx/arch/arm/src/str71x/str71x_xti.h new file mode 100644 index 000000000..45f8778af --- /dev/null +++ b/nuttx/arch/arm/src/str71x/str71x_xti.h @@ -0,0 +1,105 @@ +/************************************************************************************
+ * arch/arm/src/str71x/str71x_xti.h
+ *
+ * Copyright (C) 2008 Gregory Nutt. All rights reserved.
+ * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ * used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_STR71X_STR71X_XTI_H
+#define __ARCH_ARM_SRC_STR71X_STR71X_XTI_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "str71x_map.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* External Interupt Controller (XTI) registers *************************************/
+
+#define STR71X_XTI_SR (STR71X_XTI_BASE + 0x001c) /* 8-bits wide */
+#define STR71X_XTI_CTRL (STR71X_XTI_BASE + 0x0024) /* 8-bits wide */
+#define STR71X_XTI_MRH (STR71X_XTI_BASE + 0x0028) /* 8-bits wide */
+#define STR71X_XTI_MRL (STR71X_XTI_BASE + 0x002c) /* 8-bits wide */
+#define STR71X_XTI_TRH (STR71X_XTI_BASE + 0x0030) /* 8-bits wide */
+#define STR71X_XTI_TRL (STR71X_XTI_BASE + 0x0034) /* 8-bits wide */
+#define STR71X_XTI_PRH (STR71X_XTI_BASE + 0x0038) /* 8-bits wide */
+#define STR71X_XTI_PRL (STR71X_XTI_BASE + 0x003c) /* 8-bits wide */
+
+/* Register bit settings ************************************************************/
+
+/* Control register (CTRL) */
+
+#define STR71X_XTICTRL_WKUPINT (0x01)
+#define STR71X_XTICTRL_ID1S (0x02)
+#define STR71X_XTICTRL_STOP (0x04)
+
+/* Most registers are address by external interrupt line in two 8-bit high and low
+ * registers
+ */
+
+#define STR71X_XTI_LINE(n) (1 << (n))
+#define STR71X_XTI_LINE0 STR71X_XTI_LINE(0) /* Low register */
+#define STR71X_XTI_LINE1 STR71X_XTI_LINE(1)
+#define STR71X_XTI_LINE2 STR71X_XTI_LINE(2)
+#define STR71X_XTI_LINE3 STR71X_XTI_LINE(3)
+#define STR71X_XTI_LINE4 STR71X_XTI_LINE(4)
+#define STR71X_XTI_LINE5 STR71X_XTI_LINE(5)
+#define STR71X_XTI_LINE6 STR71X_XTI_LINE(6)
+#define STR71X_XTI_LINE7 STR71X_XTI_LINE(7)
+
+#define STR71X_XTI_LINE8 STR71X_XTI_LINE(8) /* High register */
+#define STR71X_XTI_LINE9 STR71X_XTI_LINE(9)
+#define STR71X_XTI_LINE10 STR71X_XTI_LINE(10)
+#define STR71X_XTI_LINE11 STR71X_XTI_LINE(11)
+#define STR71X_XTI_LINE12 STR71X_XTI_LINE(12)
+#define STR71X_XTI_LINE13 STR71X_XTI_LINE(13)
+#define STR71X_XTI_LINE14 STR71X_XTI_LINE(14)
+#define STR71X_XTI_LINE15 STR71X_XTI_LINE(15)
+
+/************************************************************************************
+ * Public Types
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#endif /* _ARCH_ARM_SRC_STR71X_STR71X_XTI_H */
diff --git a/nuttx/configs/olimex-strp711/README.txt b/nuttx/configs/olimex-strp711/README.txt new file mode 100644 index 000000000..cec7b70e6 --- /dev/null +++ b/nuttx/configs/olimex-strp711/README.txt @@ -0,0 +1,64 @@ +For a debug environment, I am using OpenOCD with a Wiggler-clone JTAG interface. The +following steps worked for me with a 20081028 OpenOCD snapshot. + +GENERAL STEPS: + +1. Check out OpenOCD + + svn checkout svn://svn.berlios.de/openocd/trunk openocd + +2. Build OpenOCD + + Read the INSTALL file from the files you just downloaded. You probably just need + to run: + + ./bootstrap + + Then configure OpenOCD using the configure script created by ./bootstrap. + + ./configure --enable-parport + + Build OpenOCD with: + + make + + Install OpenOCD. Since we used the default configuration the code will be + installed at /usr/local/bin/openocd. Other files will be installed at + /usr/local/lib/openocd (configuration files, scripts, etc.) and /usr/local/share/info + (online documentation accessable via 'info openocd'). You need root priviledges + to do the following: + + make install. + +3. Setup + + OpenOCD reads its configuration from the file openocd.cfg in the current directory + when started. You have two different options: + + * Create a symbolic link named openocd.cfg to one of the configuration files in + /usr/local/lib/openocd, or + + * Use a custom configuration file specified with the ‘-f <conf.file>’ command line + switch opeion when starting OpenOCD. + + For the STR-P711, I have included bash scripts in the scripts sub-directory. + +4. Running OpenOCD + + Make sure the ARM7TDMI board is powered and the JTAG cable is connected + + Run 'src/openocd -d' (might be required to be root) and check for any errors + reported. The '-d' option enables debugging info. + +5. Telnet interface + + telnet into port 4444 to get a command interface: 'telnet localhost 4444' + +6. GDB + + start arm-elf-gdb + type 'file <executable.elf>' to load the executable + type 'set debug remote 1' to enable tracing of gdb protocol (if required) + type 'target remote localhost:3333' to connect to the target + The same commands from the telnet interface can now be accessed through the + 'monitor' command, e.g. 'monitor help' diff --git a/nuttx/configs/olimex-strp711/ostest/Make.defs b/nuttx/configs/olimex-strp711/ostest/Make.defs new file mode 100644 index 000000000..52b7eb526 --- /dev/null +++ b/nuttx/configs/olimex-strp711/ostest/Make.defs @@ -0,0 +1,97 @@ +############################################################################## +# configs/olimex-strp711/ostest/Make.defs +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <spudmonkey@racsa.co.cr> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################## + +include ${TOPDIR}/.config + +ifeq ("${CONFIG_DEBUG}","y") + ARCHOPTIMIZATION = -g +else + ARCHOPTIMIZATION = -Os -fno-strict-aliasing -fno-strength-reduce \ + -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mapcs-32 -mcpu=arm7tdmi -msoft-float -fno-builtin +ARCHPICFLAGS = -fpic +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow +ARCHDEFINES = +ARCHINCLUDES = -I. -isystem $(TOPDIR)/include +ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script + +CROSSDEV = arm-elf- +CC = $(CROSSDEV)gcc +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +CFLAGS = $(ARCHWARNINGS) $(ARCHOPTIMIZATION) \ + $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) -pipe +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifeq ("${CONFIG_DEBUG}","y") + LDFLAGS += -g +endif + +define COMPILE + @echo "CC: $1" + @$(CC) -c $(CFLAGS) $1 -o $2 +endef + +define ASSEMBLE + @echo "AS: $1" + @$(CC) -c $(AFLAGS) $1 -o $2 +endef + +define ARCHIVE + echo "AR: $2"; \ + $(AR) $1 $2 || { echo "$(AR) $1 $2 FAILED!" ; exit 1 ; } +endef + +define CLEAN + @rm -f *.o *.a +endef + +MKDEP = $(TOPDIR)/tools/mkdeps.sh + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -wstrict-prototypes -Wshadow -g -pipe +HOSTLDFLAGS = + diff --git a/nuttx/configs/olimex-strp711/ostest/defconfig b/nuttx/configs/olimex-strp711/ostest/defconfig new file mode 100644 index 000000000..cbd2c7580 --- /dev/null +++ b/nuttx/configs/olimex-strp711/ostest/defconfig @@ -0,0 +1,549 @@ +############################################################################ +# configs/olimes-strp711/ostest/defconfig +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <spudmonkey@racsa.co.cr> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ +# +# Architecture selection +# +# CONFIG_ARCH - identifies the arch subdirectory and, hence, the +# processor architecture. +# CONFIG_ARCH_name - for use in C code. This identifies the +# particular chip or SoC that the architecture is implemented +# in. +# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory +# CONFIG_ARCH_CHIP_name - For use in C code +# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence, +# the board that supports the particular chip or SoC. +# CONFIG_ENDIAN_BIG - define if big endian (default is little endian) +# CONFIG_ARCH_BOARD_name - for use in C code +# CONFIG_BOARD_LOOPSPERMSEC - for delay loops +# CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to Olimex STR-P711 +# CONFIG_DRAM_SIZE - Describes the internal DRAM. +# CONFIG_DRAM_START - The start address of internal DRAM +# CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt +# stack. If defined, this symbol is the size of the interrupt +# stack in bytes. If not defined, the user task stacks will be +# used during interrupt handling. +# CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions +# +CONFIG_ARCH=arm +CONFIG_ARCH_CHIP=str71x +CONFIG_ARCH_STR71X=y +CONFIG_ARCH_BOARD=olimex-strp711 +CONFIG_ARCH_BOARD_OLIMEX_STRP711=y +CONFIG_BOARD_LOOPSPERMSEC=3270 +CONFIG_ARCH_LEDS=y +CONFIG_DRAM_SIZE=0x00008000 +CONFIG_DRAM_START=0x40000000 +CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE) +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_STACKDUMP=y + +# +# STR71x specific device driver settings +# +# CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the +# console and ttys0 (default is the UART0). +# CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received. +# This specific the size of the receive buffer +# CONFIG_UARTn_TXBUFSIZE - Characters are buffered before +# being sent. This specific the size of the transmit buffer +# CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be +# CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8. +# CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity, 3=mark 1, 4=space 0 +# CONFIG_UARTn_2STOP - Two stop bits +# +CONFIG_UART0_SERIAL_CONSOLE=y +CONFIG_UART1_SERIAL_CONSOLE=n +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART0_BAUD=38400 +CONFIG_UART1_BAUD=38400 +CONFIG_UART0_BITS=8 +CONFIG_UART1_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART1_PARITY=0 +CONFIG_UART0_2STOP=0 +CONFIG_UART1_2STOP=0 + +# +# General build options +# +# CONFIG_RRLOAD_BINARY - make the rrload binary format used with +# BSPs from www.ridgerun.com using the tools/mkimage.sh script +# CONFIG_INTELHEX_BINARY - make the Intel HEX binary format +# used with many different loaders using the GNU objcopy program +# Should not be selected if you are not using the GNU toolchain. +# CONFIG_RAW_BINARY - make a raw binary format file used with many +# different loaders using the GNU objcopy program. This option +# should not be selected if you are not using the GNU toolchain. +# CONFIG_HAVE_LIBM - toolchain supports libm.a +# +CONFIG_RRLOAD_BINARY=n +CONFIG_INTELHEX_BINARY=n +CONFIG_RAW_BINARY=y +CONFIG_HAVE_LIBM=n + +# +# General OS setup +# +# CONFIG_EXAMPLE - identifies the subdirectory in examples +# that will be used in the build +# CONFIG_DEBUG - enables built-in debug options +# CONFIG_DEBUG_VERBOSE - enables verbose debug output +# CONFIG_MM_REGIONS - If the architecture includes multiple +# regions of memory to allocate from, this specifies the +# number of memory regions that the memory manager must +# handle and enables the API mm_addregion(start, end); +# CONFIG_ARCH_LOWPUTC - architecture supports low-level, boot +# time console output +# CONFIG_TICKS_PER_MSEC - The default system timer is 100Hz +# or TICKS_PER_MSEC=10. This setting may be defined to +# inform NuttX that the processor hardware is providing +# system timer interrupts at some interrupt interval other +# than 10 msec. +# CONFIG_RR_INTERVAL - The round robin timeslice will be set +# this number of milliseconds; Round robin scheduling can +# be disabled by setting this value to zero. +# CONFIG_SCHED_INSTRUMENTATION - enables instrumentation in +# scheduler to monitor system performance +# CONFIG_TASK_NAME_SIZE - Spcifies that maximum size of a +# task name to save in the TCB. Useful if scheduler +# instrumentation is selected. Set to zero to disable. +# CONFIG_START_YEAR, CONFIG_START_MONTH, CONFIG_START_DAY - +# Used to initialize the internal time logic. +# CONFIG_JULIAN_TIME - Enables Julian time conversions +# CONFIG_DEV_CONSOLE - Set if architecture-specific logic +# provides /dev/console. Enables stdout, stderr, stdin. +# CONFIG_DEV_LOWCONSOLE - Use the simple, low-level serial console +# driver (minimul support) +# +CONFIG_EXAMPLE=ostest +CONFIG_DEBUG=n +CONFIG_DEBUG_VERBOSE=n +CONFIG_MM_REGIONS=1 +CONFIG_ARCH_LOWPUTC=y +CONFIG_RR_INTERVAL=0 +CONFIG_SCHED_INSTRUMENTATION=n +CONFIG_TASK_NAME_SIZE=0 +CONFIG_START_YEAR=2008 +CONFIG_START_MONTH=10 +CONFIG_START_DAY=1 +CONFIG_JULIAN_TIME=n +CONFIG_DEV_CONSOLE=y +CONFIG_DEV_LOWCONSOLE=y + +# +# The following can be used to disable categories of +# APIs supported by the OS. If the compiler supports +# weak functions, then it should not be necessary to +# disable functions unless you want to restrict usage +# of those APIs. +# +# There are certain dependency relationships in these +# features. +# +# o mq_notify logic depends on signals to awaken tasks +# waiting for queues to become full or empty. +# o pthread_condtimedwait() depends on signals to wake +# up waiting tasks. +# +CONFIG_DISABLE_CLOCK=n +CONFIG_DISABLE_POSIX_TIMERS=n +CONFIG_DISABLE_PTHREAD=n +CONFIG_DISABLE_SIGNALS=n +CONFIG_DISABLE_MQUEUE=n +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_ENVIRON=y + +# +# Misc libc settings +# +# CONFIG_NOPRINTF_FIELDWIDTH - sprintf-related logic is a +# little smaller if we do not support fieldwidthes +# +CONFIG_NOPRINTF_FIELDWIDTH=n + +# +# Allow for architecture optimized implementations +# +# The architecture can provide optimized versions of the +# following to improve sysem performance +# +CONFIG_ARCH_MEMCPY=n +CONFIG_ARCH_MEMCMP=n +CONFIG_ARCH_MEMMOVE=n +CONFIG_ARCH_MEMSET=n +CONFIG_ARCH_STRCMP=n +CONFIG_ARCH_STRCPY=n +CONFIG_ARCH_STRNCPY=n +CONFIG_ARCH_STRLEN=n +CONFIG_ARCH_BZERO=n +CONFIG_ARCH_KMALLOC=n +CONFIG_ARCH_KZMALLOC=n +CONFIG_ARCH_KFREE=n + +# +# Sizes of configurable things (0 disables) +# +# CONFIG_MAX_TASKS - The maximum number of simultaneously +# active tasks. This value must be a power of two. +# CONFIG_MAX_TASK_ARGS - This controls the maximum number of +# of parameters that a task may receive (i.e., maxmum value +# of 'argc') +# CONFIG_NPTHREAD_KEYS - The number of items of thread- +# specific data that can be retained +# CONFIG_NFILE_DESCRIPTORS - The maximum number of file +# descriptors (one for each open) +# CONFIG_NFILE_STREAMS - The maximum number of streams that +# can be fopen'ed +# CONFIG_NAME_MAX - The maximum size of a file name. +# CONFIG_STDIO_BUFFER_SIZE - Size of the buffer to allocate +# on fopen. (Only if CONFIG_NFILE_STREAMS > 0) +# CONFIG_NUNGET_CHARS - Number of characters that can be +# buffered by ungetc() (Only if CONFIG_NFILE_STREAMS > 0) +# CONFIG_PREALLOC_MQ_MSGS - The number of pre-allocated message +# structures. The system manages a pool of preallocated +# message structures to minimize dynamic allocations +# CONFIG_MQ_MAXMSGSIZE - Message structures are allocated with +# a fixed payload size given by this settin (does not include +# other message structure overhead. +# CONFIG_MAX_WDOGPARMS - Maximum number of parameters that +# can be passed to a watchdog handler +# CONFIG_PREALLOC_WDOGS - The number of pre-allocated watchdog +# structures. The system manages a pool of preallocated +# watchdog structures to minimize dynamic allocations +# CONFIG_PREALLOC_TIMERS - The number of pre-allocated POSIX +# timer structures. The system manages a pool of preallocated +# timer structures to minimize dynamic allocations. Set to +# zero for all dynamic allocations. +# +CONFIG_MAX_TASKS=16 +CONFIG_MAX_TASK_ARGS=4 +CONFIG_NPTHREAD_KEYS=4 +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_STDIO_BUFFER_SIZE=256 +CONFIG_NUNGET_CHARS=2 +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Filesystem configuration +# +# CONFIG_FS_FAT - Enable FAT filesystem support +# CONFIG_FAT_SECTORSIZE - Max supported sector size +# CONFIG_FS_ROMFS - Enable ROMFS filesystem support +CONFIG_FS_FAT=n +CONFIG_FS_ROMFS=n + +# +# SPI-based MMC/SD driver +# +# CONFIG_MMCSD_NSLOTS +# Number of MMC/SD slots supported by the driver +# CONFIG_MMCSD_READONLY +# Provide read-only access (default is read/write) +CONFIG_MMCSD_NSLOTS=1 +CONFIG_MMCSD_READONLY=n + +# +# TCP/IP and UDP support via uIP +# CONFIG_NET - Enable or disable all network features +# CONFIG_NET_IPv6 - Build in support for IPv6 +# CONFIG_NSOCKET_DESCRIPTORS - Maximum number of socket descriptors per task/thread. +# CONFIG_NET_SOCKOPTS - Enable or disable support for socket options +# CONFIG_NET_BUFSIZE - uIP buffer size +# CONFIG_NET_TCP - TCP support on or off +# CONFIG_NET_TCP_CONNS - Maximum number of TCP connections (all tasks) +# CONFIG_NET_TCP_READAHEAD_BUFSIZE - Size of TCP read-ahead buffers +# CONFIG_NET_NTCP_READAHEAD_BUFFERS - Number of TCP read-ahead buffers (may be zero) +# CONFIG_NET_MAX_LISTENPORTS - Maximum number of listening TCP ports (all tasks) +# CONFIG_NET_UDP - UDP support on or off +# CONFIG_NET_UDP_CHECKSUMS - UDP checksums on or off +# CONFIG_NET_UDP_CONNS - The maximum amount of concurrent UDP connections +# CONFIG_NET_ICMP - ICMP ping response support on or off +# CONFIG_NET_ICMP_PING - ICMP ping request support on or off +# CONFIG_NET_PINGADDRCONF - Use "ping" packet for setting IP address +# CONFIG_NET_STATISTICS - uIP statistics on or off +# CONFIG_NET_RECEIVE_WINDOW - The size of the advertised receiver's window +# CONFIG_NET_ARPTAB_SIZE - The size of the ARP table +# CONFIG_NET_BROADCAST - Broadcast support +# CONFIG_NET_LLH_LEN - The link level header length +# CONFIG_NET_FWCACHE_SIZE - number of packets to remember when looking for duplicates +CONFIG_NET=n +CONFIG_NET_IPv6=n +CONFIG_NSOCKET_DESCRIPTORS=0 +CONFIG_NET_SOCKOPTS=y +CONFIG_NET_BUFSIZE=420 +CONFIG_NET_TCP=n +CONFIG_NET_TCP_CONNS=40 +CONFIG_NET_MAX_LISTENPORTS=40 +CONFIG_NET_UDP=n +CONFIG_NET_UDP_CHECKSUMS=y +#CONFIG_NET_UDP_CONNS=10 +CONFIG_NET_ICMP=n +CONFIG_NET_ICMP_PING=n +#CONFIG_NET_PINGADDRCONF=0 +CONFIG_NET_STATISTICS=y +#CONFIG_NET_RECEIVE_WINDOW= +#CONFIG_NET_ARPTAB_SIZE=8 +CONFIG_NET_BROADCAST=n +#CONFIG_NET_LLH_LEN=14 +#CONFIG_NET_FWCACHE_SIZE=2 + +# +# UIP Network Utilities +# CONFIG_NET_DHCP_LIGHT - Reduces size of DHCP +# CONFIG_NET_RESOLV_ENTRIES - Number of resolver entries +CONFIG_NET_DHCP_LIGHT=n +CONFIG_NET_RESOLV_ENTRIES=4 + +# +# USB Device Configuration +# +# CONFIG_USBDEV +# Enables USB device support +# CONFIG_USBDEV_ISOCHRONOUS +# Build in extra support for isochronous endpoints +# CONFIG_USBDEV_DUALSPEED +# Hardware handles high and full speed operation (USB 2.0) +# CONFIG_USBDEV_SELFPOWERED +# Will cause USB features to indicate that the device is +# self-powered +# CONFIG_USBDEV_MAXPOWER +# Maximum power consumption in mA +# CONFIG_USBDEV_TRACE +# Enables USB tracing for debug +# CONFIG_USBDEV_TRACE_NRECORDS +# Number of trace entries to remember +CONFIG_USBDEV=n +CONFIG_USBDEV_ISOCHRONOUS=n +CONFIG_USBDEV_DUALSPEED=n +CONFIG_USBDEV_SELFPOWERED=y +CONFIG_USBDEV_REMOTEWAKEUP=n +CONFIG_USBDEV_MAXPOWER=100 +CONFIG_USBDEV_TRACE=n +CONFIG_USBDEV_TRACE_NRECORDS=128 + +# +# STR71X USB Configuration +# +# CONFIG_STR71X_USBDEV_FRAME_INTERRUPT +# Handle USB Start-Of-Frame events. +# Enable reading SOF from interrupt handler vs. simply reading on demand. +# Probably a bad idea... Unless there is some issue with sampling the SOF +# from hardware asynchronously. +# CONFIG_STR71X_USBDEV_EPFAST_INTERRUPT +# Enable high priority interrupts. I have no idea why you might want to +# do that +# CONFIG_STR71X_USBDEV_NDMADESCRIPTORS +# Number of DMA descriptors to allocate in the 8Kb USB RAM. This is a +# tradeoff between the number of DMA channels that can be supported vs +# the size of the DMA buffers available. +# CONFIG_STR71X_USBDEV_DMA +# Enable str71x-specific DMA support +CONFIG_STR71X_USBDEV_FRAME_INTERRUPT=n +CONFIG_STR71X_USBDEV_EPFAST_INTERRUPT=n +CONFIG_STR71X_USBDEV_DMA=n +CONFIG_STR71X_USBDEV_NDMADESCRIPTORS=0 +CONFIG_STR71X_USBDEV_DMAINTMASK=0 + +# +# USB Serial Device Configuration +# +# CONFIG_USBSER +# Enable compilation of the USB serial driver +# CONFIG_USBSER_EPINTIN +# The logical 7-bit address of a hardware endpoint that supports +# interrupt IN operation +# CONFIG_USBSER_EPBULKOUT +# The logical 7-bit address of a hardware endpoint that supports +# bulk OUT operation +# CONFIG_USBSER_EPBULKIN +# The logical 7-bit address of a hardware endpoint that supports +# bulk IN operation +# # CONFIG_USBSER_NWRREQS and CONFIG_USBSER_NRDREQS +# The number of write/read requests that can be in flight +# CONFIG_USBSER_VENDORID and CONFIG_USBSER_VENDORSTR +# The vendor ID code/string +# CONFIG_USBSER_PRODUCTID and CONFIG_USBSER_PRODUCTSTR +# The product ID code/string +# CONFIG_USBSER_RXBUFSIZE and CONFIG_USBSER_TXBUFSIZE +# Size of the serial receive/transmit buffers +CONFIG_USBSER=n +CONFIG_USBSER_EPINTIN=1 +CONFIG_USBSER_EPBULKOUT=2 +CONFIG_USBSER_EPBULKIN=5 +CONFIG_USBSER_NWRREQS=4 +CONFIG_USBSER_NRDREQS=4 +CONFIG_USBSER_VENDORID=0x067b +CONFIG_USBSER_PRODUCTID=0x2303 +CONFIG_USBSER_VENDORSTR="Nuttx" +CONFIG_USBSER_PRODUCTSTR="USBdev Serial" +CONFIG_USBSER_RXBUFSIZE=512 +CONFIG_USBSER_TXBUFSIZE=512 + +# +# USB Storage Device Configuration +# +# CONFIG_USBSTRG +# Enable compilation of the USB storage driver +# CONFIG_USBSTRG_EP0MAXPACKET +# Max packet size for endpoint 0 +# CONFIG_USBSTRG_EPBULKOUT and CONFIG_USBSTRG_EPBULKIN +# The logical 7-bit address of a hardware endpoints that support +# bulk OUT and IN operations +# CONFIG_USBSTRG_NWRREQS and CONFIG_USBSTRG_NRDREQS +# The number of write/read requests that can be in flight +# CONFIG_USBSTRG_BULKINREQLEN and CONFIG_USBSTRG_BULKOUTREQLEN +# The size of the buffer in each write/read request. This +# value needs to be at least as large as the endpoint +# maxpacket and ideally as large as a block device sector. +# CONFIG_USBSTRG_VENDORID and CONFIG_USBSTRG_VENDORSTR +# The vendor ID code/string +# CONFIG_USBSTRG_PRODUCTID and CONFIG_USBSTRG_PRODUCTSTR +# The product ID code/string +# CONFIG_USBSTRG_REMOVABLE +# Select if the media is removable +CONFIG_USBSTRG=n +CONFIG_USBSTRG_EP0MAXPACKET=64 +CONFIG_USBSTRG_EPBULKOUT=2 +CONFIG_USBSTRG_EPBULKIN=5 +CONFIG_USBSTRG_NRDREQS=2 +CONFIG_USBSTRG_NWRREQS=2 +CONFIG_USBSTRG_BULKINREQLEN=256 +CONFIG_USBSTRG_BULKOUTREQLEN=256 +CONFIG_USBSTRG_VENDORID=0x584e +CONFIG_USBSTRG_VENDORSTR="NuttX" +CONFIG_USBSTRG_PRODUCTID=0x5342 +CONFIG_USBSTRG_PRODUCTSTR="USBdev Storage" +CONFIG_USBSTRG_VERSIONNO=0x0399 +CONFIG_USBSTRG_REMOVABLE=y + +# +# Settings for examples/ostest +CONFIG_EXAMPLES_OSTEST_LOOPS=1 +CONFIG_EXAMPLES_OSTEST_STACKSIZE=4096 +CONFIG_EXAMPLES_OSTEST_NBARRIER_THREADS=3 + +# +# Settings for examples/nsh +# +# CONFIG_EXAMPLES_NSH_FILEIOSIZE - Size of a static I/O buffer +# CONFIG_EXAMPLES_NSH_STRERROR - Use strerror(errno) +# CONFIG_EXAMPLES_NSH_LINELEN - Maximum length of one command line +# CONFIG_EXAMPLES_NSH_STACKSIZE - Stack size to use for new threads. +# CONFIG_EXAMPLES_NSH_NESTDEPTH - Max number of nested if-then[-else]-fi +# CONFIG_EXAMPLES_NSH_DISABLESCRIPT - Disable scripting support +# CONFIG_EXAMPLES_NSH_DISABLEBG - Disable background commands +# CONFIG_EXAMPLES_NSH_ROMFSETC - Use startup script in /etc +# CONFIG_EXAMPLES_NSH_CONSOLE - Use serial console front end +# CONFIG_EXAMPLES_NSH_TELNET - Use telnetd console front end +# +# If CONFIG_EXAMPLES_NSH_TELNET is selected: +# CONFIG_EXAMPLES_NSH_IOBUFFER_SIZE -- Telnetd I/O buffer size +# CONFIG_EXAMPLES_NSH_DHCPC - Obtain address using DHCP +# CONFIG_EXAMPLES_NSH_IPADDR - Provides static IP address +# CONFIG_EXAMPLES_NSH_DRIPADDR - Provides static router IP address +# CONFIG_EXAMPLES_NSH_NETMASK - Provides static network mask +# CONFIG_EXAMPLES_NSH_NOMAC - Use a bogus MAC address +# +# If CONFIG_EXAMPLES_NSH_ROMFSETC is selected: +# CONFIG_EXAMPLES_NSH_ROMFSMOUNTPT - ROMFS mountpoint +# CONFIG_EXAMPLES_NSH_INITSCRIPT - Relative path to init script +# CONFIG_EXAMPLES_NSH_ROMFSDEVNO - ROMFS RAM device minor +# CONFIG_EXAMPLES_NSH_ROMFSSECTSIZE - ROMF sector size +# CONFIG_EXAMPLES_NSH_FATDEVNO - FAT FS RAM device minor +# CONFIG_EXAMPLES_NSH_FATSECTSIZE - FAT FS sector size +# CONFIG_EXAMPLES_NSH_FATNSECTORS - FAT FS number of sectors +# CONFIG_EXAMPLES_NSH_FATMOUNTPT - FAT FS mountpoint +CONFIG_EXAMPLES_NSH_FILEIOSIZE=512 +CONFIG_EXAMPLES_NSH_STRERROR=n +CONFIG_EXAMPLES_NSH_LINELEN=64 +CONFIG_EXAMPLES_NSH_STACKSIZE=2048 +CONFIG_EXAMPLES_NSH_NESTDEPTH=3 +CONFIG_EXAMPLES_NSH_DISABLESCRIPT=n +CONFIG_EXAMPLES_NSH_DISABLEBG=n +CONFIG_EXAMPLES_NSH_ROMFSETC=n +CONFIG_EXAMPLES_NSH_CONSOLE=y +CONFIG_EXAMPLES_NSH_TELNET=n +CONFIG_EXAMPLES_NSH_IOBUFFER_SIZE=512 +CONFIG_EXAMPLES_NSH_DHCPC=n +CONFIG_EXAMPLES_NSH_NOMAC=n +CONFIG_EXAMPLES_NSH_IPADDR=(10<<24|0<<16|0<<8|2) +CONFIG_EXAMPLES_NSH_DRIPADDR=(10<<24|0<<16|0<<8|1) +CONFIG_EXAMPLES_NSH_NETMASK=(255<<24|255<<16|255<<8|0) +CONFIG_EXAMPLES_NSH_ROMFSMOUNTPT="/etc" +CONFIG_EXAMPLES_NSH_INITSCRIPT="init.d/rcS" +CONFIG_EXAMPLES_NSH_ROMFSDEVNO=0 +CONFIG_EXAMPLES_NSH_ROMFSSECTSIZE=64 +CONFIG_EXAMPLES_NSH_FATDEVNO=1 +CONFIG_EXAMPLES_NSH_FATSECTSIZE=512 +CONFIG_EXAMPLES_NSH_FATNSECTORS=1024 +CONFIG_EXAMPLES_NSH_FATMOUNTPT=/tmp + +# +# Architecture-specific NSH options +CONFIG_EXAMPLES_NSH_MMCSDSPIPORTNO=1 +CONFIG_EXAMPLES_NSH_MMCSDSLOTNO=0 +CONFIG_EXAMPLES_NSH_MMCSDMINOR=0 + +# +# Stack and heap information +# +# CONFIG_BOOT_FROM_FLASH - Some configurations support XIP +# operation from FLASH. +# CONFIG_CUSTOM_STACK - The up_ implementation will handle +# all stack operations outside of the nuttx model. +# CONFIG_STACK_POINTER - The initial stack pointer (arm7tdmi only) +# CONFIG_PROC_STACK_SIZE - The size of the initial stack +# CONFIG_PTHREAD_STACK_MIN - Minimum pthread stack size +# CONFIG_PTHREAD_STACK_DEFAULT - Default pthread stack size +# CONFIG_HEAP_BASE - The beginning of the heap +# CONFIG_HEAP_SIZE - The size of the heap +# +CONFIG_BOOT_FROM_FLASH=y +CONFIG_CUSTOM_STACK=n +CONFIG_STACK_POINTER= +CONFIG_PROC_STACK_SIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +CONFIG_HEAP_BASE= +CONFIG_HEAP_SIZE= diff --git a/nuttx/configs/olimex-strp711/ostest/ld.script b/nuttx/configs/olimex-strp711/ostest/ld.script new file mode 100644 index 000000000..1d8211ad0 --- /dev/null +++ b/nuttx/configs/olimex-strp711/ostest/ld.script @@ -0,0 +1,95 @@ +/**************************************************************************** + * configs/olimex-strp711/ostest/ld.script + * + * Copyright (C) 2008 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <spudmonkey@racsa.co.cr> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_ARCH(arm) +ENTRY(_stext) +SECTIONS +{ + /* The str71x has 256Kb of non-volatile memory beginning at address + * 0x00000000 for program storage (Bank0, an addition 16Kb is avalable + * for data storage in Bank1). The OS entry point is via the reset vector + * at address 0x00000000 where the FLASH is remapped at reset. + */ + + . = 0x00000000; + .text : { + _stext = ABSOLUTE(.); + *(.text) + *(.fixup) + *(.gnu.warning) + *(.rodata) + *(.rodata.str1.4) + *(.glue_7) + *(.glue_7t) + *(.got) /* Global offset table */ + _etext = ABSOLUTE(.); + } + _eronly = ABSOLUTE(.); /* This is where the .data section + * is relocated for execution out + * FLASH */ + + /* The str71x has 64Kb of on-chip static RAM beginning at address + * 0x20000000. The .data section will be relocated from _eronly + * to _sdata at boot time. + */ + + . = 0x20000000; + .data : { + _sdata = ABSOLUTE(.); + *(.data) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss) + *(COMMON) + _ebss = ABSOLUTE(.); + } + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/nuttx/configs/olimex-strp711/ostest/setenv.sh b/nuttx/configs/olimex-strp711/ostest/setenv.sh new file mode 100755 index 000000000..c18224c19 --- /dev/null +++ b/nuttx/configs/olimex-strp711/ostest/setenv.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# configs/olimex-strp711/ostest/setenv.sh +# +# Copyright (C) 2008 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt <spudmonkey@racsa.co.cr> +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$(basename $0)" = "setenv.sh" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +if [ -z ${PATH_ORIG} ]; then export PATH_ORIG=${PATH}; fi + +WD=`pwd` +export BUILDROOT_BIN=${WD}/../buildroot/build_arm_nofpu/staging_dir/bin +export STR41XCFGS=$WD/configs/olimex-strp711/scripts +export PATH=${BUILDROOT_BIN}:${STR41XCFGS}:/sbin:/usr/sbin:${PATH_ORIG} + +echo "PATH : ${PATH}" diff --git a/nuttx/configs/olimex-strp711/scripts/oocd-reset b/nuttx/configs/olimex-strp711/scripts/oocd-reset new file mode 100644 index 000000000..11d7a3dd6 --- /dev/null +++ b/nuttx/configs/olimex-strp711/scripts/oocd-reset @@ -0,0 +1,41 @@ +# +# The following command wills be executed on +# reset (because of run_and_init in the config-file) +# - wait for target halt +# - erase memory +# - flash content of file main.bin into target-memory +# - shutdown openocd +# +# created by Martin Thomas 8/2007 +# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects +# based on information from Dominic Rath +# + +arm7_9 dcc_downloads enable +wait_halt +sleep 10 +poll +flash probe 0 + +# STR710FZ2 erase all banks: +#flash erase 0 0 9 +# STR710FZ2 erase first 5 banks (0-4) +flash erase 0 0 4 +# if flash earse is not available in your OpenOCD-version use +# flash erase_sector but also read the documentation on +# flash auto_erase which can be used together with flash write_image + +flash write 0 main.bin 0x0 +# flash write may not be available in your OpenOCD-version +# alternative: flash write_binary (flash write_binary <bank-num> <file> <offset>) +# flash write_binary 0 main.bin 0x0 +# flash write_binary may not be available in your OpenOCD-version +# alternatives: flash write_bank or flash write_image +# syntax: flash write_image <file> [offset] [type] where type can +# be ihex, bin, elf or s19 +# flash write_bank flash-bank bin-filename offset +# i.e. flash write_bank 0 main.bin 0x0 + +reset run +sleep 10 +shutdown diff --git a/nuttx/configs/olimex-strp711/scripts/oocd.sh b/nuttx/configs/olimex-strp711/scripts/oocd.sh new file mode 100755 index 000000000..9dbd16796 --- /dev/null +++ b/nuttx/configs/olimex-strp711/scripts/oocd.sh @@ -0,0 +1,65 @@ +#!/bin/sh + +# Set up pathes to binaries, scripts, configuration files + +installdir=/usr/local/bin +openocd=$installdir/openocd + +# The root to the top-level NuttX directory should be in an environment variable + +if [ -z $STR41XCFGS ]; then + echo "Environment variable $STR41XCFGS is not defined" + echo "Has NuttX been configured?" + echo "If so, try sourcing the setenv.sh script in the top-level directory" + exit 1 +fi + +# Check that at least one configuration file exists at that point +if [ ! -f $STR41XCFGS/oocd_wiggler.cfg ]; then + echo "No configuration files found at $STR41XCFGS" + echo "Path to configuration files unknown" + exit 1 +fi + +# Parse command line inputs + +usage="USAGE: $0 [-h] [-d] [-pp] [-ftdi]" + +debug=no +interface=pp +oocdcfg=$STR41XCFGS/oocd_wiggler.cfg +while [ ! -z "$1" ]; do + case $1 in + -d ) + debug=yes + set -x + ;; + -pp ) + interface=pp + oocdcfg=$STR41XCFGS/oocd_wiggler.cfg + ;; + -ftdi ) + interface=ftdi + oocdcfg=$STR41XCFGS/oocd_ftdi.cfg + ;; + -h ) + echo $usage + exit 0 + ;; + * ) + echo "Unrecognized option: $1" + echo $usage + exit 1 + ;; + esac + shift +done + +# Setup debug options + +export options="-d 1" + +# Run OpenOCD -- here it is assumed (1) that you must have root priveleges to +# execute OpenOCD and (2) that your user is listed in the /etc/sudoers file. + +sudo $openocd $options -f $oocdcfg diff --git a/nuttx/configs/olimex-strp711/scripts/oocd_flash.script b/nuttx/configs/olimex-strp711/scripts/oocd_flash.script new file mode 100644 index 000000000..d07067544 --- /dev/null +++ b/nuttx/configs/olimex-strp711/scripts/oocd_flash.script @@ -0,0 +1,26 @@ +#
+# The following command will be executed on reset
+# - wait for target halt
+# - erase memory
+# - flash content of file nuttx.bin into target-memory
+# - shutdown openocd
+#
+# Based on file originally created by Martin Thomas
+#
+
+arm7_9 dcc_downloads enable
+wait_halt
+sleep 10
+poll
+flash probe 0
+
+# STR710 erase all banks:
+#flash erase 0 0 9
+# STR710 erase first 4 banks (32kB)
+flash erase 0 0 4
+
+flash write 0 nuttx.bin 0x0
+reset run
+sleep 10
+shutdown
+
diff --git a/nuttx/configs/olimex-strp711/scripts/oocd_ftdi.cfg b/nuttx/configs/olimex-strp711/scripts/oocd_ftdi.cfg new file mode 100644 index 000000000..f8c5d386e --- /dev/null +++ b/nuttx/configs/olimex-strp711/scripts/oocd_ftdi.cfg @@ -0,0 +1,47 @@ +# Daemon configuration +telnet_port 4444 +gdb_port 3333 + +# Interface - FTDI JTAG-device (see /usr/local/lib/openocd/interface/jtagkey.cfg) +interface ft2232 +ft2232_device_desc "Amontec JTAGkey A" +ft2232_layout jtagkey +ft2232_vid_pid 0x0403 0xcff8 +jtag_speed 0 +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +# (See /usr/local/lib/openocd/target/str710.cfg) +# Start slow, speed up after reset +jtag_khz 10 + +# Use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst srst_pulls_trst + +# Jtag scan chain +# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +# target <type> <startup mode> +# target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm7tdmi little 0 arm7tdmi +[new_target_name] configure -event reset-start { jtag_khz 10 } +[new_target_name] configure -event reset-init { jtag_khz 6000 } +[new_target_name] configure -event old-gdb_program_config { script event/str710_program.script } + +target_script 0 reset oocd_flash.script + +# Flash-configuration STR710FZ2/STR711FR2: +# internal flash at address 0x40000000 size 256kB (0x40000) +# internal ram at address 0x20000000 size 64kB (0x10000) +# a 16kB working area inside RAM: +working_area 0 0x2000C000 0x4000 nobackup + +# Flash bank str7x <base> <size> 0 0 <target#> <variant> +flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x +flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x + +# Start the OpenOCD daemon and reset the processor +init +reset halt + diff --git a/nuttx/configs/olimex-strp711/scripts/oocd_wiggler.cfg b/nuttx/configs/olimex-strp711/scripts/oocd_wiggler.cfg new file mode 100644 index 000000000..c9f8d44bc --- /dev/null +++ b/nuttx/configs/olimex-strp711/scripts/oocd_wiggler.cfg @@ -0,0 +1,46 @@ +# Daemon configuration +telnet_port 4444 +gdb_port 3333 + +# Interface - Wiggler-Type JTAG-device (see /usr/local/lib/openocd/interface/parport.cfg) +interface parport +parport_port 0x378 +parport_cable wiggler +jtag_speed 0 +jtag_nsrst_delay 20 +jtag_ntrst_delay 20 + +# (See /usr/local/lib/openocd/target/str710.cfg) +# Start slow, speed up after reset +jtag_khz 10 + +# Use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst srst_pulls_trst + +# Jtag scan chain +# format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE) +jtag_device 4 0x1 0xf 0xe + +# target <type> <startup mode> +# target arm7tdmi <reset mode> <chainpos> <endianness> <variant> +target arm7tdmi little 0 arm7tdmi +[new_target_name] configure -event reset-start { jtag_khz 10 } +[new_target_name] configure -event reset-init { jtag_khz 6000 } +[new_target_name] configure -event old-gdb_program_config { script event/str710_program.script } + +target_script 0 reset oocd_flash.script + +# Flash-configuration STR710FZ2/STR711FR2: +# internal flash at address 0x40000000 size 256kB (0x40000) +# internal ram at address 0x20000000 size 64kB (0x10000) +# a 16kB working area inside RAM: +working_area 0 0x2000C000 0x4000 nobackup + +# Flash bank str7x <base> <size> 0 0 <target#> <variant> +flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x +flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x + +# Start the OpenOCD daemon and reset the processor +init +reset halt + |