diff options
Diffstat (limited to 'nuttx')
| -rw-r--r-- | nuttx/ChangeLog | 2 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sama5/Kconfig | 37 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sama5/Make.defs | 4 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sama5/sam_ethernet.h | 2 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sama5/sam_rtc.h | 2 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sama5/sam_wdt.c | 684 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sama5/sam_wdt.h | 96 |
7 files changed, 824 insertions, 3 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index a0df39c5e..3c5e8a54a 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -5825,4 +5825,6 @@ * arch/arm/src/sama5/sam_rtc.h and other files: Hook the SAMA5 RTC driver into the build system; Verify the correct operation of the SAMA5 RTC driver (2013-10-19). + * arch/arm/src/sama5/sam_wdt.c and .h: Add a SAMA5 watchdog timer + drvier. Untested on initial check-in (2013-10-19). diff --git a/nuttx/arch/arm/src/sama5/Kconfig b/nuttx/arch/arm/src/sama5/Kconfig index 19b33764b..8094c72b1 100644 --- a/nuttx/arch/arm/src/sama5/Kconfig +++ b/nuttx/arch/arm/src/sama5/Kconfig @@ -100,7 +100,7 @@ config SAMA5_PIT config SAMA5_WDT bool "Watchdog timer Interrupt (WDT)" default n - select WDT + select WATCHDOG config SAMA5_RTC bool "Real time clock calendar (RTC)" @@ -2019,6 +2019,41 @@ endif # SAMA5_TSD endmenu # Touchscreen Configuration endif # SAMA5_ADC +if SAMA5_WDT + +menu "Watchdog Configuration" + +config SAMA5_WDT_INTERRUPT + bool "Interrupt on timeout" + default n + ---help--- + The normal behavior is to reset everything when a watchdog timeout + occurs. An alternative behavior is to simply interrupt when the + timeout occurs. This setting enables that alternative behavior. + +config SAMA5_WDT_DEBUGHALT + bool "Halt on DEBUG" + default y if DEBUG + default n if !DEBUG + ---help--- + Halt the watchdog timer in the debug state + +config SAMA5_WDT_IDLEHALT + bool "Halt in IDLE" + default y + ---help--- + Halt the watchdog timer in the IDLE state + +config SAMA5_WDT_REGDEBUG + bool "Register level debug" + default n + depends on DEBUG + ---help--- + Enable low-level register debug output + +endmenu # Watchdog configuration +endif # SAMA5_WDT + menu "External Memory Configuration" config SAMA5_DDRCS diff --git a/nuttx/arch/arm/src/sama5/Make.defs b/nuttx/arch/arm/src/sama5/Make.defs index 2bcaa18b0..5f9ada19e 100644 --- a/nuttx/arch/arm/src/sama5/Make.defs +++ b/nuttx/arch/arm/src/sama5/Make.defs @@ -114,6 +114,10 @@ ifeq ($(CONFIG_SAMA5_RTC),y) CHIP_CSRCS += sam_rtc.c endif +ifeq ($(CONFIG_SAMA5_WDT),y) +CHIP_CSRCS += sam_wdt.c +endif + ifeq ($(CONFIG_SAMA5_SPI0),y) CHIP_CSRCS += sam_spi.c else diff --git a/nuttx/arch/arm/src/sama5/sam_ethernet.h b/nuttx/arch/arm/src/sama5/sam_ethernet.h index 605840bc9..703a49c61 100644 --- a/nuttx/arch/arm/src/sama5/sam_ethernet.h +++ b/nuttx/arch/arm/src/sama5/sam_ethernet.h @@ -182,7 +182,7 @@ int sam_emac_initialize(void); * Some boards require specialized initialization of the PHY before it can be used. * This may include such things as configuring GPIOs, resetting the PHY, etc. If * CONFIG_SAMA5_PHYINIT is defined in the configuration then the board specific - * logic must provide sam_phyinitialize(); The STM32 Ethernet driver will call + * logic must provide sam_phyinitialize(); The SAMA5 Ethernet driver will call * this function one time before it first uses the PHY. * * Parameters: diff --git a/nuttx/arch/arm/src/sama5/sam_rtc.h b/nuttx/arch/arm/src/sama5/sam_rtc.h index 2b3189054..c119d4c9c 100644 --- a/nuttx/arch/arm/src/sama5/sam_rtc.h +++ b/nuttx/arch/arm/src/sama5/sam_rtc.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/src/sama5/stm_rtc.h + * arch/arm/src/sama5/sam_rtc.h * * Copyright (C) 2013 Gregory Nutt. All rights reserved. * Author: Gregory Nutt <gnutt@nuttx.org> diff --git a/nuttx/arch/arm/src/sama5/sam_wdt.c b/nuttx/arch/arm/src/sama5/sam_wdt.c new file mode 100644 index 000000000..bd0bd12bc --- /dev/null +++ b/nuttx/arch/arm/src/sama5/sam_wdt.c @@ -0,0 +1,684 @@ +/**************************************************************************** + * arch/arm/src/sama5/sam_wwdg.c + * + * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> +#include <nuttx/arch.h> + +#include <stdint.h> +#include <errno.h> +#include <debug.h> + +#include <nuttx/watchdog.h> +#include <arch/board/board.h> + +#include "up_arch.h" +#include "sam_wdt.h" + +#if defined(CONFIG_WATCHDOG) && defined(CONFIG_SAMA5_WDT) + +/**************************************************************************** + * Pre-Processor Definitions + ****************************************************************************/ +/* Configuration ************************************************************/ +/* The Watchdog Timer uses the Slow Clock divided by 128 to establish the + * maximum Watchdog period to be 16 seconds (with a typical Slow Clock of + * 32768 kHz). + */ + +#ifndef BOARD_SLCK_FREQUENCY +# define BOARD_SLCK_FREQUENCY 32768 +#endif + +#define WDT_FREQUENCY (BOARD_SLCK_FREQUENCY / 128) + +/* At 32768Hz, the maximum timeout value will be: + * + * 4096 / WDT_FREQUENCY = 256 seconds or 16,000 milliseconds + * + * And the minimum (non-zero) timeout would be: + * + * 1 / WDT_FREQUENCY = 3.9 milliseconds + */ + +#define WDT_MINTIMEOUT ((1000 + WDT_FREQUENCY - 1) / WDT_FREQUENCY) +#define WDT_MAXTIMEOUT ((4096 * 1000) / WDT_FREQUENCY) + +/* Debug ********************************************************************/ +/* Non-standard debug that may be enabled just for testing the watchdog + * driver. NOTE: that only lldbg types are used so that the output is + * immediately available. + */ + +#ifdef CONFIG_DEBUG_WATCHDOG +# define wddbg lldbg +# define wdvdbg llvdbg +#else +# define wddbg(x...) +# define wdvdbg(x...) +#endif + +/**************************************************************************** + * Private Types + ****************************************************************************/ +/* This structure provides the private representation of the "lower-half" + * driver state structure. This structure must be cast-compatible with the + * well-known watchdog_lowerhalf_s structure. + */ + +struct sam_lowerhalf_s +{ + FAR const struct watchdog_ops_s *ops; /* Lower half operations */ +#ifdef CONFIG_SAMA5_WDT_INTERRUPT + xcpt_t handler; /* Current WDT interrupt handler */ +#endif + uint32_t timeout; /* The actual timeout value (milliseconds) */ + uint16_t reload; /* The 12-bit watchdog reload value */ + bool started; /* The timer has been started */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ +/* Register operations ******************************************************/ + +#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG) +static uint16_t sam_getreg(uint32_t addr); +static void sam_putreg(uint16_t val, uint32_t addr); +#else +# define sam_getreg(addr) getreg32(addr) +# define sam_putreg(val,addr) putreg32(val,addr) +#endif + +/* Interrupt hanlding *******************************************************/ + +#ifdef CONFIG_SAMA5_WDT_INTERRUPT +static int sam_interrupt(int irq, FAR void *context); +#endif + +/* "Lower half" driver methods **********************************************/ + +static int sam_start(FAR struct watchdog_lowerhalf_s *lower); +static int sam_stop(FAR struct watchdog_lowerhalf_s *lower); +static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower); +static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower, + FAR struct watchdog_status_s *status); +static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, + uint32_t timeout); +static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower, + xcpt_t handler); +static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd, + unsigned long arg); + +/**************************************************************************** + * Private Data + ****************************************************************************/ +/* "Lower half" driver methods */ + +static const struct watchdog_ops_s g_wdgops = +{ + .start = sam_start, + .stop = sam_stop, + .keepalive = sam_keepalive, + .getstatus = sam_getstatus, + .settimeout = sam_settimeout, + .capture = sam_capture, + .ioctl = sam_ioctl, +}; + +/* "Lower half" driver state */ + +static struct sam_lowerhalf_s g_wdtdev; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_getreg + * + * Description: + * Get the contents of an SAMA5 register + * + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG) +static uint16_t sam_getreg(uint32_t addr) +{ + static uint32_t prevaddr = 0; + static uint32_t count = 0; + static uint16_t preval = 0; + + /* Read the value from the register */ + + uint16_t val = getreg16(addr); + + /* Is this the same value that we read from the same registe last time? Are + * we polling the register? If so, suppress some of the output. + */ + + if (addr == prevaddr && val == preval) + { + if (count == 0xffffffff || ++count > 3) + { + if (count == 4) + { + lldbg("...\n"); + } + return val; + } + } + + /* No this is a new address or value */ + + else + { + /* Did we print "..." for the previous value? */ + + if (count > 3) + { + /* Yes.. then show how many times the value repeated */ + + lldbg("[repeats %d more times]\n", count-3); + } + + /* Save the new address, value, and count */ + + prevaddr = addr; + preval = val; + count = 1; + } + + /* Show the register value read */ + + lldbg("%08x->%04x\n", addr, val); + return val; +} +#endif + +/**************************************************************************** + * Name: sam_putreg + * + * Description: + * Set the contents of an SAMA5 register to a value + * + ****************************************************************************/ + +#if defined(CONFIG_SAMA5_WDT_REGDEBUG) && defined(CONFIG_DEBUG) +static void sam_putreg(uint16_t val, uint32_t addr) +{ + /* Show the register value being written */ + + lldbg("%08x<-%04x\n", addr, val); + + /* Write the value */ + + putreg16(val, addr); +} +#endif + +/**************************************************************************** + * Name: sam_interrupt + * + * Description: + * WDT early warning interrupt + * + * Input Parameters: + * Usual interrupt handler arguments. + * + * Returned Values: + * Always returns OK. + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_WDT_INTERRUPT +static int sam_interrupt(int irq, FAR void *context) +{ + FAR struct sam_lowerhalf_s *priv = &g_wdtdev; + + /* Is there a registered handler? */ + + if (priv->handler) + { + /* Yes... NOTE: This interrupt service routine (ISR) must reload + * the WDT counter to prevent the reset. Otherwise, we will reset + * upon return. + */ + + priv->handler(irq, context); + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: sam_start + * + * Description: + * Start the watchdog timer, resetting the time to the current timeout, + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int sam_start(FAR struct watchdog_lowerhalf_s *lower) +{ + /* The watchdog timer is enabled or disabled by writing to the MR register. + * + * NOTE: The Watchdog Mode Register (WDT_MR) can be written only once. Only + * a processor reset resets it. Writing the WDT_MR register reloads the + * timer with the newly programmed mode parameters. + */ + + wdvdbg("Entry\n"); + return -ENOSYS; +} + +/**************************************************************************** + * Name: sam_stop + * + * Description: + * Stop the watchdog timer + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int sam_stop(FAR struct watchdog_lowerhalf_s *lower) +{ + /* The watchdog timer is enabled or disabled by writing to the MR register. + * + * NOTE: The Watchdog Mode Register (WDT_MR) can be written only once. Only + * a processor reset resets it. Writing the WDT_MR register reloads the + * timer with the newly programmed mode parameters. + */ + + wdvdbg("Entry\n"); + return -ENOSYS; +} + +/**************************************************************************** + * Name: sam_keepalive + * + * Description: + * Reset the watchdog timer to the current timeout value, prevent any + * imminent watchdog timeouts. This is sometimes referred as "pinging" + * the atchdog timer or "petting the dog". + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int sam_keepalive(FAR struct watchdog_lowerhalf_s *lower) +{ + wdvdbg("Entry\n"); + + /* Write WDT_CR_WDRSTT to the WDT CR regiser (along with the KEY value) + * will restart the watchdog timer. + */ + + sam_putreg(WDT_CR_WDRSTT | WDT_CR_KEY, SAM_WDT_CR); + return OK; +} + +/**************************************************************************** + * Name: sam_getstatus + * + * Description: + * Get the current watchdog timer status + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * stawtus - The location to return the watchdog status information. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int sam_getstatus(FAR struct watchdog_lowerhalf_s *lower, + FAR struct watchdog_status_s *status) +{ + FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower; + + wdvdbg("Entry\n"); + DEBUGASSERT(priv); + + /* Return the status bit */ + + status->flags = WDFLAGS_RESET; + if (priv->started) + { + status->flags |= WDFLAGS_ACTIVE; + } + +#ifdef CONFIG_SAMA5_WDT_INTERRUPT + if (priv->handler) + { + status->flags |= WDFLAGS_CAPTURE; + } +#endif + + /* Return the actual timeout is milliseconds */ + + status->timeout = priv->timeout; + + /* Get the time remaining until the watchdog expires (in milliseconds) + * + * REVISIT: I think this that this information is available. + */ + + status->timeleft = 0; + + wdvdbg("Status :\n"); + wdvdbg(" flags : %08x\n", status->flags); + wdvdbg(" timeout : %d\n", status->timeout); + wdvdbg(" timeleft : %d\n", status->flags); + return OK; +} + +/**************************************************************************** + * Name: sam_settimeout + * + * Description: + * Set a new timeout value (and reset the watchdog timer) + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * timeout - The new timeout value in millisecnds. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int sam_settimeout(FAR struct watchdog_lowerhalf_s *lower, + uint32_t timeout) +{ + FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower; + uint32_t reload; + uint16_t regval; + + DEBUGASSERT(priv); + wdvdbg("Entry: timeout=%d\n", timeout); + + /* Can this timeout be represented? */ + + if (timeout < WDT_MINTIMEOUT || timeout >= WDT_MAXTIMEOUT) + { + wddbg("Cannot represent timeout: %d < %d > %d\n", + WDT_MINTIMEOUT, timeout, WDT_MAXTIMEOUT); + return -ERANGE; + } + + /* Calculate the reload value to achiee this (appoximate) timeout. + * + * Examples with WDT_FREQUENCY = 32768 / 128 = 256: + * timeout = 4 -> reload = 1 + * timeout = 16000 -> reload = 4096 + */ + + reload = (timeout * WDT_FREQUENCY + 500) / 1000; + if (reload < 1) + { + reload = 1; + } + else if (reload > 4095) + { + reload = 4095; + } + + /* Calculate and save the actual timeout value in milliseconds: + * + * timeout = 1000 * (reload + 1) / Fwwdg + */ + + priv->timeout = (1000 * reload + WDT_FREQUENCY/2) / WDT_FREQUENCY; + + /* Remember the selected values */ + + priv->reload = reload; + + wdvdbg("reload=%d timout: %d->%d\n", + reload, timeout, priv->timeout); + + /* Set the WDT_MR according to calculated value + * + * NOTE: The Watchdog Mode Register (WDT_MR) can be written only once. Only + * a processor reset resets it. Writing the WDT_MR register reloads the + * timer with the newly programmed mode parameters. + */ + + regval = WDT_MR_WDV(reload) | WDT_MR_WDD(reload); + +#ifdef CONFIG_SAMA5_WDT_INTERRUPT + /* Generate an interrupt whent he watchdog timer expires */ + + regval |= WDT_MR_WDFIEN; +#else + /* Reset (everything) if the watchdog timer expires */ + + regval |= WDT_MR_WDFIEN; +#endif + +#ifdef CONFIG_SAMA5_WDT_DEBUGHALT + /* Halt the watchdog in the debug state */ + + regval |= WDT_MR_WDDBGHLT; +#endif + +#ifdef CONFIG_SAMA5_WDT_IDLEHALT + /* Halt the watchdog in the IDLE mode */ + + regval |= WDT_MR_WDIDLEHLT; +#endif + + sam_putreg(regval, SAM_WDT_MR); + + /* NOTE: We had to start the watchdog here (because we cannot re-write the + * MR register). So sam_start will not be able to do anything. + */ + + priv->started = true; + return OK; +} + +/**************************************************************************** + * Name: sam_capture + * + * Description: + * Don't reset on watchdog timer timeout; instead, call this user provider + * timeout handler. NOTE: Providing handler==NULL will restore the reset + * behavior. + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * newhandler - The new watchdog expiration function pointer. If this + * function pointer is NULL, then the reset-on-expiration + * behavior is restored, + * + * Returned Values: + * The previous watchdog expiration function pointer or NULL is there was + * no previous function pointer, i.e., if the previous behavior was + * reset-on-expiration (NULL is also returned if an error occurs). + * + ****************************************************************************/ + +static xcpt_t sam_capture(FAR struct watchdog_lowerhalf_s *lower, + xcpt_t handler) +{ +#ifndef CONFIG_SAMA5_WDT_INTERRUPT + wddbg("ERROR: Not configured for this mode\n"); + return NULL; +#else + FAR struct sam_lowerhalf_s *priv = (FAR struct sam_lowerhalf_s *)lower; + irqstate_t flags; + xcpt_t oldhandler; + + DEBUGASSERT(priv); + wdvdbg("Entry: handler=%p\n", handler); + + /* Get the old handler return value */ + + flags = irqsave(); + oldhandler = priv->handler; + + /* Save the new handler */ + + priv->handler = handler; + + /* Are we attaching or detaching the handler? */ + + if (handler) + { + /* Attaching... Enable the WDT interrupt */ + + up_enable_irq(SAM_IRQ_WDT); + } + else + { + /* Detaching... Disable the WDT interrupt */ + + up_disable_irq(SAM_IRQ_WDT); + } + + irqrestore(flags); + return oldhandler; +#endif +} + +/**************************************************************************** + * Name: sam_ioctl + * + * Description: + * Any ioctl commands that are not recognized by the "upper-half" driver + * are forwarded to the lower half driver through this method. + * + * Input Parameters: + * lower - A pointer the publicly visible representation of the "lower-half" + * driver state structure. + * cmd - The ioctol command value + * arg - The optional argument that accompanies the 'cmd'. The + * interpretation of this argument depends on the particular + * command. + * + * Returned Values: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +static int sam_ioctl(FAR struct watchdog_lowerhalf_s *lower, int cmd, + unsigned long arg) +{ + wdvdbg("Entry: cmd=%d arg=%ld\n", cmd, arg); + + /* No ioctls are supported */ + + return -ENOTTY; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_wdtinitialize + * + * Description: + * Initialize the WDT watchdog time. The watchdog timer is intialized and + * registered as 'devpath. The initial state of the watchdog time is + * disabled. + * + * Input Parameters: + * devpath - The full path to the watchdog. This should be of the form + * /dev/watchdog0 + * + * Returned Values: + * None + * + ****************************************************************************/ + +void sam_wdtinitialize(FAR const char *devpath) +{ + FAR struct sam_lowerhalf_s *priv = &g_wdtdev; + + wdvdbg("Entry: devpath=%s\n", devpath); + + /* No clocking setup is required. The Watchdog Timer uses the Slow Clock + * divided by 128 to establish the maximum Watchdog period to be 16 seconds + * (with a typical Slow Clock of 32768 kHz). + */ + + /* Initialize the driver state structure. Here we assume: (1) the state + * structure lies in .bss and was zeroed at reset time. (2) This function + * is only called once so it is never necessary to re-zero the structure. + */ + + priv->ops = &g_wdgops; + +#ifdef CONFIG_SAMA5_WDT_INTERRUPT + /* Attach our WDT interrupt handler (But don't enable it yet) */ + + (void)irq_attach(SAM_IRQ_WDT, sam_interrupt); +#endif + + /* Register the watchdog driver as /dev/watchdog0 */ + + (void)watchdog_register(devpath, (FAR struct watchdog_lowerhalf_s *)priv); +} + +#endif /* CONFIG_WATCHDOG && CONFIG_SAMA5_WDT */ diff --git a/nuttx/arch/arm/src/sama5/sam_wdt.h b/nuttx/arch/arm/src/sama5/sam_wdt.h new file mode 100644 index 000000000..5f160173f --- /dev/null +++ b/nuttx/arch/arm/src/sama5/sam_wdt.h @@ -0,0 +1,96 @@ +/**************************************************************************** + * arch/arm/src/sama5/sam_wdt.h + * + * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt <gnutt@nuttx.org> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_ARM_SRC_SAMA5_SAM_WDT_H +#define __ARCH_ARM_SRC_SAMA5_SAM_WDT_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include <nuttx/config.h> + +#include "chip.h" +#include "chip/sam_wdt.h" + +#ifdef CONFIG_WATCHDOG + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" { +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: sam_wdtinitialize + * + * Description: + * Initialize the WDT watchdog timer. The watchdog timer is intialized and + * registered as 'devpath. The initial state of the watchdog time is + * disabled. + * + * Input Parameters: + * devpath - The full path to the watchdog. This should be of the form + * /dev/watchdog0 + * + * Returned Values: + * None + * + ****************************************************************************/ + +#ifdef CONFIG_SAMA5_WDT +void sam_wdtinitialize(FAR const char *devpath); +#endif + +#undef EXTERN +#if defined(__cplusplus) +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* CONFIG_WATCHDOG */ +#endif /* __ARCH_ARM_SRC_SAMA5_SAM_WDT_H */ |