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-rw-r--r--nuttx/ChangeLog4
-rw-r--r--nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c4
-rw-r--r--nuttx/configs/ekk-lm3s9b96/README.txt2
-rw-r--r--nuttx/configs/ekk-lm3s9b96/src/up_boot.c2
-rw-r--r--nuttx/configs/ekk-lm3s9b96/src/up_ssi.c4
5 files changed, 10 insertions, 6 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog
index 7286e8d82..cc5f60f8e 100644
--- a/nuttx/ChangeLog
+++ b/nuttx/ChangeLog
@@ -2952,4 +2952,8 @@
Xplorer board. This is just to facilitate testing of the LPC43xx
port but will, with any luck, become proper board support for that
board.
+ * arch/arm/src/lm3s/lm3s_syscontrol.c: Fix an optimization related problem
+ by adding a volatile qualifier to a timing loop. Oddly, the consequence
+ of the bug is that when debug was off, the LM3S platform too a long time
+ to boot. It now boots rapidly whether debug is on or off.
diff --git a/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c b/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c
index f7a9528c1..bd67a6ae1 100644
--- a/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c
+++ b/nuttx/arch/arm/src/lm3s/lm3s_syscontrol.c
@@ -110,7 +110,7 @@ static inline void lm3s_oscdelay(uint32_t rcc, uint32_t rcc2)
* current clock rate is very slow.
*/
- uint32_t delay = FAST_OSCDELAY;
+ uint32_t delay = FAST_OSCDELAY;
/* Are we currently using RCC2? */
@@ -150,7 +150,7 @@ static inline void lm3s_oscdelay(uint32_t rcc, uint32_t rcc2)
static inline void lm3s_plllock(void)
{
- uint32_t delay;
+ volatile uint32_t delay;
/* Loop until the lock is achieved or until a timeout occurs */
diff --git a/nuttx/configs/ekk-lm3s9b96/README.txt b/nuttx/configs/ekk-lm3s9b96/README.txt
index 3b1da6d2f..9c4e1ba69 100644
--- a/nuttx/configs/ekk-lm3s9b96/README.txt
+++ b/nuttx/configs/ekk-lm3s9b96/README.txt
@@ -268,7 +268,7 @@ Stellaris EKK-LM3S9B96 Evaluation Kit Configuration Options
CONFIG_DRAM_SIZE - Describes the installed DRAM (SRAM in this case):
- CONFIG_DRAM_SIZE=0x00010000 (64Kb)
+ CONFIG_DRAM_SIZE=0x00018000 (96Kb)
CONFIG_DRAM_START - The start address of installed DRAM
diff --git a/nuttx/configs/ekk-lm3s9b96/src/up_boot.c b/nuttx/configs/ekk-lm3s9b96/src/up_boot.c
index 95f8cba48..528d150e1 100644
--- a/nuttx/configs/ekk-lm3s9b96/src/up_boot.c
+++ b/nuttx/configs/ekk-lm3s9b96/src/up_boot.c
@@ -72,7 +72,7 @@
void lm3s_boardinitialize(void)
{
- /* Configure SPI chip selects if 1) SSI is not disabled, and 2) the weak function
+ /* Configure chip selects if 1) SSI is not disabled, and 2) the weak function
* lm3s_ssiinitialize() has been brought into the link.
*/
diff --git a/nuttx/configs/ekk-lm3s9b96/src/up_ssi.c b/nuttx/configs/ekk-lm3s9b96/src/up_ssi.c
index 879a6669d..2fe3b81c8 100644
--- a/nuttx/configs/ekk-lm3s9b96/src/up_ssi.c
+++ b/nuttx/configs/ekk-lm3s9b96/src/up_ssi.c
@@ -99,13 +99,13 @@
* Name: lm3s_ssiinitialize
*
* Description:
- * Called to configure SPI chip select GPIO pins for the LM3S6965 Eval Kit.
+ * Called to configure chip select GPIO pins for the LM3S9B96 Eval board.
*
************************************************************************************/
void weak_function lm3s_ssiinitialize(void)
{
- /* Configure the SPI CS GPIO */
+ /* Configure the CS GPIO */
#if 0
ssi_dumpgpio("lm3s_ssiinitialize() Entry");
ssi_dumpgpio("lm3s_ssiinitialize() Exit");