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* Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI ↵Gregory Nutt2013-04-161-1/+1
| | | | register. We have to revert to using the nasty PRIMASK register
* Rework of kernel build signal dispatch to user-space handlerspatacongo2013-03-231-19/+0
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5778 42af7a65-404d-4744-a932-0658087f49c3
* A few fixes related to dispatched signals in kernel mode (there are still ↵patacongo2013-03-221-1/+8
| | | | | | issues) git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5777 42af7a65-404d-4744-a932-0658087f49c3
* Fix syscall parameter passing for the case where the number of parameters is >4patacongo2013-03-211-3/+12
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5767 42af7a65-404d-4744-a932-0658087f49c3
* Add support for nested system callspatacongo2013-03-171-6/+24
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* Add support for calling to and returning from signal handlers in in ↵patacongo2013-03-172-0/+34
| | | | | | user-mode threads git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5750 42af7a65-404d-4744-a932-0658087f49c3
* More MPU-related fixespatacongo2013-03-161-1/+1
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* Fix some ARMv7-M syscall logicpatacongo2013-03-121-1/+4
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* Fix some bad syscall dispatching log. This change is not testable until ↵patacongo2013-03-061-1/+7
| | | | | | these is a tested NuttX kernel build. git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5713 42af7a65-404d-4744-a932-0658087f49c3
* More logic to use BASEPRI to control interrupts -- still doesn't workpatacongo2013-01-223-10/+23
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5547 42af7a65-404d-4744-a932-0658087f49c3
* Add option to use BASEPRI instead of PRIMASK to disable interrupts in all ↵patacongo2013-01-221-58/+83
| | | | | | ARMv7-M architectures git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5546 42af7a65-404d-4744-a932-0658087f49c3
* Resync new repository with old repo r5166patacongo2012-09-171-1/+20
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* Email address change in nuttx/patacongo2012-09-131-1/+1
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* Incoporate (more) new ARMv7-M exception handling logic contributed by Mike Smithpatacongo2012-02-223-99/+353
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4414 42af7a65-404d-4744-a932-0658087f49c3
* Incoporate new ARMv7-M exception handling logic contributed by Mike Smithpatacongo2012-02-221-71/+77
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4413 42af7a65-404d-4744-a932-0658087f49c3
* Add support for the Cortex-M4 floating pointingpatacongo2011-12-071-2/+2
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4144 42af7a65-404d-4744-a932-0658087f49c3
* Add storage space for FPU registers in context switchingpatacongo2011-12-071-2/+78
| | | | git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4143 42af7a65-404d-4744-a932-0658087f49c3
* Name change: Change Cortex-M3 naming to ARMv7-M naming so support Cortex-M4patacongo2011-08-052-0/+559
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3846 42af7a65-404d-4744-a932-0658087f49c3
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