| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | SAMA5: Fix HSMCI race condition. Now memory card interface is functional wit... | Gregory Nutt | 2013-08-10 | 4 | -79/+251 |
| * | Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, s... | Gregory Nutt | 2013-08-10 | 5 | -4/+4 |
| * | Extend the virtual-to-physical address conversion logic to handle NFS SRM, UD... | Gregory Nutt | 2013-08-09 | 1 | -34/+290 |
| * | SAMA5: Centralize logic for conversion between physical and virtual addresses | Gregory Nutt | 2013-08-09 | 6 | -112/+437 |
| * | Fix some cache-related issues with the SAMA5 DMA driver | Gregory Nutt | 2013-08-09 | 1 | -1/+33 |
| * | SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers | Gregory Nutt | 2013-08-09 | 9 | -203/+1086 |
| * | SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit sett... | Gregory Nutt | 2013-08-08 | 5 | -23/+48 |
| * | SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; t... | Gregory Nutt | 2013-08-08 | 4 | -74/+480 |
| * | More SAMA5 DMAC driver fixes. Still does not work. | Gregory Nutt | 2013-08-07 | 5 | -27/+67 |
| * | SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers | Gregory Nutt | 2013-08-07 | 6 | -182/+233 |
| * | Fix SAM bug: Parmaters reversed in DMA function call | Gregory Nutt | 2013-08-06 | 4 | -9/+9 |
| * | SAM3,4,A5 DMAC driver fixes | Gregory Nutt | 2013-08-06 | 3 | -12/+54 |
| * | SAM3,4,A5: Fix some masked status checks that can generate false error reports | Gregory Nutt | 2013-08-06 | 2 | -10/+16 |
| * | SAMA5: A few early, easy bug fixes. The rest will all be difficult | Gregory Nutt | 2013-08-06 | 1 | -30/+36 |
| * | SAMA5: Add PIO interrupt support. Massive name changes for consistency in PI... | Gregory Nutt | 2013-08-06 | 14 | -770/+1235 |
| * | SAMA5: Add HSMCI memory card driver support | Gregory Nutt | 2013-08-05 | 7 | -34/+3505 |
| * | SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not... | Gregory Nutt | 2013-08-05 | 2 | -42/+75 |
| * | SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH | Gregory Nutt | 2013-08-05 | 1 | -1/+1 |
| * | SAMA5D3x-EK: At support for the AT25 serial FLASH | Gregory Nutt | 2013-08-04 | 1 | -0/+18 |
| * | SAMA5: Add register level debug option for SPI | Gregory Nutt | 2013-08-04 | 2 | -4/+111 |
| * | SAMA5: SPI driver now supports both SPI0 and SPI1 | Gregory Nutt | 2013-08-04 | 4 | -173/+375 |
| * | SAMA5: Add basic SPI suppport (untested) | Gregory Nutt | 2013-08-04 | 5 | -0/+1417 |
| * | SAMA5: Add DMA suppport (untested) | Gregory Nutt | 2013-08-04 | 7 | -9/+2267 |
| * | SAMA5: Add DMA controller register definitions | Gregory Nutt | 2013-08-03 | 2 | -1/+791 |
| * | Standard configuration variables used to enable interupt controller debug; SA... | Gregory Nutt | 2013-08-03 | 11 | -213/+273 |
| * | Various changes to get SAMA5 SDRAM working. Marginally functional, but there... | Gregory Nutt | 2013-08-02 | 2 | -3/+3 |
| * | Correct some typos int he MPADDRCS register address definitions | Gregory Nutt | 2013-08-02 | 1 | -25/+25 |
| * | SAMA5: More MMU-related changes to properly initialize SDRAM | Gregory Nutt | 2013-08-02 | 8 | -147/+551 |
| * | SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM | Gregory Nutt | 2013-08-01 | 3 | -38/+51 |
| * | SAMA5: Add DDR controller register definitions | Gregory Nutt | 2013-08-01 | 1 | -0/+399 |
| * | ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and ... | Gregory Nutt | 2013-08-01 | 2 | -176/+140 |
| * | ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file... | Gregory Nutt | 2013-08-01 | 3 | -147/+751 |
| * | SAMA5: Add an NSH configuration of the SAMA5D3x-EK board | Gregory Nutt | 2013-07-31 | 1 | -2/+2 |
| * | SAMA5: Modification of some CPSR-related inline functions | Gregory Nutt | 2013-07-31 | 1 | -9/+8 |
| * | Fix Cortex-A CPSR register field definition | Gregory Nutt | 2013-07-30 | 4 | -23/+28 |
| * | SAMA5: Change mapping of vector tables to work around that fact that I don't ... | Gregory Nutt | 2013-07-30 | 2 | -0/+41 |
| * | ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and ca... | Gregory Nutt | 2013-07-30 | 2 | -8/+58 |
| * | More DAC changes from John Wharington | Gregory Nutt | 2013-07-30 | 1 | -1/+3 |
| * | Add ARMv7-A irqdisable() inline function | Gregory Nutt | 2013-07-30 | 1 | -0/+18 |
| * | STM32 F3 I2C driver from John Wharington | Gregory Nutt | 2013-07-30 | 4 | -92/+2313 |
| * | STM32 DAC DMA fixes from John Wharington | Gregory Nutt | 2013-07-30 | 6 | -44/+359 |
| * | SAMA5: More cache and mmu inline utility functions | Gregory Nutt | 2013-07-29 | 4 | -5/+254 |
| * | SAMA5: Separate cache operations into separate files | Gregory Nutt | 2013-07-29 | 7 | -305/+522 |
| * | Changes to ARMv7-A boot logic to handle the case where we execute out of NOR ... | Gregory Nutt | 2013-07-29 | 2 | -60/+87 |
| * | Add SAMA5 HSMC register definitions and logic to reconfigure the NOR FLASH | Gregory Nutt | 2013-07-29 | 1 | -0/+559 |
| * | SAMA5: Add file structure to support board-specific initialization of NOR flash | Gregory Nutt | 2013-07-29 | 4 | -21/+167 |
| * | SAMA5: The ostest configuration have been converted to run out of NOR flash. ... | Gregory Nutt | 2013-07-28 | 4 | -61/+121 |
| * | SAMA5: Correct a clock configuration bug; clarify some MMU memory types | Gregory Nutt | 2013-07-28 | 3 | -26/+86 |
| * | SAMA5: Correct vector mapping | Gregory Nutt | 2013-07-28 | 5 | -96/+111 |
| * | Removed unused ARMv7-A cache function | Gregory Nutt | 2013-07-27 | 1 | -41/+0 |
