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path: root/nuttx/configs/sama5d3x-ek/src/nor_main.c
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* Change naming from cp_XYZ_cache() to arch_XYP_cache() so that all cache ↵Gregory Nutt2014-07-261-2/+2
| | | | operations will pick up L2 support if it is enabled
* Updated NOR boot logic from David SidraneGregory Nutt2014-04-031-12/+13
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* SAMA5 NOR boot: Use a static memory variable to determine if/when we boot to ↵Gregory Nutt2014-04-031-7/+14
| | | | NOR FLASH
* SAMA5D3x-EK: Change name of all board-specific configuration variables so ↵Gregory Nutt2014-03-301-2/+2
| | | | that there are no collisions with names of similar variables for other boards
* SAMA5D3x-EK: Cosmetic improvements to the NOR boot printfs; updated READMEGregory Nutt2013-12-021-13/+8
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* SAMA5 norboot configuration updatesGregory Nutt2013-10-201-1/+1
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* SAMA5: Modification of some CPSR-related inline functionsGregory Nutt2013-07-311-2/+2
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* SAMA5: Change mapping of vector tables to work around that fact that I don't ↵Gregory Nutt2013-07-301-5/+25
| | | | understand how the AXI MATRIX remap works
* ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and ↵Gregory Nutt2013-07-301-9/+12
| | | | caches; Should not remap ISRAM to address 0x0 unless we booted into ISRAM
* The last bit of a previous commit was still in the editorGregory Nutt2013-07-301-9/+2
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* Add ARMv7-A irqdisable() inline functionGregory Nutt2013-07-301-0/+32
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* SAMA5: More cache and mmu inline utility functionsGregory Nutt2013-07-291-6/+11
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* Changes to ARMv7-A boot logic to handle the case where we execute out of NOR ↵Gregory Nutt2013-07-291-5/+21
| | | | FLASH
* SAMA5: Add a little NuttX debug program to help debugger programs in NOR flashGregory Nutt2013-07-291-0/+131