| Commit message (Collapse) | Author | Age | Files | Lines |
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address before NSH even starts
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code. Add configuration for other PHY GPIOs. Still no Ethernet interrupts
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configuration using MPLAB and the XC32 toolchain. From David Sidrane
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Still some unresovled issues with DCache handling
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unfortunately, currently disabled.
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reversed resulting in a trashed value for the number of blocks in the BLOCKR register. This was sufficient to prevent DMA writes from working.
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compatible but there are still some DMA- and Cache-related issues that need to be worked out.
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configuration
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support Cortex-M7
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