| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Added FIONREAD and FIONWRITE to CDC/ACM driver. From Lorenz Meier | Gregory Nutt | 2013-08-10 | 2 | -0/+49 |
| * | Serial FIONREAD, FIONWRITE, and TERMIOS I/O processing from Mike Smith, Andre... | Gregory Nutt | 2013-08-10 | 5 | -16/+268 |
| * | MMC/SD SDIO: Correct return values when multiple block transfers are suppres... | Gregory Nutt | 2013-08-10 | 2 | -32/+50 |
| * | SAMA5: Fix HSMCI race condition. Now memory card interface is functional wit... | Gregory Nutt | 2013-08-10 | 11 | -107/+358 |
| * | Remove some pre-processor warnings that I am more than tired of seeing | Gregory Nutt | 2013-08-10 | 1 | -11/+5 |
| * | Rearrange configuration settings so that ARCH_HAVE_SDIO is moved to higher, s... | Gregory Nutt | 2013-08-10 | 9 | -8/+13 |
| * | Extend the virtual-to-physical address conversion logic to handle NFS SRM, UD... | Gregory Nutt | 2013-08-09 | 1 | -34/+290 |
| * | SAMA5: Centralize logic for conversion between physical and virtual addresses | Gregory Nutt | 2013-08-09 | 7 | -112/+439 |
| * | Fix some cache-related issues with the SAMA5 DMA driver | Gregory Nutt | 2013-08-09 | 3 | -2/+39 |
| * | SAM3,4,A5 DMA fixes; SAMA5 SPI driver now supports DMA transfers | Gregory Nutt | 2013-08-09 | 12 | -204/+1097 |
| * | SAMA5: Use RDR/TDR registers for DMA, not FIFO registers; change DMA bit sett... | Gregory Nutt | 2013-08-08 | 5 | -23/+48 |
| * | SAMA5 DMA: Need to flush caches; DMA channel depends upon direction of DMA; t... | Gregory Nutt | 2013-08-08 | 4 | -74/+480 |
| * | More SAMA5 DMAC driver fixes. Still does not work. | Gregory Nutt | 2013-08-07 | 5 | -27/+67 |
| * | SAMA3,4,A5: Misc corrections to DMA and HSMCI drivers | Gregory Nutt | 2013-08-07 | 6 | -182/+233 |
| * | Change setup logic to hand MTD minor numbers for AT24, HSMCI0, and HSMCI1 | Gregory Nutt | 2013-08-07 | 5 | -150/+70 |
| * | Fix SAM bug: Parmaters reversed in DMA function call | Gregory Nutt | 2013-08-06 | 5 | -9/+12 |
| * | SAM3,4,A5 DMAC driver fixes | Gregory Nutt | 2013-08-06 | 4 | -13/+58 |
| * | SAM3,4,A5: Fix some masked status checks that can generate false error reports | Gregory Nutt | 2013-08-06 | 3 | -11/+21 |
| * | SAMA5: A few early, easy bug fixes. The rest will all be difficult | Gregory Nutt | 2013-08-06 | 3 | -40/+47 |
| * | SAMA5: Add PIO interrupt support. Massive name changes for consistency in PI... | Gregory Nutt | 2013-08-06 | 27 | -918/+1463 |
| * | SAMA5: Add HSMCI memory card driver support | Gregory Nutt | 2013-08-05 | 15 | -79/+4205 |
| * | SAMA5: SPI Driver + AT25 FLASH work; SAM3/4: Correct an error, SPI will not... | Gregory Nutt | 2013-08-05 | 4 | -44/+100 |
| * | SAMA5: Add logic to auto-mount a file system on AT25 SPI FLASH for NSH | Gregory Nutt | 2013-08-05 | 11 | -61/+303 |
| * | SAMA5D3x-EK: At support for the AT25 serial FLASH | Gregory Nutt | 2013-08-04 | 9 | -11/+357 |
| * | SAMA5: Add register level debug option for SPI | Gregory Nutt | 2013-08-04 | 3 | -6/+113 |
| * | SAMA5: SPI driver now supports both SPI0 and SPI1 | Gregory Nutt | 2013-08-04 | 5 | -173/+377 |
| * | SAMA5: Add basic SPI suppport (untested) | Gregory Nutt | 2013-08-04 | 6 | -0/+1420 |
| * | SAMA5: Add DMA suppport (untested) | Gregory Nutt | 2013-08-04 | 8 | -9/+2271 |
| * | Fixes for compiler warnings from Lorenz Meier | Gregory Nutt | 2013-08-03 | 3 | -19/+19 |
| * | SAMA5: Add DMA controller register definitions | Gregory Nutt | 2013-08-03 | 3 | -1/+793 |
| * | Standard configuration variables used to enable interupt controller debug; SA... | Gregory Nutt | 2013-08-03 | 14 | -244/+319 |
| * | Various changes to get SAMA5 SDRAM working. Marginally functional, but there... | Gregory Nutt | 2013-08-02 | 4 | -27/+52 |
| * | Correct some typos int he MPADDRCS register address definitions | Gregory Nutt | 2013-08-02 | 8 | -30/+103 |
| * | SAMA5: More MMU-related changes to properly initialize SDRAM | Gregory Nutt | 2013-08-02 | 17 | -224/+682 |
| * | SAMA5: Add logic to initialize SAMA5D3x-EK on-board SDRAM | Gregory Nutt | 2013-08-01 | 8 | -51/+657 |
| * | SAMA5: Add DDR controller register definitions | Gregory Nutt | 2013-08-01 | 2 | -1/+402 |
| * | ARMv7-A: Map all of .text, .bss, .data., stacks before enabling the MMU and ... | Gregory Nutt | 2013-08-01 | 3 | -177/+145 |
| * | ARMv7-A: Separate CONFIG_PAGING start-up logic into a different startup file... | Gregory Nutt | 2013-08-01 | 4 | -147/+757 |
| * | Correct errors noted in SAMA5 documentation | Gregory Nutt | 2013-08-01 | 2 | -18/+12 |
| * | Prep for NuttX-6.29 releasenuttx-6.29 | Gregory Nutt | 2013-07-31 | 3 | -634/+673 |
| * | SAMA5: Delay loop calibrated; Correct sense of the RED LED | Gregory Nutt | 2013-07-31 | 9 | -22/+59 |
| * | SAMA5: Add an NSH configuration of the SAMA5D3x-EK board | Gregory Nutt | 2013-07-31 | 9 | -24/+1291 |
| * | SAMA5: Modification of some CPSR-related inline functions | Gregory Nutt | 2013-07-31 | 3 | -11/+27 |
| * | Fix Cortex-A CPSR register field definition | Gregory Nutt | 2013-07-30 | 4 | -23/+28 |
| * | SAMA5: Change mapping of vector tables to work around that fact that I don't ... | Gregory Nutt | 2013-07-30 | 4 | -5/+70 |
| * | ARMv7-A: Add cp15_disable_dcache(); SAMA5: nor_main.c no disables MMU and ca... | Gregory Nutt | 2013-07-30 | 3 | -17/+70 |
| * | The last bit of a previous commit was still in the editor | Gregory Nutt | 2013-07-30 | 1 | -9/+2 |
| * | More DAC changes from John Wharington | Gregory Nutt | 2013-07-30 | 1 | -1/+3 |
| * | Add ARMv7-A irqdisable() inline function | Gregory Nutt | 2013-07-30 | 4 | -18/+62 |
| * | STM32 F3 I2C driver from John Wharington | Gregory Nutt | 2013-07-30 | 5 | -92/+2315 |
