1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
|
/****************************************************************************
* arch/arm/src/lpc17/kinetis_irq.c
* arch/arm/src/chip/kinetis_irq.c
*
* Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include "nvic.h"
#include "ram_vectors.h"
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
#include "kinetis_internal.h"
/****************************************************************************
* Definitions
****************************************************************************/
/* Enable NVIC debug features that are probably only desireable during
* bringup
*/
#undef KINETIS_IRQ_DEBUG
/* Get a 32-bit version of the default priority */
#define DEFPRIORITY32 \
(NVIC_SYSH_PRIORITY_DEFAULT << 24 |\
NVIC_SYSH_PRIORITY_DEFAULT << 16 |\
NVIC_SYSH_PRIORITY_DEFAULT << 8 |\
NVIC_SYSH_PRIORITY_DEFAULT)
/****************************************************************************
* Public Data
****************************************************************************/
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: kinetis_dumpnvic
*
* Description:
* Dump some interesting NVIC registers
*
****************************************************************************/
#if defined(KINETIS_IRQ_DEBUG) && defined (CONFIG_DEBUG)
static void kinetis_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
flags = irqsave();
slldbg("NVIC (%s, irq=%d):\n", msg, irq);
slldbg(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
#if 0
slldbg(" SYSH ENABLE MEMFAULT: %08x BUSFAULT: %08x USGFAULT: %08x SYSTICK: %08x\n",
getreg32(NVIC_SYSHCON_MEMFAULTENA), getreg32(NVIC_SYSHCON_BUSFAULTENA),
getreg32(NVIC_SYSHCON_USGFAULTENA), getreg32(NVIC_SYSTICK_CTRL_ENABLE));
#endif
slldbg(" IRQ ENABLE: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_31_ENABLE), getreg32(NVIC_IRQ32_63_ENABLE);
getreg32(NVIC_IRQ64_95_ENABLE), getreg32(NVIC_IRQ96_127_ENABLE));
slldbg(" SYSH_PRIO: %08x %08x %08x\n",
getreg32(NVIC_SYSH4_7_PRIORITY), getreg32(NVIC_SYSH8_11_PRIORITY),
getreg32(NVIC_SYSH12_15_PRIORITY));
slldbg(" IRQ PRIO: %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ0_3_PRIORITY), getreg32(NVIC_IRQ4_7_PRIORITY),
getreg32(NVIC_IRQ8_11_PRIORITY), getreg32(NVIC_IRQ12_15_PRIORITY));
slldbg(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ16_19_PRIORITY), getreg32(NVIC_IRQ20_23_PRIORITY),
getreg32(NVIC_IRQ24_27_PRIORITY), getreg32(NVIC_IRQ28_31_PRIORITY));
slldbg(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
slldbg(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ48_51_PRIORITY), getreg32(NVIC_IRQ52_55_PRIORITY),
getreg32(NVIC_IRQ56_59_PRIORITY), getreg32(NVIC_IRQ60_63_PRIORITY));
slldbg(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ64_67_PRIORITY), getreg32(NVIC_IRQ68_71_PRIORITY),
getreg32(NVIC_IRQ72_75_PRIORITY), getreg32(NVIC_IRQ76_79_PRIORITY));
slldbg(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ80_83_PRIORITY), getreg32(NVIC_IRQ84_87_PRIORITY),
getreg32(NVIC_IRQ88_91_PRIORITY), getreg32(NVIC_IRQ92_95_PRIORITY));
slldbg(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ96_99_PRIORITY), getreg32(NVIC_IRQ100_103_PRIORITY),
getreg32(NVIC_IRQ104_107_PRIORITY), getreg32(NVIC_IRQ108_111_PRIORITY));
#if NR_VECTORS > 111
slldbg(" %08x %08x\n",
getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
#endif
irqrestore(flags);
}
#else
# define kinetis_dumpnvic(msg, irq)
#endif
/****************************************************************************
* Name: kinetis_nmi, kinetis_busfault, kinetis_usagefault, kinetis_pendsv,
* kinetis_dbgmonitor, kinetis_pendsv, kinetis_reserved
*
* Description:
* Handlers for various execptions. None are handled and all are fatal
* error conditions. The only advantage these provided over the default
* unexpected interrupt handler is that they provide a diagnostic output.
*
****************************************************************************/
#ifdef CONFIG_DEBUG
static int kinetis_nmi(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! NMI received\n");
PANIC();
return 0;
}
static int kinetis_busfault(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! Bus fault recived\n");
PANIC();
return 0;
}
static int kinetis_usagefault(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! Usage fault received\n");
PANIC();
return 0;
}
static int kinetis_pendsv(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! PendSV received\n");
PANIC();
return 0;
}
static int kinetis_dbgmonitor(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! Debug Monitor receieved\n");
PANIC();
return 0;
}
static int kinetis_reserved(int irq, FAR void *context)
{
(void)irqsave();
dbg("PANIC!!! Reserved interrupt\n");
PANIC();
return 0;
}
#endif
/****************************************************************************
* Name: kinetis_prioritize_syscall
*
* Description:
* Set the priority of an exception. This function may be needed
* internally even if support for prioritized interrupts is not enabled.
*
****************************************************************************/
#ifdef CONFIG_ARMV7M_USEBASEPRI
static inline void kinetis_prioritize_syscall(int priority)
{
uint32_t regval;
/* SVCALL is system handler 11 */
regval = getreg32(NVIC_SYSH8_11_PRIORITY);
regval &= ~NVIC_SYSH_PRIORITY_PR11_MASK;
regval |= (priority << NVIC_SYSH_PRIORITY_PR11_SHIFT);
putreg32(regval, NVIC_SYSH8_11_PRIORITY);
}
#endif
/****************************************************************************
* Name: kinetis_irqinfo
*
* Description:
* Given an IRQ number, provide the register and bit setting to enable or
* disable the irq.
*
****************************************************************************/
static int kinetis_irqinfo(int irq, uint32_t *regaddr, uint32_t *bit)
{
DEBUGASSERT(irq >= KINETIS_IRQ_NMI && irq < NR_IRQS);
/* Check for external interrupt */
if (irq >= KINETIS_IRQ_EXTINT)
{
if (irq < (KINETIS_IRQ_EXTINT+32))
{
*regaddr = NVIC_IRQ0_31_ENABLE;
*bit = 1 << (irq - KINETIS_IRQ_EXTINT);
}
else if (irq < (KINETIS_IRQ_EXTINT+64))
{
*regaddr = NVIC_IRQ32_63_ENABLE;
*bit = 1 << (irq - KINETIS_IRQ_EXTINT - 32);
}
else if (irq < (KINETIS_IRQ_EXTINT+96))
{
*regaddr = NVIC_IRQ64_95_ENABLE;
*bit = 1 << (irq - KINETIS_IRQ_EXTINT - 64);
}
else if (irq < NR_IRQS)
{
*regaddr = NVIC_IRQ96_127_ENABLE;
*bit = 1 << (irq - KINETIS_IRQ_EXTINT - 96);
}
else
{
return ERROR; /* Invalid irq */
}
}
/* Handle processor exceptions. Only a few can be disabled */
else
{
*regaddr = NVIC_SYSHCON;
if (irq == KINETIS_IRQ_MEMFAULT)
{
*bit = NVIC_SYSHCON_MEMFAULTENA;
}
else if (irq == KINETIS_IRQ_BUSFAULT)
{
*bit = NVIC_SYSHCON_BUSFAULTENA;
}
else if (irq == KINETIS_IRQ_USAGEFAULT)
{
*bit = NVIC_SYSHCON_USGFAULTENA;
}
else if (irq == KINETIS_IRQ_SYSTICK)
{
*regaddr = NVIC_SYSTICK_CTRL;
*bit = NVIC_SYSTICK_CTRL_ENABLE;
}
else
{
return ERROR; /* Invalid or unsupported exception */
}
}
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_irqinitialize
****************************************************************************/
void up_irqinitialize(void)
{
/* Disable all interrupts */
putreg32(0, NVIC_IRQ0_31_ENABLE);
putreg32(0, NVIC_IRQ32_63_ENABLE);
putreg32(0, NVIC_IRQ64_95_ENABLE);
putreg32(0, NVIC_IRQ96_127_ENABLE);
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
up_ramvec_initialize();
#endif
/* Set all interrrupts (and exceptions) to the default priority */
putreg32(DEFPRIORITY32, NVIC_SYSH4_7_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_SYSH8_11_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_SYSH12_15_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ0_3_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ4_7_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ8_11_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ12_15_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ16_19_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ20_23_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ24_27_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ28_31_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ32_35_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ36_39_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ40_43_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ44_47_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ48_51_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ52_55_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ56_59_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ60_63_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ64_67_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ68_71_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ72_75_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ76_79_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ80_83_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ84_87_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ88_91_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ92_95_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ96_99_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ100_103_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ104_107_PRIORITY);
putreg32(DEFPRIORITY32, NVIC_IRQ108_111_PRIORITY); /* K40 has 111 defined vectors */
#if NR_VECTORS > 111
putreg32(DEFPRIORITY32, NVIC_IRQ112_115_PRIORITY); /* K60 has 120 defined vectors */
putreg32(DEFPRIORITY32, NVIC_IRQ116_119_PRIORITY);
#endif
/* currents_regs is non-NULL only while processing an interrupt */
current_regs = NULL;
/* Attach the SVCall and Hard Fault exception handlers. The SVCall
* exception is used for performing context switches; The Hard Fault
* must also be caught because a SVCall may show up as a Hard Fault
* under certain conditions.
*/
irq_attach(KINETIS_IRQ_SVCALL, up_svcall);
irq_attach(KINETIS_IRQ_HARDFAULT, up_hardfault);
/* Set the priority of the SVCall interrupt */
#ifdef CONFIG_ARCH_IRQPRIO
/* up_prioritize_irq(KINETIS_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
#endif
#ifdef CONFIG_ARMV7M_USEBASEPRI
kinetis_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
#endif
/* If the MPU is enabled, then attach and enable the Memory Management
* Fault handler.
*/
#ifdef CONFIG_ARMV7M_MPU
irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
up_enable_irq(KINETIS_IRQ_MEMFAULT);
#endif
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG
irq_attach(KINETIS_IRQ_NMI, kinetis_nmi);
#ifndef CONFIG_ARMV7M_MPU
irq_attach(KINETIS_IRQ_MEMFAULT, up_memfault);
#endif
irq_attach(KINETIS_IRQ_BUSFAULT, kinetis_busfault);
irq_attach(KINETIS_IRQ_USAGEFAULT, kinetis_usagefault);
irq_attach(KINETIS_IRQ_PENDSV, kinetis_pendsv);
irq_attach(KINETIS_IRQ_DBGMONITOR, kinetis_dbgmonitor);
irq_attach(KINETIS_IRQ_RESERVED, kinetis_reserved);
#endif
kinetis_dumpnvic("initial", NR_IRQS);
/* Initialize logic to support a second level of interrupt decoding for
* configured pin interrupts.
*/
#ifdef CONFIG_GPIO_IRQ
kinetis_pinirqinitialize();
#endif
/* And finally, enable interrupts */
#ifndef CONFIG_SUPPRESS_INTERRUPTS
irqenable();
#endif
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
****************************************************************************/
void up_disable_irq(int irq)
{
uint32_t regaddr;
uint32_t regval;
uint32_t bit;
if (kinetis_irqinfo(irq, ®addr, &bit) == 0)
{
/* Clear the appropriate bit in the register to enable the interrupt */
regval = getreg32(regaddr);
regval &= ~bit;
putreg32(regval, regaddr);
}
kinetis_dumpnvic("disable", irq);
}
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
****************************************************************************/
void up_enable_irq(int irq)
{
uint32_t regaddr;
uint32_t regval;
uint32_t bit;
if (kinetis_irqinfo(irq, ®addr, &bit) == 0)
{
/* Set the appropriate bit in the register to enable the interrupt */
regval = getreg32(regaddr);
regval |= bit;
putreg32(regval, regaddr);
}
kinetis_dumpnvic("enable", irq);
}
/****************************************************************************
* Name: up_maskack_irq
*
* Description:
* Mask the IRQ and acknowledge it
*
****************************************************************************/
void up_maskack_irq(int irq)
{
up_disable_irq(irq);
#if 0 /* Does not appear to be necessary in most cases */
kinetis_clrpend(irq);
#endif
}
/****************************************************************************
* Name: up_prioritize_irq
*
* Description:
* Set the priority of an IRQ.
*
* Since this API is not supported on all architectures, it should be
* avoided in common implementations where possible.
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQPRIO
int up_prioritize_irq(int irq, int priority)
{
uint32_t regaddr;
uint32_t regval;
int shift;
#ifdef CONFIG_ARMV7M_USEBASEPRI
DEBUGASSERT(irq >= KINETIS_IRQ_MEMFAULT && irq < NR_IRQS &&
priority >= NVIC_SYSH_DISABLE_PRIORITY &&
priority <= NVIC_SYSH_PRIORITY_MIN);
#else
DEBUGASSERT(irq >= KINETIS_IRQ_MEMFAULT && irq < NR_IRQS &&
(unsigned)priority <= NVIC_SYSH_PRIORITY_MIN);
#endif
if (irq < KINETIS_IRQ_EXTINT)
{
/* NVIC_SYSH_PRIORITY() maps {0..15} to one of three priority
* registers (0-3 are invalid)
*/
regaddr = NVIC_SYSH_PRIORITY(irq);
irq -= 4;
}
else
{
/* NVIC_IRQ_PRIORITY() maps {0..} to one of many priority registers */
irq -= KINETIS_IRQ_EXTINT;
regaddr = NVIC_IRQ_PRIORITY(irq);
}
regval = getreg32(regaddr);
shift = ((irq & 3) << 3);
regval &= ~(0xff << shift);
regval |= (priority << shift);
putreg32(regval, regaddr);
kinetis_dumpnvic("prioritize", irq);
return OK;
}
#endif
|