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| author | Gregory Nutt <gnutt@nuttx.org> | 2013-06-18 07:14:05 -0600 |
|---|---|---|
| committer | Gregory Nutt <gnutt@nuttx.org> | 2013-06-18 07:14:05 -0600 |
| commit | 0bc6bd024fd2cabee5b5b9acea89ebd4ad9453c1 (patch) | |
| tree | ab286615f01cd56f43a1a1ea83af766553f788ce | |
| parent | e1bbd1c73b30077b4cb45e05b5b452c2cbda8651 (diff) | |
| download | nuttx-0bc6bd024fd2cabee5b5b9acea89ebd4ad9453c1.tar.gz nuttx-0bc6bd024fd2cabee5b5b9acea89ebd4ad9453c1.tar.bz2 nuttx-0bc6bd024fd2cabee5b5b9acea89ebd4ad9453c1.zip | |
Corrections to the Kinetis TSI header file from Alan Carvalho de Assis
| -rw-r--r-- | nuttx/ChangeLog | 3 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/kinetis/kinetis_tsi.h | 4 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sam34/chip/sam_spi.h | 6 | ||||
| -rw-r--r-- | nuttx/arch/arm/src/sam34/sam_spi.c | 3 |
4 files changed, 10 insertions, 6 deletions
diff --git a/nuttx/ChangeLog b/nuttx/ChangeLog index 830f01f7d..817e574e5 100644 --- a/nuttx/ChangeLog +++ b/nuttx/ChangeLog @@ -4996,3 +4996,6 @@ 96MHz. This might have broken some things? (2013-6-17). * drivers/mmcsd/mmcsd-spi.c: Driver need to make sure that the SPI mode and data width are correct (2013-6-17). + * arch/arm/src/kinetis/kinetis_tsi.h: Corrections to the Kinetis + (2013-6-18) + diff --git a/nuttx/arch/arm/src/kinetis/kinetis_tsi.h b/nuttx/arch/arm/src/kinetis/kinetis_tsi.h index 5e1dd9976..ea52c0fd1 100644 --- a/nuttx/arch/arm/src/kinetis/kinetis_tsi.h +++ b/nuttx/arch/arm/src/kinetis/kinetis_tsi.h @@ -137,7 +137,7 @@ #define TSI_GENCS_OUTRGF (1 << 14) /* Bit 14: Out of Range Flag */ #define TSI_GENCS_EOSF (1 << 15) /* Bit 15: End of scan flag */ #define TSI_GENCS_PS_SHIFT (16) /* Bits 16-18: Electrode oscillator prescaler */ -#define TSI_GENCS_PS_MASK (3 << TSI_GENCS_PS_SHIFT) +#define TSI_GENCS_PS_MASK (7 << TSI_GENCS_PS_SHIFT) # define TSI_GENCS_PS_DIV1 (0 << TSI_GENCS_PS_SHIFT) /* Electrode oscillator / 1 */ # define TSI_GENCS_PS_DIV2 (1 << TSI_GENCS_PS_SHIFT) /* Electrode oscillator / 2 */ # define TSI_GENCS_PS_DIV4 (2 << TSI_GENCS_PS_SHIFT) /* Electrode oscillator / 4 */ @@ -148,7 +148,7 @@ # define TSI_GENCS_PS_DIV128 (7 << TSI_GENCS_PS_SHIFT) /* Electrode oscillator / 128 */ #define TSI_GENCS_NSCN_SHIFT (19) /* Bits 19-23: Number of Consecutive Scans per Electrode */ #define TSI_GENCS_NSCN_MASK (31 << TSI_GENCS_NSCN_SHIFT) -# define TSI_GENCS_NSCN_TIMES(n) (((n)-1) << TSI_GENCS_NSCN_MASK) /* n times per electrode, n=1..32 */ +# define TSI_GENCS_NSCN_TIMES(n) (((n)-1) << TSI_GENCS_NSCN_SHIFT) /* n times per electrode, n=1..32 */ #define TSI_GENCS_LPSCNITV_SHIFT (24) /* Bits 24-27: TSI Low Power Mode Scan Interval */ #define TSI_GENCS_LPSCNITV_MASK (15 << TSI_GENCS_LPSCNITV_SHIFT) # define TSI_GENCS_LPSCNITV_1MS (0 << TSI_GENCS_LPSCNITV_SHIFT) /* 1 ms scan interval */ diff --git a/nuttx/arch/arm/src/sam34/chip/sam_spi.h b/nuttx/arch/arm/src/sam34/chip/sam_spi.h index a0344c6a8..80aed22bf 100644 --- a/nuttx/arch/arm/src/sam34/chip/sam_spi.h +++ b/nuttx/arch/arm/src/sam34/chip/sam_spi.h @@ -111,7 +111,7 @@ #define SPI_MR_PCS_SHIFT (16) /* Bits 16-19: Peripheral Chip Select */ #define SPI_MR_PCS_MASK (15 << SPI_MR_PCS_SHIFT) # define SPI_MR_PCS0 (0 << SPI_MR_PCS_SHIFT) /* NPCS[3:0] = 1110 (w/PCSDEC=0) */ -# define SPI_MR_PCS1 (1 << SPI_MR_PCS_SHIFT) /* NPCS[3:0] = 1100 (w/PCSDEC=0) */ +# define SPI_MR_PCS1 (1 << SPI_MR_PCS_SHIFT) /* NPCS[3:0] = 1101 (w/PCSDEC=0) */ # define SPI_MR_PCS2 (3 << SPI_MR_PCS_SHIFT) /* NPCS[3:0] = 1011 (w/PCSDEC=0) */ # define SPI_MR_PCS3 (7 << SPI_MR_PCS_SHIFT) /* NPCS[3:0] = 0111 (w/PCSDEC=0) */ #define SPI_MR_DLYBCS_SHIFT (24) /* Bits 24-31: Delay Between Chip Selects */ @@ -124,7 +124,7 @@ #define SPI_RDR_PCS_SHIFT (16) /* Bits 16-19: Peripheral Chip Select */ #define SPI_RDR_PCS_MASK (15 << SPI_RDR_PCS_SHIFT) # define SPI_RDR_PCS0 (0 << SPI_RDR_PCS_SHIFT) /* NPCS[3:0] = 1110 (w/PCSDEC=0) */ -# define SPI_RDR_PCS1 (1 << SPI_RDR_PCS_SHIFT) /* NPCS[3:0] = 1100 (w/PCSDEC=0) */ +# define SPI_RDR_PCS1 (1 << SPI_RDR_PCS_SHIFT) /* NPCS[3:0] = 1101 (w/PCSDEC=0) */ # define SPI_RDR_PCS2 (3 << SPI_RDR_PCS_SHIFT) /* NPCS[3:0] = 1011 (w/PCSDEC=0) */ # define SPI_RDR_PCS3 (7 << SPI_RDR_PCS_SHIFT) /* NPCS[3:0] = 0111 (w/PCSDEC=0) */ @@ -135,7 +135,7 @@ #define SPI_TDR_PCS_SHIFT (16) /* Bits 16-19: Peripheral Chip Select */ #define SPI_TDR_PCS_MASK (15 << SPI_TDR_PCS_SHIFT) # define SPI_TDR_PCS0 (0 << SPI_TDR_PCS_SHIFT) /* NPCS[3:0] = 1110 (w/PCSDEC=0) */ -# define SPI_TDR_PCS1 (1 << SPI_TDR_PCS_SHIFT) /* NPCS[3:0] = 1100 (w/PCSDEC=0) */ +# define SPI_TDR_PCS1 (1 << SPI_TDR_PCS_SHIFT) /* NPCS[3:0] = 1101 (w/PCSDEC=0) */ # define SPI_TDR_PCS2 (3 << SPI_TDR_PCS_SHIFT) /* NPCS[3:0] = 1011 (w/PCSDEC=0) */ # define SPI_TDR_PCS3 (7 << SPI_TDR_PCS_SHIFT) /* NPCS[3:0] = 0111 (w/PCSDEC=0) */ #define SPI_TDR_LASTXFER (1 << 24) /* Bit 24: Last Transfer */ diff --git a/nuttx/arch/arm/src/sam34/sam_spi.c b/nuttx/arch/arm/src/sam34/sam_spi.c index 507ab2647..35160ff04 100644 --- a/nuttx/arch/arm/src/sam34/sam_spi.c +++ b/nuttx/arch/arm/src/sam34/sam_spi.c @@ -368,7 +368,8 @@ static int spi_lock(FAR struct spi_dev_s *dev, bool lock) * ****************************************************************************/ - static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) + static void spi_select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, + bool selected) { FAR struct sam_spidev_s *priv = (FAR struct sam_spidev_s *)dev; uint32_t regval; |