More stm32f3discovery updates

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5624 42af7a65-404d-4744-a932-0658087f49c3

5 files changed, 104 insertions, 316 deletions

diff --git a/nuttx/arch/arm/src/stm32/stm32_dumpgpio.c b/nuttx/arch/arm/src/stm32/stm32_dumpgpio.c
index cd1933831..393467b19 100644
--- a/nuttx/arch/arm/src/stm32/stm32_dumpgpio.c
+++ b/nuttx/arch/arm/src/stm32/stm32_dumpgpio.c
@@ -120,9 +120,12 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
   /* The following requires exclusive access to the GPIO registers */
 
   flags = irqsave();
+
 #if defined(CONFIG_STM32_STM32F10XX)
+
   lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
         g_portchar[port], pinset, base, msg);
+
   if ((getreg32(STM32_RCC_APB2ENR) & RCC_APB2ENR_IOPEN(port)) != 0)
     {
       lldbg("  CR: %08x %08x IDR: %04x ODR: %04x LCKR: %04x\n",
@@ -143,11 +146,38 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
       lldbg("  GPIO%c not enabled: APB2ENR: %08x\n",
             g_portchar[port], getreg32(STM32_RCC_APB2ENR));
     }
+
+#elif defined(CONFIG_STM32_STM32F30XX)
+
+  DEBUGASSERT(port < STM32_NGPIO_PORTS);
+
+  lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
+        g_portchar[port], pinset, base, msg);
+
+  /* GPIOs are always enabled */
+
+  lldbg(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
+        getreg32(base + STM32_GPIO_MODER_OFFSET),
+        getreg32(base + STM32_GPIO_OTYPER_OFFSET),
+        getreg32(base + STM32_GPIO_OSPEED_OFFSET),
+        getreg32(base + STM32_GPIO_PUPDR_OFFSET));
+  lldbg("  IDR: %04x       ODR: %04x       BSRR: %08x  LCKR: %04x\n",
+        getreg32(base + STM32_GPIO_IDR_OFFSET),
+        getreg32(base + STM32_GPIO_ODR_OFFSET),
+        getreg32(base + STM32_GPIO_BSRR_OFFSET),
+        getreg32(base + STM32_GPIO_LCKR_OFFSET));
+  lldbg(" AFRH: %08x  AFRL: %08x   BRR: %04x\n",
+        getreg32(base + STM32_GPIO_ARFH_OFFSET),
+        getreg32(base + STM32_GPIO_AFRL_OFFSET),
+        getreg32(base + STM32_GPIO_BRR_OFFSET));
+
 #elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
+
   DEBUGASSERT(port < STM32_NGPIO_PORTS);
 
   lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
         g_portchar[port], pinset, base, msg);
+
   if ((getreg32(STM32_RCC_AHB1ENR) & RCC_AHB1ENR_GPIOEN(port)) != 0)
     {
       lldbg(" MODE: %08x OTYPE: %04x     OSPEED: %08x PUPDR: %08x\n",
diff --git a/nuttx/configs/stm32f3discovery/README.txt b/nuttx/configs/stm32f3discovery/README.txt
index 103bb7555..4a6ff4ff2 100644
--- a/nuttx/configs/stm32f3discovery/README.txt
+++ b/nuttx/configs/stm32f3discovery/README.txt
@@ -14,10 +14,9 @@ Contents
   - NuttX OABI "buildroot" Toolchain
   - NXFLAT Toolchain
   - LEDs
-  - PWM
-  - UARTs
-  - Timer Inputs/Outputs
+  - Serial Console
   - FPU
+  - Debugging
   - STM32F3Discovery-specific Configuration Options
   - Configurations
 
@@ -307,101 +306,24 @@ events as follows:
   LED_PANIC            The system has crashed   LD10 Blinking at 2Hz
   LED_IDLE             STM32 is is sleep mode   (Optional, not used)
 
-PWM
-===
+Serial Console
+==============
 
-The STM32F3Discovery has no real on-board PWM devices, but the board can be
-configured to output a pulse train using TIM4 CH2 on PD3.  This pin is
-available next to the audio jack.
-
-UARTs
-=====
-
-UART/USART PINS
----------------
-
-USART1
-  CK      PA8
-  CTS     PA11*
-  RTS     PA12*
-  RX      PA10*, PB7
-  TX      PA9*, PB6*
-USART2
-  CK      PA4*, PD7
-  CTS     PA0*, PD3
-  RTS     PA1, PD4*
-  RX      PA3, PD6
-  TX      PA2, PD5*
-USART3
-  CK      PB12, PC12*, PD10
-  CTS     PB13, PD11
-  RTS     PB14, PD12*
-  RX      PB11, PC11, PD9
-  TX      PB10*, PC10*, PD8
-UART4
-  RX      PA1, PC11
-  TX      PA0*, PC10*
-UART5
-  RX      PD2
-  TX      PC12*
-
- * Indicates pins that have other on-board functions and should be used only
-   with care (See table 5 in the STM32F3Discovery User Guide).  The rest are
-   free I/O pins.
- 
-Default USART/UART Configuration
---------------------------------
- 
-USART2 is enabled in all configurations (see */defconfig).  RX and TX are
-configured on pins PA3 and PA2, respectively (see include/board.h).
-
-Timer Inputs/Outputs
-====================
-
-TIM1
-  CH1     PA8, PE9
-  CH2     PA9*, PE11
-  CH3     PA10*, PE13
-  CH4     PA11*, PE14
-TIM2
-  CH1     PA0*, PA15, PA5*
-  CH2     PA1, PB3*
-  CH3     PA2, PB10*
-  CH4     PA3, PB11
-TIM3
-  CH1     PA6*, PB4, PC6
-  CH2     PA7*, PB5, PC7*
-  CH3     PB0, PC8
-  CH4     PB1, PC9
-TIM4
-  CH1     PB6*, PD12*
-  CH2     PB7, PD13*
-  CH3     PB8, PD14*
-  CH4     PB9*, PD15*
-TIM5
-  CH1     PA0*, PH10**
-  CH2     PA1, PH11**
-  CH3     PA2, PH12**
-  CH4     PA3, PI0
-TIM8
-  CH1     PC6, PI5
-  CH2     PC7*, PI6
-  CH3     PC8, PI7
-  CH4     PC9, PI2
-
- * Indicates pins that have other on-board functions and should be used only
-   with care (See table 5 in the STM32F3Discovery User Guide).  The rest are
-   free I/O pins.
-** Port H pins are not supported by the MCU
-
-Quadrature Encode Timer Inputs
-------------------------------
-
-If enabled (by setting CONFIG_QENCODER=y), then quadrature encoder will
-use either TIM2 or TIM8 (see nsh/defconfig).  If TIM2 is selected, the input 
-pins PA15 and PA1 for CH1 and CH2, respectively).  If TIM8 is selected, then
-PC6 and PI5 will be used for CH1 and CH2  (see include board.h for pin
-definitions).
+The STM32F3Discovery has no on-board RS-232 driver, however USART2 is
+configuration as the serial console in all configurations that use a serial
+console.
+
+There are many options for USART2 RX and TX pins.  They configured to use
+PA2 (TX) and PA3 (RX) for connection to an external serial device because of
+the following settings in the include/board.h file:
+
+  #define GPIO_USART2_RX GPIO_USART2_RX_2
+  #define GPIO_USART2_TX GPIO_USART2_TX_2
+
+This can be found on the board at:
+
+  TX, PA2, Connector P1, pin 14
+  RX, PA3, Connector P1, pin 9
 
 FPU
 ===
@@ -495,6 +417,36 @@ See the section above on Toolchains, NOTE 2, for explanations for some of
 the configuration settings.  Some of the usual settings are just not supported
 by the "Lite" version of the Atollic toolchain.
 
+Debugging
+=========
+
+STM32 ST-LINK Utility
+---------------------
+For simply writing to FLASH, I use the STM32 ST-LINK Utility.  At least
+version 2.4.0 is required (older versions do not recognize the STM32 F3
+device).  This utility is available from free from the STMicro website.
+
+Debugging
+---------
+If you are going to use a debugger, you should make sure that the following
+settings are selection in your configuration file:
+
+  CONFIG_DEBUG_SYMBOLS=y     : Enable debug symbols in the build
+  CONFIG_ARMV7M_USEBASEPRI=y : Use the BASEPRI register to disable interrupts
+
+OpenOCD
+-------
+I am told that OpenOCD will work with the ST-Link, but I have never tried
+it.
+
+https://github.com/texane/stlink
+--------------------------------
+This is an open source server for the ST-Link that I have never used.
+
+Atollic GDB Server
+------------------
+You can use the Atollic IDE, but I have never done that either.
+
 STM32F3Discovery-specific Configuration Options
 ===============================================
 
@@ -746,7 +698,9 @@ Where <subdir> is one of the following:
 
     2. Default toolchain:
 
-       CONFIG_STM32_CODESOURCERYL=y  : CodeSourcery under Linux / Mac OS X
+       CONFIG_HOST_WINDOWS=y                   : Builds under Windows
+       CONFIG_WINDOWS_CYGWIN=y                 : Using Cygwin
+       CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
 
     3. By default, this project assumes that you are *NOT* using the DFU
        bootloader.
@@ -805,35 +759,15 @@ Where <subdir> is one of the following:
        CONFIG_WINDOWS_CYGWIN=y                 : Using Cygwin
        CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
 
-    3. This example supports the PWM test (apps/examples/pwm) but this must
-       be manually enabled by selecting:
-
-       CONFIG_PWM=y              : Enable the generic PWM infrastructure
-       CONFIG_STM32_TIM4=y       : Enable TIM4
-       CONFIG_STM32_TIM4_PWM=y   : Use TIM4 to generate PWM output
-
-       See also apps/examples/README.txt
-
-       Special PWM-only debug options:
-
-       CONFIG_DEBUG_PWM
+    3. This configuration includes USB Support (CDC/ACM device)
 
-    5. This example supports the Quadrature Encode test (apps/examples/qencoder)
-       but this must be manually enabled by selecting:
-
-       CONFIG_EXAMPLES_QENCODER=y : Enable the apps/examples/qencoder
-       CONFIG_SENSORS=y           : Enable support for sensors
-       CONFIG_QENCODER=y          : Enable the generic Quadrature Encoder infrastructure
-       CONFIG_STM32_TIM8=y        : Enable TIM8
-       CONFIG_STM32_TIM2=n        : (Or optionally TIM2)
-       CONFIG_STM32_TIM8_QE=y     : Use TIM8 as the quadrature encoder
-       CONFIG_STM32_TIM2_QE=y     : (Or optionally TIM2)
-
-       See also apps/examples/README.tx. Special PWM-only debug options:
-
-       CONFIG_DEBUG_QENCODER
+        CONFIG_STM32_USB=y            : STM32 USB device support
+        CONFIG_USBDEV=y               : USB device support must be enabled
+        CONFIG_CDCACM=y               : The CDC/ACM driver must be built
+        CONFIG_NSH_BUILTIN_APPS=y     : NSH built-in application support must be enabled
+        CONFIG_NSH_ARCHINIT=y         : To perform USB initialization
 
-    6. This example supports the watchdog timer test (apps/examples/watchdog)
+    4. This example supports the watchdog timer test (apps/examples/watchdog)
        but this must be manually enabled by selecting:
 
        CONFIG_EXAMPLES_WATCHDOG=y : Enable the apps/examples/watchdog
@@ -850,21 +784,13 @@ Where <subdir> is one of the following:
 
        The IWDG timer has a range of about 35 seconds and should not be an issue.
 
-     7. USB Support (CDC/ACM device)
-
-        CONFIG_STM32_OTGFS=y          : STM32 OTG FS support
-        CONFIG_USBDEV=y               : USB device support must be enabled
-        CONFIG_CDCACM=y               : The CDC/ACM driver must be built
-        CONFIG_NSH_BUILTIN_APPS=y     : NSH built-in application support must be enabled
-        CONFIG_NSH_ARCHINIT=y         : To perform USB initialization
-
-     8. Using the USB console.
+    5. Using the USB console.
 
         The STM32F3Discovery NSH configuration can be set up to use a USB CDC/ACM
         (or PL2303) USB console.  The normal way that you would configure the
         the USB console would be to change the .config file like this:
 
-        CONFIG_STM32_OTGFS=y           : STM32 OTG FS support
+        CONFIG_STM32_USB=y             : STM32 OTG FS support
         CONFIG_USART2_SERIAL_CONSOLE=n : Disable the USART2 console
         CONFIG_DEV_CONSOLE=n           : Inhibit use of /dev/console by other logic
         CONFIG_USBDEV=y                : USB device support must be enabled
@@ -875,12 +801,12 @@ Where <subdir> is one of the following:
         times before NSH starts.  The logic does this to prevent sending USB data
         before there is anything on the host side listening for USB serial input.
 
-    9.  Here is an alternative USB console configuration.  The following
+    6.  Here is an alternative USB console configuration.  The following
         configuration will also create a NSH USB console but this version
         will use /dev/console.  Instead, it will use the normal /dev/ttyACM0
         USB serial device for the console:
 
-        CONFIG_STM32_OTGFS=y           : STM32 OTG FS support
+        CONFIG_STM32_USB=y           : STM32 OTG FS support
         CONFIG_USART2_SERIAL_CONSOLE=y : Keep the USART2 console
         CONFIG_DEV_CONSOLE=y           : /dev/console exists (but NSH won't use it)
         CONFIG_USBDEV=y                : USB device support must be enabled
@@ -914,65 +840,6 @@ Where <subdir> is one of the following:
           See the usbnsh configuration below for more information on configuring
           USB trace output and the USB monitor.
 
-   10. USB OTG FS Host Support.  The following changes will enable support for
-       a USB host on the STM32F3Discovery, including support for a mass storage
-       class driver:
-
-       CONFIG_USBDEV=n          : Make sure tht USB device support is disabled
-       CONFIG_USBHOST=y         : Enable USB host support
-       CONFIG_STM32_OTGFS=y     : Enable the STM32 USB OTG FS block
-       CONFIG_STM32_SYSCFG=y    : Needed for all USB OTF FS support
-       CONFIG_SCHED_WORKQUEUE=y : Worker thread support is required for the mass
-                                  storage class driver.
-       CONFIG_NSH_ARCHINIT=y    : Architecture specific USB initialization
-                                  is needed for NSH
-       CONFIG_FS_FAT=y          : Needed by the USB host mass storage class.
-
-       With those changes, you can use NSH with a FLASH pen driver as shown
-       belong.  Here NSH is started with nothing in the USB host slot:
-
-       NuttShell (NSH) NuttX-x.yy
-       nsh> ls /dev
-       /dev:
-        console
-        null
-        ttyS0
-
-       After inserting the FLASH drive, the /dev/sda appears and can be
-       mounted like this:
-
-       nsh> ls /dev
-       /dev:
-        console
-        null
-        sda
-        ttyS0
-       nsh> mount -t vfat /dev/sda /mnt/stuff
-       nsh> ls /mnt/stuff
-       /mnt/stuff:
-        -rw-rw-rw-   16236 filea.c
-
-       And files on the FLASH can be manipulated to standard interfaces:
-
-       nsh> echo "This is a test" >/mnt/stuff/atest.txt
-       nsh> ls /mnt/stuff
-       /mnt/stuff:
-        -rw-rw-rw-   16236 filea.c
-        -rw-rw-rw-      16 atest.txt
-       nsh> cat /mnt/stuff/atest.txt
-       This is a test
-       nsh> cp /mnt/stuff/filea.c fileb.c
-       nsh> ls /mnt/stuff
-       /mnt/stuff:
-        -rw-rw-rw-   16236 filea.c
-        -rw-rw-rw-      16 atest.txt
-        -rw-rw-rw-   16236 fileb.c
-
-       To prevent data loss, don't forget to un-mount the FLASH drive
-       before removing it:
-
-       nsh> umount /mnt/stuff
-
   usbnsh:
   -------
 
diff --git a/nuttx/configs/stm32f3discovery/include/board.h b/nuttx/configs/stm32f3discovery/include/board.h
index f57e0ba32..b8f1555ec 100644
--- a/nuttx/configs/stm32f3discovery/include/board.h
+++ b/nuttx/configs/stm32f3discovery/include/board.h
@@ -246,31 +246,15 @@
  * (See the README.txt file for other options)
  */
 
-#define GPIO_USART2_RX GPIO_USART2_RX_1
-#define GPIO_USART2_TX GPIO_USART2_TX_1
+#define GPIO_USART2_RX GPIO_USART2_RX_2
+#define GPIO_USART2_TX GPIO_USART2_TX_2
 
-/* PWM
- *
- * The STM32F3Discovery has no real on-board PWM devices, but the board can be
- * configured to output a pulse train using TIM4 CH2 on PD13.
- */
-
-#define GPIO_TIM4_CH2OUT GPIO_TIM4_CH2OUT_2
-
-/* SPI - There is a MEMS device on SPI1 using these pins: */
+/* SPI - There is a ST MEMS L3GD20 device on SPI1 using these pins: */
 
 #define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
 #define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
 #define GPIO_SPI1_SCK  GPIO_SPI1_SCK_1
 
-/* Timer Inputs/Outputs (see the README.txt file for options) */
-
-#define GPIO_TIM2_CH1IN  GPIO_TIM2_CH1IN_2
-#define GPIO_TIM2_CH2IN  GPIO_TIM2_CH2IN_1
-
-#define GPIO_TIM8_CH1IN  GPIO_TIM8_CH1IN_1
-#define GPIO_TIM8_CH2IN  GPIO_TIM8_CH2IN_1
-
 /************************************************************************************
  * Public Data
  ************************************************************************************/
diff --git a/nuttx/configs/stm32f3discovery/src/stm32f3discovery-internal.h b/nuttx/configs/stm32f3discovery/src/stm32f3discovery-internal.h
index 2cb5f7917..83223e032 100644
--- a/nuttx/configs/stm32f3discovery/src/stm32f3discovery-internal.h
+++ b/nuttx/configs/stm32f3discovery/src/stm32f3discovery-internal.h
@@ -118,68 +118,12 @@
 
 #define GPIO_BTN_USER   (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0)
 
-/* PWM
- *
- * The STM32F3Discovery has no real on-board PWM devices, but the board can be
- * configured to output a pulse train using TIM4 CH2 on PD13.
- */
-
-#define STM32F3DISCOVERY_PWMTIMER   4
-#define STM32F3DISCOVERY_PWMCHANNEL 2
-
-/* SPI chip selects */
+/* SPI - There is a ST MEMS L3GD20 device on SPI1 using these pins: */
 
-#define GPIO_CS_MEMS    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
+#define GPIO_MEMS_CS    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
                          GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3)
-
-/* USB OTG FS 
- *
- * PA9  OTG_FS_VBUS VBUS sensing (also connected to the green LED)
- * PC0  OTG_FS_PowerSwitchOn
- * PD5  OTG_FS_Overcurrent
- */
-
-#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
-#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0)
-
-#ifdef CONFIG_USBHOST
-#  define GPIO_OTGFS_OVER  (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5)
-
-#else
-#  define GPIO_OTGFS_OVER  (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5)
-#endif
-
-/* UG-2864AMBAG01 or UG-2864HSWEG01 OLED Display (SPI 4-wire):
- *
- * --------------------------+----------------------------------------------
- * Connector CON10 J1:      | STM32F3Discovery
- * --------------+-----------+----------------------------------------------
- * CON10 J1:     | CON20 J2: | P1/P2:
- * --------------+-----------+----------------------------------------------
- * 1  3v3        | 3,4 3v3   | P2 3V
- * 3  /RESET     | 8 /RESET  | P2 PB6 (Arbitrary selection)
- * 5  /CS        | 7 /CS     | P2 PB7 (Arbitrary selection)
- * 7  A0|D/C     | 9 A0|D/C  | P2 PB8 (Arbitrary selection)
- * 9  LED+ (N/C) | -----     | -----
- * 2  5V Vcc     | 1,2 Vcc   | P2 5V
- * 4  DI         | 18 D1/SI  | P1 PA7 (GPIO_SPI1_MOSI == GPIO_SPI1_MOSI_1 (1))
- * 6  SCLK       | 19 D0/SCL | P1 PA5 (GPIO_SPI1_SCK == GPIO_SPI1_SCK_1 (1))
- * 8  LED- (N/C) | -----     | ------
- * 10 GND        | 20 GND    | P2 GND
- * --------------+-----------+----------------------------------------------
- * (1) Required because of on-board MEMS
- * -------------------------------------------------------------------------
- */
- 
-#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
-#  define GPIO_OLED_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
-                           GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN6)
-#  define GPIO_OLED_CS    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
-                           GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN7)
-#  define GPIO_OLED_A0    (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
-                           GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
-#  define GPIO_OLED_DC    GPIO_OLED_A0
-#endif
+#define GPIO_MEMS_INT1  (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTE|GPIO_PIN0)
+#define GPIO_MEMS_INT2  (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTE|GPIO_PIN1)
 
 /****************************************************************************************************
  * Public Types
diff --git a/nuttx/configs/stm32f3discovery/src/up_spi.c b/nuttx/configs/stm32f3discovery/src/up_spi.c
index ce14ea73a..c5eb9779e 100644
--- a/nuttx/configs/stm32f3discovery/src/up_spi.c
+++ b/nuttx/configs/stm32f3discovery/src/up_spi.c
@@ -96,16 +96,9 @@
 void weak_function stm32_spiinitialize(void)
 {
 #ifdef CONFIG_STM32_SPI1
-  (void)stm32_configgpio(GPIO_CS_MEMS);    /* MEMS chip select */
-#endif
-#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
-  (void)stm32_configgpio(GPIO_OLED_CS);    /* OLED chip select */
-# if defined(CONFIG_LCD_UG2864AMBAG01)
-  (void)stm32_configgpio(GPIO_OLED_A0);    /* OLED Command/Data */
-# endif
-# if defined(CONFIG_LCD_UG2864HSWEG01)
-  (void)stm32_configgpio(GPIO_OLED_DC);    /* OLED Command/Data */
-# endif
+  (void)stm32_configgpio(GPIO_MEMS_CS);    /* MEMS chip select */
+  (void)stm32_configgpio(GPIO_MEMS_INT1);  /* MEMS interrupts */
+  (void)stm32_configgpio(GPIO_MEMS_INT2);
 #endif
 }
 
@@ -139,16 +132,7 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool sele
 {
   spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
 
-#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
-  if (devid == SPIDEV_DISPLAY)
-    {
-      stm32_gpiowrite(GPIO_OLED_CS, !selected);
-    }
-  else
-#endif
-    {
-      stm32_gpiowrite(GPIO_CS_MEMS, !selected);
-    }
+  stm32_gpiowrite(GPIO_MEMS_CS, !selected);
 }
 
 uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
@@ -208,27 +192,6 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
 #ifdef CONFIG_STM32_SPI1
 int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
 {
-#if defined(CONFIG_LCD_UG2864AMBAG01) || defined(CONFIG_LCD_UG2864HSWEG01)
-  if (devid == SPIDEV_DISPLAY)
-    {
-      /* "This is the Data/Command control pad which determines whether the
-       *  data bits are data or a command.
-       *
-       *  A0 = "H": the inputs at D0 to D7 are treated as display data.
-       *  A0 = "L": the inputs at D0 to D7 are transferred to the command
-       *       registers."
-       */
-
-# if defined(CONFIG_LCD_UG2864AMBAG01)
-      (void)stm32_gpiowrite(GPIO_OLED_A0, !cmd);
-# endif
-# if defined(CONFIG_LCD_UG2864HSWEG01)
-      (void)stm32_gpiowrite(GPIO_OLED_DC, !cmd);
-# endif
-      return OK;
-    }
-#endif
-
   return -ENODEV;
 }
 #endif